< prev index next >

src/cpu/x86/vm/assembler_x86.hpp

Print this page




1529   void prefetchr(Address src);
1530   void prefetcht0(Address src);
1531   void prefetcht1(Address src);
1532   void prefetcht2(Address src);
1533   void prefetchw(Address src);
1534 
1535   // Shuffle Bytes
1536   void pshufb(XMMRegister dst, XMMRegister src);
1537   void pshufb(XMMRegister dst, Address src);
1538 
1539   // Shuffle Packed Doublewords
1540   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1541   void pshufd(XMMRegister dst, Address src,     int mode);
1542 
1543   // Shuffle Packed Low Words
1544   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1545   void pshuflw(XMMRegister dst, Address src,     int mode);
1546 
1547   // Shift Right by bytes Logical DoubleQuadword Immediate
1548   void psrldq(XMMRegister dst, int shift);


1549 
1550   // Logical Compare 128bit
1551   void ptest(XMMRegister dst, XMMRegister src);
1552   void ptest(XMMRegister dst, Address src);
1553   // Logical Compare 256bit
1554   void vptest(XMMRegister dst, XMMRegister src);
1555   void vptest(XMMRegister dst, Address src);
1556 
1557   // Interleave Low Bytes
1558   void punpcklbw(XMMRegister dst, XMMRegister src);
1559   void punpcklbw(XMMRegister dst, Address src);
1560 
1561   // Interleave Low Doublewords
1562   void punpckldq(XMMRegister dst, XMMRegister src);
1563   void punpckldq(XMMRegister dst, Address src);
1564 
1565   // Interleave Low Quadwords
1566   void punpcklqdq(XMMRegister dst, XMMRegister src);
1567 
1568 #ifndef _LP64 // no 32bit push/pop on amd64




1529   void prefetchr(Address src);
1530   void prefetcht0(Address src);
1531   void prefetcht1(Address src);
1532   void prefetcht2(Address src);
1533   void prefetchw(Address src);
1534 
1535   // Shuffle Bytes
1536   void pshufb(XMMRegister dst, XMMRegister src);
1537   void pshufb(XMMRegister dst, Address src);
1538 
1539   // Shuffle Packed Doublewords
1540   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1541   void pshufd(XMMRegister dst, Address src,     int mode);
1542 
1543   // Shuffle Packed Low Words
1544   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1545   void pshuflw(XMMRegister dst, Address src,     int mode);
1546 
1547   // Shift Right by bytes Logical DoubleQuadword Immediate
1548   void psrldq(XMMRegister dst, int shift);
1549   // Shift Left by bytes Logical DoubleQuadword Immediate
1550   void pslldq(XMMRegister dst, int shift);
1551 
1552   // Logical Compare 128bit
1553   void ptest(XMMRegister dst, XMMRegister src);
1554   void ptest(XMMRegister dst, Address src);
1555   // Logical Compare 256bit
1556   void vptest(XMMRegister dst, XMMRegister src);
1557   void vptest(XMMRegister dst, Address src);
1558 
1559   // Interleave Low Bytes
1560   void punpcklbw(XMMRegister dst, XMMRegister src);
1561   void punpcklbw(XMMRegister dst, Address src);
1562 
1563   // Interleave Low Doublewords
1564   void punpckldq(XMMRegister dst, XMMRegister src);
1565   void punpckldq(XMMRegister dst, Address src);
1566 
1567   // Interleave Low Quadwords
1568   void punpcklqdq(XMMRegister dst, XMMRegister src);
1569 
1570 #ifndef _LP64 // no 32bit push/pop on amd64


< prev index next >