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src/hotspot/cpu/arm/templateTable_arm.cpp

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2979                                      Register load_tgt) {
2980 #ifdef AARCH64
2981   __ membar(order_constraint);
2982 #else
2983   __ membar(order_constraint, tmp, preserve_flags, load_tgt);
2984 #endif
2985 }
2986 
2987 // Blows all volatile registers: R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR.
2988 void TemplateTable::resolve_cache_and_index(int byte_no,
2989                                             Register Rcache,
2990                                             Register Rindex,
2991                                             size_t index_size) {
2992   assert_different_registers(Rcache, Rindex, Rtemp);
2993 
2994   Label resolved;
2995   Bytecodes::Code code = bytecode();
2996   switch (code) {
2997   case Bytecodes::_nofast_getfield: code = Bytecodes::_getfield; break;
2998   case Bytecodes::_nofast_putfield: code = Bytecodes::_putfield; break;

2999   }
3000 
3001   assert(byte_no == f1_byte || byte_no == f2_byte, "byte_no out of range");
3002   __ get_cache_and_index_and_bytecode_at_bcp(Rcache, Rindex, Rtemp, byte_no, 1, index_size);
3003   __ cmp(Rtemp, code);  // have we resolved this bytecode?
3004   __ b(resolved, eq);
3005 
3006   // resolve first time through
3007   address entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_from_cache);
3008   __ mov(R1, code);
3009   __ call_VM(noreg, entry, R1);
3010   // Update registers with resolved info
3011   __ get_cache_and_index_at_bcp(Rcache, Rindex, 1, index_size);
3012   __ bind(resolved);
3013 }
3014 
3015 
3016 // The Rcache and Rindex registers must be set before call
3017 void TemplateTable::load_field_cp_cache_entry(Register Rcache,
3018                                               Register Rindex,




2979                                      Register load_tgt) {
2980 #ifdef AARCH64
2981   __ membar(order_constraint);
2982 #else
2983   __ membar(order_constraint, tmp, preserve_flags, load_tgt);
2984 #endif
2985 }
2986 
2987 // Blows all volatile registers: R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR.
2988 void TemplateTable::resolve_cache_and_index(int byte_no,
2989                                             Register Rcache,
2990                                             Register Rindex,
2991                                             size_t index_size) {
2992   assert_different_registers(Rcache, Rindex, Rtemp);
2993 
2994   Label resolved;
2995   Bytecodes::Code code = bytecode();
2996   switch (code) {
2997   case Bytecodes::_nofast_getfield: code = Bytecodes::_getfield; break;
2998   case Bytecodes::_nofast_putfield: code = Bytecodes::_putfield; break;
2999   default: break;
3000   }
3001 
3002   assert(byte_no == f1_byte || byte_no == f2_byte, "byte_no out of range");
3003   __ get_cache_and_index_and_bytecode_at_bcp(Rcache, Rindex, Rtemp, byte_no, 1, index_size);
3004   __ cmp(Rtemp, code);  // have we resolved this bytecode?
3005   __ b(resolved, eq);
3006 
3007   // resolve first time through
3008   address entry = CAST_FROM_FN_PTR(address, InterpreterRuntime::resolve_from_cache);
3009   __ mov(R1, code);
3010   __ call_VM(noreg, entry, R1);
3011   // Update registers with resolved info
3012   __ get_cache_and_index_at_bcp(Rcache, Rindex, 1, index_size);
3013   __ bind(resolved);
3014 }
3015 
3016 
3017 // The Rcache and Rindex registers must be set before call
3018 void TemplateTable::load_field_cp_cache_entry(Register Rcache,
3019                                               Register Rindex,


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