src/share/vm/opto/chaitin.cpp
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src/share/vm/opto/chaitin.cpp

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1478         if( OptoReg::is_stack(src_reg) ) { // If input is on stack
1479           // This is a CISC Spill, get stack offset and construct new node
1480 #ifndef PRODUCT
1481           if( TraceCISCSpill ) {
1482             tty->print("    reg-instr:  ");
1483             n->dump();
1484           }
1485 #endif
1486           int stk_offset = reg2offset(src_reg);
1487           // Bailout if we might exceed node limit when spilling this instruction
1488           C->check_node_count(0, "out of nodes fixing spills");
1489           if (C->failing())  return;
1490           // Transform node
1491           MachNode *cisc = mach->cisc_version(stk_offset, C)->as_Mach();
1492           cisc->set_req(inp,fp);          // Base register is frame pointer
1493           if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
1494             assert( cisc->oper_input_base() == 2, "Only adding one edge");
1495             cisc->ins_req(1,src);         // Requires a memory edge
1496           }
1497           b->_nodes.map(j,cisc);          // Insert into basic block
1498           n->subsume_by(cisc); // Correct graph
1499           //
1500           ++_used_cisc_instructions;
1501 #ifndef PRODUCT
1502           if( TraceCISCSpill ) {
1503             tty->print("    cisc-instr: ");
1504             cisc->dump();
1505           }
1506 #endif
1507         } else {
1508 #ifndef PRODUCT
1509           if( TraceCISCSpill ) {
1510             tty->print("    using reg-instr: ");
1511             n->dump();
1512           }
1513 #endif
1514           ++_unused_cisc_instructions;    // input can be on stack
1515         }
1516       }
1517 
1518     } // End of for all instructions




1478         if( OptoReg::is_stack(src_reg) ) { // If input is on stack
1479           // This is a CISC Spill, get stack offset and construct new node
1480 #ifndef PRODUCT
1481           if( TraceCISCSpill ) {
1482             tty->print("    reg-instr:  ");
1483             n->dump();
1484           }
1485 #endif
1486           int stk_offset = reg2offset(src_reg);
1487           // Bailout if we might exceed node limit when spilling this instruction
1488           C->check_node_count(0, "out of nodes fixing spills");
1489           if (C->failing())  return;
1490           // Transform node
1491           MachNode *cisc = mach->cisc_version(stk_offset, C)->as_Mach();
1492           cisc->set_req(inp,fp);          // Base register is frame pointer
1493           if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
1494             assert( cisc->oper_input_base() == 2, "Only adding one edge");
1495             cisc->ins_req(1,src);         // Requires a memory edge
1496           }
1497           b->_nodes.map(j,cisc);          // Insert into basic block
1498           n->subsume_by(cisc, C); // Correct graph
1499           //
1500           ++_used_cisc_instructions;
1501 #ifndef PRODUCT
1502           if( TraceCISCSpill ) {
1503             tty->print("    cisc-instr: ");
1504             cisc->dump();
1505           }
1506 #endif
1507         } else {
1508 #ifndef PRODUCT
1509           if( TraceCISCSpill ) {
1510             tty->print("    using reg-instr: ");
1511             n->dump();
1512           }
1513 #endif
1514           ++_unused_cisc_instructions;    // input can be on stack
1515         }
1516       }
1517 
1518     } // End of for all instructions


src/share/vm/opto/chaitin.cpp
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