1 /*
2 * Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "ci/ciUtilities.hpp"
32 #include "gc/shared/cardTable.hpp"
33 #include "gc/shared/cardTableBarrierSet.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "nativeInst_arm.hpp"
36 #include "oops/compiledICHolder.hpp"
37 #include "oops/oop.inline.hpp"
38 #include "prims/jvmtiExport.hpp"
39 #include "register_arm.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/signature.hpp"
42 #include "runtime/vframeArray.hpp"
43 #include "utilities/align.hpp"
44 #include "vmreg_arm.inline.hpp"
45
46 // Note: Rtemp usage is this file should not impact C2 and should be
47 // correct as long as it is not implicitly used in lower layers (the
48 // arm [macro]assembler) and used with care in the other C1 specific
49 // files.
50
51 // Implementation of StubAssembler
52
53 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
54 mov(R0, Rthread);
55
56 int call_offset = set_last_Java_frame(SP, FP, false, Rtemp);
57
58 call(entry);
59 if (call_offset == -1) { // PC not saved
60 call_offset = offset();
61 }
62 reset_last_Java_frame(Rtemp);
63
64 assert(frame_size() != no_frame_size, "frame must be fixed");
65 if (_stub_id != Runtime1::forward_exception_id) {
66 ldr(R3, Address(Rthread, Thread::pending_exception_offset()));
67 }
68
69 if (oop_result1->is_valid()) {
70 assert_different_registers(oop_result1, R3, Rtemp);
71 get_vm_result(oop_result1, Rtemp);
72 }
73 if (metadata_result->is_valid()) {
74 assert_different_registers(metadata_result, R3, Rtemp);
75 get_vm_result_2(metadata_result, Rtemp);
76 }
77
78 // Check for pending exception
79 // unpack_with_exception_in_tls path is taken through
80 // Runtime1::exception_handler_for_pc
81 if (_stub_id != Runtime1::forward_exception_id) {
82 assert(frame_size() != no_frame_size, "cannot directly call forward_exception_id");
83 cmp(R3, 0);
84 jump(Runtime1::entry_for(Runtime1::forward_exception_id), relocInfo::runtime_call_type, Rtemp, ne);
85 } else {
86 #ifdef ASSERT
87 // Should not have pending exception in forward_exception stub
88 ldr(R3, Address(Rthread, Thread::pending_exception_offset()));
89 cmp(R3, 0);
90 breakpoint(ne);
91 #endif // ASSERT
92 }
93 return call_offset;
94 }
95
96
97 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
98 if (arg1 != R1) {
99 mov(R1, arg1);
100 }
101 return call_RT(oop_result1, metadata_result, entry, 1);
102 }
103
104
105 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
106 assert(arg1 == R1 && arg2 == R2, "cannot handle otherwise");
107 return call_RT(oop_result1, metadata_result, entry, 2);
108 }
109
110
111 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
112 assert(arg1 == R1 && arg2 == R2 && arg3 == R3, "cannot handle otherwise");
113 return call_RT(oop_result1, metadata_result, entry, 3);
114 }
115
116
117 #define __ sasm->
118
119 // TODO: ARM - does this duplicate RegisterSaver in SharedRuntime?
120
121 enum RegisterLayout {
122 fpu_save_size = pd_nof_fpu_regs_reg_alloc,
123 #ifndef __SOFTFP__
124 D0_offset = 0,
125 #endif
126 R0_offset = fpu_save_size,
127 R1_offset,
128 R2_offset,
129 R3_offset,
130 R4_offset,
131 R5_offset,
132 R6_offset,
133 #if (FP_REG_NUM != 7)
134 R7_offset,
135 #endif
136 R8_offset,
137 R9_offset,
138 R10_offset,
139 #if (FP_REG_NUM != 11)
140 R11_offset,
141 #endif
142 R12_offset,
143 FP_offset,
144 LR_offset,
145 reg_save_size,
146 arg1_offset = reg_save_size * wordSize,
147 arg2_offset = (reg_save_size + 1) * wordSize
148 };
149
150
151 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers = HaveVFP) {
152 sasm->set_frame_size(reg_save_size /* in words */);
153
154 // Record saved value locations in an OopMap.
155 // Locations are offsets from sp after runtime call.
156 OopMap* map = new OopMap(VMRegImpl::slots_per_word * reg_save_size, 0);
157
158 int j=0;
159 for (int i = R0_offset; i < R10_offset; i++) {
160 if (j == FP_REG_NUM) {
161 // skip the FP register, saved below
162 j++;
163 }
164 map->set_callee_saved(VMRegImpl::stack2reg(i), as_Register(j)->as_VMReg());
165 j++;
166 }
167 assert(j == R10->encoding(), "must be");
168 #if (FP_REG_NUM != 11)
169 // add R11, if not saved as FP
170 map->set_callee_saved(VMRegImpl::stack2reg(R11_offset), R11->as_VMReg());
171 #endif
172 map->set_callee_saved(VMRegImpl::stack2reg(FP_offset), FP->as_VMReg());
173 map->set_callee_saved(VMRegImpl::stack2reg(LR_offset), LR->as_VMReg());
174
175 if (save_fpu_registers) {
176 for (int i = 0; i < fpu_save_size; i++) {
177 map->set_callee_saved(VMRegImpl::stack2reg(i), as_FloatRegister(i)->as_VMReg());
178 }
179 }
180
181 return map;
182 }
183
184 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = HaveVFP) {
185 __ block_comment("save_live_registers");
186 sasm->set_frame_size(reg_save_size /* in words */);
187
188 __ push(RegisterSet(FP) | RegisterSet(LR));
189 __ push(RegisterSet(R0, R6) | RegisterSet(R8, R10) | R12 | altFP_7_11);
190 if (save_fpu_registers) {
191 __ fstmdbd(SP, FloatRegisterSet(D0, fpu_save_size / 2), writeback);
192 } else {
193 __ sub(SP, SP, fpu_save_size * wordSize);
194 }
195
196 return generate_oop_map(sasm, save_fpu_registers);
197 }
198
199
200 static void restore_live_registers(StubAssembler* sasm,
201 bool restore_R0,
202 bool restore_FP_LR,
203 bool do_return,
204 bool restore_fpu_registers = HaveVFP) {
205 __ block_comment("restore_live_registers");
206
207 if (restore_fpu_registers) {
208 __ fldmiad(SP, FloatRegisterSet(D0, fpu_save_size / 2), writeback);
209 if (!restore_R0) {
210 __ add(SP, SP, (R1_offset - fpu_save_size) * wordSize);
211 }
212 } else {
213 __ add(SP, SP, (restore_R0 ? fpu_save_size : R1_offset) * wordSize);
214 }
215 __ pop(RegisterSet((restore_R0 ? R0 : R1), R6) | RegisterSet(R8, R10) | R12 | altFP_7_11);
216 if (restore_FP_LR) {
217 __ pop(RegisterSet(FP) | RegisterSet(do_return ? PC : LR));
218 } else {
219 assert (!do_return, "return without restoring FP/LR");
220 }
221 }
222
223
224 static void restore_live_registers_except_R0(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
225 restore_live_registers(sasm, false, true, true, restore_fpu_registers);
226 }
227
228 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
229 restore_live_registers(sasm, true, true, true, restore_fpu_registers);
230 }
231
232 static void restore_live_registers_except_FP_LR(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
233 restore_live_registers(sasm, true, false, false, restore_fpu_registers);
234 }
235
236 static void restore_live_registers_without_return(StubAssembler* sasm, bool restore_fpu_registers = HaveVFP) {
237 restore_live_registers(sasm, true, true, false, restore_fpu_registers);
238 }
239
240 void StubAssembler::save_live_registers() {
241 ::save_live_registers(this);
242 }
243
244 void StubAssembler::restore_live_registers_without_return() {
245 ::restore_live_registers_without_return(this);
246 }
247
248 void Runtime1::initialize_pd() {
249 }
250
251
252 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
253 OopMap* oop_map = save_live_registers(sasm);
254
255 int call_offset;
256 if (has_argument) {
257 __ ldr(R1, Address(SP, arg1_offset));
258 __ ldr(R2, Address(SP, arg2_offset));
259 call_offset = __ call_RT(noreg, noreg, target, R1, R2);
260 } else {
261 call_offset = __ call_RT(noreg, noreg, target);
262 }
263
264 OopMapSet* oop_maps = new OopMapSet();
265 oop_maps->add_gc_map(call_offset, oop_map);
266
267 DEBUG_ONLY(STOP("generate_exception_throw");) // Should not reach here
268 return oop_maps;
269 }
270
271
272 static void restore_sp_for_method_handle(StubAssembler* sasm) {
273 // Restore SP from its saved reg (FP) if the exception PC is a MethodHandle call site.
274 __ ldr_s32(Rtemp, Address(Rthread, JavaThread::is_method_handle_return_offset()));
275 __ cmp(Rtemp, 0);
276 __ mov(SP, Rmh_SP_save, ne);
277 }
278
279
280 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
281 __ block_comment("generate_handle_exception");
282
283 bool save_fpu_registers = false;
284
285 // Save registers, if required.
286 OopMapSet* oop_maps = new OopMapSet();
287 OopMap* oop_map = NULL;
288
289 switch (id) {
290 case forward_exception_id: {
291 save_fpu_registers = HaveVFP;
292 oop_map = generate_oop_map(sasm);
293 __ ldr(Rexception_obj, Address(Rthread, Thread::pending_exception_offset()));
294 __ ldr(Rexception_pc, Address(SP, LR_offset * wordSize));
295 Register zero = __ zero_register(Rtemp);
296 __ str(zero, Address(Rthread, Thread::pending_exception_offset()));
297 break;
298 }
299 case handle_exception_id:
300 save_fpu_registers = HaveVFP;
301 // fall-through
302 case handle_exception_nofpu_id:
303 // At this point all registers MAY be live.
304 oop_map = save_live_registers(sasm, save_fpu_registers);
305 break;
306 case handle_exception_from_callee_id:
307 // At this point all registers except exception oop (R4/R19) and
308 // exception pc (R5/R20) are dead.
309 oop_map = save_live_registers(sasm); // TODO it's not required to save all registers
310 break;
311 default: ShouldNotReachHere();
312 }
313
314 __ str(Rexception_obj, Address(Rthread, JavaThread::exception_oop_offset()));
315 __ str(Rexception_pc, Address(Rthread, JavaThread::exception_pc_offset()));
316
317 __ str(Rexception_pc, Address(SP, LR_offset * wordSize)); // patch throwing pc into return address
318
319 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
320 oop_maps->add_gc_map(call_offset, oop_map);
321
322 // Exception handler found
323 __ str(R0, Address(SP, LR_offset * wordSize)); // patch the return address
324
325 // Restore the registers that were saved at the beginning, remove
326 // frame and jump to the exception handler.
327 switch (id) {
328 case forward_exception_id:
329 case handle_exception_nofpu_id:
330 case handle_exception_id:
331 restore_live_registers(sasm, save_fpu_registers);
332 // Note: the restore live registers includes the jump to LR (patched to R0)
333 break;
334 case handle_exception_from_callee_id:
335 restore_live_registers_without_return(sasm); // must not jump immediatly to handler
336 restore_sp_for_method_handle(sasm);
337 __ ret();
338 break;
339 default: ShouldNotReachHere();
340 }
341
342 DEBUG_ONLY(STOP("generate_handle_exception");) // Should not reach here
343
344 return oop_maps;
345 }
346
347
348 void Runtime1::generate_unwind_exception(StubAssembler* sasm) {
349 // FP no longer used to find the frame start
350 // on entry, remove_frame() has already been called (restoring FP and LR)
351
352 // search the exception handler address of the caller (using the return address)
353 __ mov(c_rarg0, Rthread);
354 __ mov(Rexception_pc, LR);
355 __ mov(c_rarg1, LR);
356 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), c_rarg0, c_rarg1);
357
358 // Exception oop should be still in Rexception_obj and pc in Rexception_pc
359 // Jump to handler
360 __ verify_not_null_oop(Rexception_obj);
361
362 // JSR292 extension
363 restore_sp_for_method_handle(sasm);
364
365 __ jump(R0);
366 }
367
368
369 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
370 OopMap* oop_map = save_live_registers(sasm);
371
372 // call the runtime patching routine, returns non-zero if nmethod got deopted.
373 int call_offset = __ call_RT(noreg, noreg, target);
374 OopMapSet* oop_maps = new OopMapSet();
375 oop_maps->add_gc_map(call_offset, oop_map);
376
377 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
378 assert(deopt_blob != NULL, "deoptimization blob must have been created");
379
380 __ cmp_32(R0, 0);
381
382 restore_live_registers_except_FP_LR(sasm);
383 __ pop(RegisterSet(FP) | RegisterSet(PC), eq);
384
385 // Deoptimization needed
386 // TODO: ARM - no need to restore FP & LR because unpack_with_reexecution() stores them back
387 __ pop(RegisterSet(FP) | RegisterSet(LR));
388
389 __ jump(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type, Rtemp);
390
391 DEBUG_ONLY(STOP("generate_patching");) // Should not reach here
392 return oop_maps;
393 }
394
395
396 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
397 const bool must_gc_arguments = true;
398 const bool dont_gc_arguments = false;
399
400 OopMapSet* oop_maps = NULL;
401 bool save_fpu_registers = HaveVFP;
402
403 switch (id) {
404 case forward_exception_id:
405 {
406 oop_maps = generate_handle_exception(id, sasm);
407 // does not return on ARM
408 }
409 break;
410
411 case new_instance_id:
412 case fast_new_instance_id:
413 case fast_new_instance_init_check_id:
414 {
415 const Register result = R0;
416 const Register klass = R1;
417
418 // If TLAB is disabled, see if there is support for inlining contiguous
419 // allocations.
420 // Otherwise, just go to the slow path.
421 if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc() && id != new_instance_id) {
422 Label slow_case, slow_case_no_pop;
423
424 // Make sure the class is fully initialized
425 if (id == fast_new_instance_init_check_id) {
426 __ ldrb(result, Address(klass, InstanceKlass::init_state_offset()));
427 __ cmp(result, InstanceKlass::fully_initialized);
428 __ b(slow_case_no_pop, ne);
429 }
430
431 // Free some temporary registers
432 const Register obj_size = R4;
433 const Register tmp1 = R5;
434 const Register tmp2 = LR;
435 const Register obj_end = Rtemp;
436
437 __ raw_push(R4, R5, LR);
438
439 __ ldr_u32(obj_size, Address(klass, Klass::layout_helper_offset()));
440 __ eden_allocate(result, obj_end, tmp1, tmp2, obj_size, slow_case); // initializes result and obj_end
441 __ incr_allocated_bytes(obj_size, tmp2);
442 __ initialize_object(result, obj_end, klass, noreg /* len */, tmp1, tmp2,
443 instanceOopDesc::header_size() * HeapWordSize, -1,
444 /* is_tlab_allocated */ false);
445 __ raw_pop_and_ret(R4, R5);
446
447 __ bind(slow_case);
448 __ raw_pop(R4, R5, LR);
449
450 __ bind(slow_case_no_pop);
451 }
452
453 OopMap* map = save_live_registers(sasm);
454 int call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
455 oop_maps = new OopMapSet();
456 oop_maps->add_gc_map(call_offset, map);
457
458 // MacroAssembler::StoreStore useless (included in the runtime exit path)
459
460 restore_live_registers_except_R0(sasm);
461 }
462 break;
463
464 case counter_overflow_id:
465 {
466 OopMap* oop_map = save_live_registers(sasm);
467 __ ldr(R1, Address(SP, arg1_offset));
468 __ ldr(R2, Address(SP, arg2_offset));
469 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), R1, R2);
470 oop_maps = new OopMapSet();
471 oop_maps->add_gc_map(call_offset, oop_map);
472 restore_live_registers(sasm);
473 }
474 break;
475
476 case new_type_array_id:
477 case new_object_array_id:
478 {
479 if (id == new_type_array_id) {
480 __ set_info("new_type_array", dont_gc_arguments);
481 } else {
482 __ set_info("new_object_array", dont_gc_arguments);
483 }
484
485 const Register result = R0;
486 const Register klass = R1;
487 const Register length = R2;
488
489 // If TLAB is disabled, see if there is support for inlining contiguous
490 // allocations.
491 // Otherwise, just go to the slow path.
492 if (!UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
493 Label slow_case, slow_case_no_pop;
494
495 __ cmp_32(length, C1_MacroAssembler::max_array_allocation_length);
496 __ b(slow_case_no_pop, hs);
497
498 // Free some temporary registers
499 const Register arr_size = R4;
500 const Register tmp1 = R5;
501 const Register tmp2 = LR;
502 const Register tmp3 = Rtemp;
503 const Register obj_end = tmp3;
504
505 __ raw_push(R4, R5, LR);
506
507 // Get the allocation size: round_up((length << (layout_helper & 0xff)) + header_size)
508 __ ldr_u32(tmp1, Address(klass, Klass::layout_helper_offset()));
509 __ mov(arr_size, MinObjAlignmentInBytesMask);
510 __ and_32(tmp2, tmp1, (unsigned int)(Klass::_lh_header_size_mask << Klass::_lh_header_size_shift));
511
512 __ add(arr_size, arr_size, AsmOperand(length, lsl, tmp1));
513
514 __ add(arr_size, arr_size, AsmOperand(tmp2, lsr, Klass::_lh_header_size_shift));
515 __ align_reg(arr_size, arr_size, MinObjAlignmentInBytes);
516
517 // eden_allocate destroys tmp2, so reload header_size after allocation
518 // eden_allocate initializes result and obj_end
519 __ eden_allocate(result, obj_end, tmp1, tmp2, arr_size, slow_case);
520 __ incr_allocated_bytes(arr_size, tmp2);
521 __ ldrb(tmp2, Address(klass, in_bytes(Klass::layout_helper_offset()) +
522 Klass::_lh_header_size_shift / BitsPerByte));
523 __ initialize_object(result, obj_end, klass, length, tmp1, tmp2, tmp2, -1, /* is_tlab_allocated */ false);
524 __ raw_pop_and_ret(R4, R5);
525
526 __ bind(slow_case);
527 __ raw_pop(R4, R5, LR);
528 __ bind(slow_case_no_pop);
529 }
530
531 OopMap* map = save_live_registers(sasm);
532 int call_offset;
533 if (id == new_type_array_id) {
534 call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
535 } else {
536 call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
537 }
538 oop_maps = new OopMapSet();
539 oop_maps->add_gc_map(call_offset, map);
540
541 // MacroAssembler::StoreStore useless (included in the runtime exit path)
542
543 restore_live_registers_except_R0(sasm);
544 }
545 break;
546
547 case new_multi_array_id:
548 {
549 __ set_info("new_multi_array", dont_gc_arguments);
550
551 // R0: klass
552 // R2: rank
553 // SP: address of 1st dimension
554 const Register result = R0;
555 OopMap* map = save_live_registers(sasm);
556
557 __ mov(R1, R0);
558 __ add(R3, SP, arg1_offset);
559 int call_offset = __ call_RT(result, noreg, CAST_FROM_FN_PTR(address, new_multi_array), R1, R2, R3);
560
561 oop_maps = new OopMapSet();
562 oop_maps->add_gc_map(call_offset, map);
563
564 // MacroAssembler::StoreStore useless (included in the runtime exit path)
565
566 restore_live_registers_except_R0(sasm);
567 }
568 break;
569
570 case register_finalizer_id:
571 {
572 __ set_info("register_finalizer", dont_gc_arguments);
573
574 // Do not call runtime if JVM_ACC_HAS_FINALIZER flag is not set
575 __ load_klass(Rtemp, R0);
576 __ ldr_u32(Rtemp, Address(Rtemp, Klass::access_flags_offset()));
577
578 __ tst(Rtemp, JVM_ACC_HAS_FINALIZER);
579 __ bx(LR, eq);
580
581 // Call VM
582 OopMap* map = save_live_registers(sasm);
583 oop_maps = new OopMapSet();
584 int call_offset = __ call_RT(noreg, noreg,
585 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), R0);
586 oop_maps->add_gc_map(call_offset, map);
587 restore_live_registers(sasm);
588 }
589 break;
590
591 case throw_range_check_failed_id:
592 {
593 __ set_info("range_check_failed", dont_gc_arguments);
594 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
595 }
596 break;
597
598 case throw_index_exception_id:
599 {
600 __ set_info("index_range_check_failed", dont_gc_arguments);
601 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
602 }
603 break;
604
605 case throw_div0_exception_id:
606 {
607 __ set_info("throw_div0_exception", dont_gc_arguments);
608 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
609 }
610 break;
611
612 case throw_null_pointer_exception_id:
613 {
614 __ set_info("throw_null_pointer_exception", dont_gc_arguments);
615 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
616 }
617 break;
618
619 case handle_exception_nofpu_id:
620 case handle_exception_id:
621 {
622 __ set_info("handle_exception", dont_gc_arguments);
623 oop_maps = generate_handle_exception(id, sasm);
624 }
625 break;
626
627 case handle_exception_from_callee_id:
628 {
629 __ set_info("handle_exception_from_callee", dont_gc_arguments);
630 oop_maps = generate_handle_exception(id, sasm);
631 }
632 break;
633
634 case unwind_exception_id:
635 {
636 __ set_info("unwind_exception", dont_gc_arguments);
637 generate_unwind_exception(sasm);
638 }
639 break;
640
641 case throw_array_store_exception_id:
642 {
643 __ set_info("throw_array_store_exception", dont_gc_arguments);
644 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
645 }
646 break;
647
648 case throw_class_cast_exception_id:
649 {
650 __ set_info("throw_class_cast_exception", dont_gc_arguments);
651 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
652 }
653 break;
654
655 case throw_incompatible_class_change_error_id:
656 {
657 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
658 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
659 }
660 break;
661
662 case slow_subtype_check_id:
663 {
664 // (in) R0 - sub, destroyed,
665 // (in) R1 - super, not changed
666 // (out) R0 - result: 1 if check passed, 0 otherwise
667 __ raw_push(R2, R3, LR);
668
669 // Load an array of secondary_supers
670 __ ldr(R2, Address(R0, Klass::secondary_supers_offset()));
671 // Length goes to R3
672 __ ldr_s32(R3, Address(R2, Array<Klass*>::length_offset_in_bytes()));
673 __ add(R2, R2, Array<Klass*>::base_offset_in_bytes());
674
675 Label loop, miss;
676 __ bind(loop);
677 __ cbz(R3, miss);
678 __ ldr(LR, Address(R2, wordSize, post_indexed));
679 __ sub(R3, R3, 1);
680 __ cmp(LR, R1);
681 __ b(loop, ne);
682
683 // We get here if an equal cache entry is found
684 __ str(R1, Address(R0, Klass::secondary_super_cache_offset()));
685 __ mov(R0, 1);
686 __ raw_pop_and_ret(R2, R3);
687
688 // A cache entry not found - return false
689 __ bind(miss);
690 __ mov(R0, 0);
691 __ raw_pop_and_ret(R2, R3);
692 }
693 break;
694
695 case monitorenter_nofpu_id:
696 save_fpu_registers = false;
697 // fall through
698 case monitorenter_id:
699 {
700 __ set_info("monitorenter", dont_gc_arguments);
701 const Register obj = R1;
702 const Register lock = R2;
703 OopMap* map = save_live_registers(sasm, save_fpu_registers);
704 __ ldr(obj, Address(SP, arg1_offset));
705 __ ldr(lock, Address(SP, arg2_offset));
706 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), obj, lock);
707 oop_maps = new OopMapSet();
708 oop_maps->add_gc_map(call_offset, map);
709 restore_live_registers(sasm, save_fpu_registers);
710 }
711 break;
712
713 case monitorexit_nofpu_id:
714 save_fpu_registers = false;
715 // fall through
716 case monitorexit_id:
717 {
718 __ set_info("monitorexit", dont_gc_arguments);
719 const Register lock = R1;
720 OopMap* map = save_live_registers(sasm, save_fpu_registers);
721 __ ldr(lock, Address(SP, arg1_offset));
722 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), lock);
723 oop_maps = new OopMapSet();
724 oop_maps->add_gc_map(call_offset, map);
725 restore_live_registers(sasm, save_fpu_registers);
726 }
727 break;
728
729 case deoptimize_id:
730 {
731 __ set_info("deoptimize", dont_gc_arguments);
732 OopMap* oop_map = save_live_registers(sasm);
733 const Register trap_request = R1;
734 __ ldr(trap_request, Address(SP, arg1_offset));
735 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), trap_request);
736 oop_maps = new OopMapSet();
737 oop_maps->add_gc_map(call_offset, oop_map);
738 restore_live_registers_without_return(sasm);
739 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
740 assert(deopt_blob != NULL, "deoptimization blob must have been created");
741 __ jump(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type, noreg);
742 }
743 break;
744
745 case access_field_patching_id:
746 {
747 __ set_info("access_field_patching", dont_gc_arguments);
748 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
749 }
750 break;
751
752 case load_klass_patching_id:
753 {
754 __ set_info("load_klass_patching", dont_gc_arguments);
755 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
756 }
757 break;
758
759 case load_appendix_patching_id:
760 {
761 __ set_info("load_appendix_patching", dont_gc_arguments);
762 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
763 }
764 break;
765
766 case load_mirror_patching_id:
767 {
768 __ set_info("load_mirror_patching", dont_gc_arguments);
769 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
770 }
771 break;
772
773 case predicate_failed_trap_id:
774 {
775 __ set_info("predicate_failed_trap", dont_gc_arguments);
776
777 OopMap* oop_map = save_live_registers(sasm);
778 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
779
780 oop_maps = new OopMapSet();
781 oop_maps->add_gc_map(call_offset, oop_map);
782
783 restore_live_registers_without_return(sasm);
784
785 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
786 assert(deopt_blob != NULL, "deoptimization blob must have been created");
787 __ jump(deopt_blob->unpack_with_reexecution(), relocInfo::runtime_call_type, Rtemp);
788 }
789 break;
790
791 default:
792 {
793 __ set_info("unimplemented entry", dont_gc_arguments);
794 STOP("unimplemented entry");
795 }
796 break;
797 }
798 return oop_maps;
799 }
800
801 #undef __
802
803 #ifdef __SOFTFP__
804 const char *Runtime1::pd_name_for_address(address entry) {
805
806 #define FUNCTION_CASE(a, f) \
807 if ((intptr_t)a == CAST_FROM_FN_PTR(intptr_t, f)) return #f
808
809 FUNCTION_CASE(entry, __aeabi_fadd_glibc);
810 FUNCTION_CASE(entry, __aeabi_fmul);
811 FUNCTION_CASE(entry, __aeabi_fsub_glibc);
812 FUNCTION_CASE(entry, __aeabi_fdiv);
813
814 // __aeabi_XXXX_glibc: Imported code from glibc soft-fp bundle for calculation accuracy improvement. See CR 6757269.
815 FUNCTION_CASE(entry, __aeabi_dadd_glibc);
816 FUNCTION_CASE(entry, __aeabi_dmul);
817 FUNCTION_CASE(entry, __aeabi_dsub_glibc);
818 FUNCTION_CASE(entry, __aeabi_ddiv);
819
820 FUNCTION_CASE(entry, __aeabi_f2d);
821 FUNCTION_CASE(entry, __aeabi_d2f);
822 FUNCTION_CASE(entry, __aeabi_i2f);
823 FUNCTION_CASE(entry, __aeabi_i2d);
824 FUNCTION_CASE(entry, __aeabi_f2iz);
825
826 FUNCTION_CASE(entry, SharedRuntime::fcmpl);
827 FUNCTION_CASE(entry, SharedRuntime::fcmpg);
828 FUNCTION_CASE(entry, SharedRuntime::dcmpl);
829 FUNCTION_CASE(entry, SharedRuntime::dcmpg);
830
831 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmplt);
832 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmplt);
833 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmple);
834 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmple);
835 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmpge);
836 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmpge);
837 FUNCTION_CASE(entry, SharedRuntime::unordered_fcmpgt);
838 FUNCTION_CASE(entry, SharedRuntime::unordered_dcmpgt);
839
840 FUNCTION_CASE(entry, SharedRuntime::fneg);
841 FUNCTION_CASE(entry, SharedRuntime::dneg);
842
843 FUNCTION_CASE(entry, __aeabi_fcmpeq);
844 FUNCTION_CASE(entry, __aeabi_fcmplt);
845 FUNCTION_CASE(entry, __aeabi_fcmple);
846 FUNCTION_CASE(entry, __aeabi_fcmpge);
847 FUNCTION_CASE(entry, __aeabi_fcmpgt);
848
849 FUNCTION_CASE(entry, __aeabi_dcmpeq);
850 FUNCTION_CASE(entry, __aeabi_dcmplt);
851 FUNCTION_CASE(entry, __aeabi_dcmple);
852 FUNCTION_CASE(entry, __aeabi_dcmpge);
853 FUNCTION_CASE(entry, __aeabi_dcmpgt);
854 #undef FUNCTION_CASE
855 return "";
856 }
857 #else // __SOFTFP__
858 const char *Runtime1::pd_name_for_address(address entry) {
859 return "<unknown function>";
860 }
861 #endif // __SOFTFP__