src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp
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src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp

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  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "gc/shared/barrierSetAssembler.hpp"
  27 
  28 #define __ masm->
  29 
  30 void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  31                                   Register dst, Address src, Register tmp1, Register tmp2, Register tmp3) {
  32   bool in_heap = (decorators & IN_HEAP) != 0;
  33   bool in_native = (decorators & IN_NATIVE) != 0;
  34   switch (type) {
  35   case T_OBJECT:
  36   case T_ARRAY: {
  37     if (in_heap) {
  38 #ifdef AARCH64
  39       if (UseCompressedOops) {
  40         __ ldr_w(dst, src);
  41         __ decode_heap_oop(dst);
  42       } else
  43 #endif // AARCH64
  44       {
  45         __ ldr(dst, src);
  46       }
  47     } else {
  48       assert(in_native, "why else?");
  49       __ ldr(dst, src);
  50     }
  51     break;
  52   }
  53   case T_BOOLEAN: __ ldrb      (dst, src); break;
  54   case T_BYTE:    __ ldrsb     (dst, src); break;
  55   case T_CHAR:    __ ldrh      (dst, src); break;
  56   case T_SHORT:   __ ldrsh     (dst, src); break;
  57   case T_INT:     __ ldr_s32   (dst, src); break;
  58   case T_ADDRESS: __ ldr       (dst, src); break;
  59   case T_LONG:
  60 #ifdef AARCH64
  61     __ ldr                     (dst, src); break;
  62 #else
  63     assert(dst == noreg, "only to ltos");
  64     __ add                     (src.index(), src.index(), src.base());
  65     __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
  66 #endif // AARCH64
  67     break;
  68 #ifdef __SOFTFP__
  69   case T_FLOAT:
  70     assert(dst == noreg, "only to ftos");
  71     __ ldr                     (R0_tos, src);
  72     break;
  73   case T_DOUBLE:
  74     assert(dst == noreg, "only to dtos");
  75     __ add                     (src.index(), src.index(), src.base());
  76     __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
  77     break;
  78 #else
  79   case T_FLOAT:
  80     assert(dst == noreg, "only to ftos");
  81     __ add(src.index(), src.index(), src.base());
  82     __ ldr_float               (S0_tos, src.index());
  83     break;
  84   case T_DOUBLE:
  85     assert(dst == noreg, "only to dtos");
  86     __ add                     (src.index(), src.index(), src.base());
  87     __ ldr_double              (D0_tos, src.index());
  88     break;
  89 #endif
  90   default: Unimplemented();
  91   }
  92 
  93 }
  94 
  95 void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  96                                    Address obj, Register val, Register tmp1, Register tmp2, Register tmp3, bool is_null) {
  97   bool in_heap = (decorators & IN_HEAP) != 0;
  98   bool in_native = (decorators & IN_NATIVE) != 0;
  99   switch (type) {
 100   case T_OBJECT:
 101   case T_ARRAY: {
 102     if (in_heap) {
 103 #ifdef AARCH64
 104       if (UseCompressedOops) {
 105         assert(!dst.uses(src), "not enough registers");
 106         if (!is_null) {
 107           __ encode_heap_oop(src);
 108         }
 109         __ str_w(val, obj);
 110       } else
 111 #endif // AARCH64
 112       {
 113       __ str(val, obj);
 114       }
 115     } else {
 116       assert(in_native, "why else?");
 117       __ str(val, obj);
 118     }
 119     break;
 120   }
 121   case T_BOOLEAN:
 122     __ and_32(val, val, 1);
 123     __ strb(val, obj);
 124     break;
 125   case T_BYTE:    __ strb      (val, obj); break;
 126   case T_CHAR:    __ strh      (val, obj); break;
 127   case T_SHORT:   __ strh      (val, obj); break;
 128   case T_INT:     __ str       (val, obj); break;
 129   case T_ADDRESS: __ str       (val, obj); break;
 130   case T_LONG:
 131 #ifdef AARCH64
 132     __ str                     (val, obj); break;
 133 #else // AARCH64
 134     assert(val == noreg, "only tos");
 135     __ add                     (obj.index(), obj.index(), obj.base());
 136     __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
 137 #endif // AARCH64
 138     break;
 139 #ifdef __SOFTFP__
 140   case T_FLOAT:
 141     assert(val == noreg, "only tos");
 142     __ str (R0_tos,  obj);
 143     break;
 144   case T_DOUBLE:
 145     assert(val == noreg, "only tos");
 146     __ add                     (obj.index(), obj.index(), obj.base());
 147     __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
 148     break;
 149 #else
 150   case T_FLOAT:
 151     assert(val == noreg, "only tos");
 152     __ add                     (obj.index(), obj.index(), obj.base());
 153     __ str_float               (S0_tos,  obj.index());
 154     break;
 155   case T_DOUBLE:
 156     assert(val == noreg, "only tos");
 157     __ add                     (obj.index(), obj.index(), obj.base());


  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "gc/shared/barrierSetAssembler.hpp"
  27 
  28 #define __ masm->
  29 
  30 void BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  31                                   Register dst, Address src, Register tmp1, Register tmp2, Register tmp3) {
  32   bool in_heap = (decorators & IN_HEAP) != 0;
  33   bool in_native = (decorators & IN_NATIVE) != 0;
  34   switch (type) {
  35   case T_OBJECT:
  36   case T_ARRAY: {
  37     if (in_heap) {






  38       {
  39         __ ldr(dst, src);
  40       }
  41     } else {
  42       assert(in_native, "why else?");
  43       __ ldr(dst, src);
  44     }
  45     break;
  46   }
  47   case T_BOOLEAN: __ ldrb      (dst, src); break;
  48   case T_BYTE:    __ ldrsb     (dst, src); break;
  49   case T_CHAR:    __ ldrh      (dst, src); break;
  50   case T_SHORT:   __ ldrsh     (dst, src); break;
  51   case T_INT:     __ ldr_s32   (dst, src); break;
  52   case T_ADDRESS: __ ldr       (dst, src); break;
  53   case T_LONG:



  54     assert(dst == noreg, "only to ltos");
  55     __ add                     (src.index(), src.index(), src.base());
  56     __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));

  57     break;
  58 #ifdef __SOFTFP__
  59   case T_FLOAT:
  60     assert(dst == noreg, "only to ftos");
  61     __ ldr                     (R0_tos, src);
  62     break;
  63   case T_DOUBLE:
  64     assert(dst == noreg, "only to dtos");
  65     __ add                     (src.index(), src.index(), src.base());
  66     __ ldmia                   (src.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
  67     break;
  68 #else
  69   case T_FLOAT:
  70     assert(dst == noreg, "only to ftos");
  71     __ add(src.index(), src.index(), src.base());
  72     __ ldr_float               (S0_tos, src.index());
  73     break;
  74   case T_DOUBLE:
  75     assert(dst == noreg, "only to dtos");
  76     __ add                     (src.index(), src.index(), src.base());
  77     __ ldr_double              (D0_tos, src.index());
  78     break;
  79 #endif
  80   default: Unimplemented();
  81   }
  82 
  83 }
  84 
  85 void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  86                                    Address obj, Register val, Register tmp1, Register tmp2, Register tmp3, bool is_null) {
  87   bool in_heap = (decorators & IN_HEAP) != 0;
  88   bool in_native = (decorators & IN_NATIVE) != 0;
  89   switch (type) {
  90   case T_OBJECT:
  91   case T_ARRAY: {
  92     if (in_heap) {









  93       {
  94       __ str(val, obj);
  95       }
  96     } else {
  97       assert(in_native, "why else?");
  98       __ str(val, obj);
  99     }
 100     break;
 101   }
 102   case T_BOOLEAN:
 103     __ and_32(val, val, 1);
 104     __ strb(val, obj);
 105     break;
 106   case T_BYTE:    __ strb      (val, obj); break;
 107   case T_CHAR:    __ strh      (val, obj); break;
 108   case T_SHORT:   __ strh      (val, obj); break;
 109   case T_INT:     __ str       (val, obj); break;
 110   case T_ADDRESS: __ str       (val, obj); break;
 111   case T_LONG:



 112     assert(val == noreg, "only tos");
 113     __ add                     (obj.index(), obj.index(), obj.base());
 114     __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));

 115     break;
 116 #ifdef __SOFTFP__
 117   case T_FLOAT:
 118     assert(val == noreg, "only tos");
 119     __ str (R0_tos,  obj);
 120     break;
 121   case T_DOUBLE:
 122     assert(val == noreg, "only tos");
 123     __ add                     (obj.index(), obj.index(), obj.base());
 124     __ stmia                   (obj.index(), RegisterSet(R0_tos_lo) | RegisterSet(R1_tos_hi));
 125     break;
 126 #else
 127   case T_FLOAT:
 128     assert(val == noreg, "only tos");
 129     __ add                     (obj.index(), obj.index(), obj.base());
 130     __ str_float               (S0_tos,  obj.index());
 131     break;
 132   case T_DOUBLE:
 133     assert(val == noreg, "only tos");
 134     __ add                     (obj.index(), obj.index(), obj.base());
src/hotspot/cpu/arm/gc/shared/barrierSetAssembler_arm.cpp
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