src/hotspot/cpu/arm/gc/shared/cardTableBarrierSetAssembler_arm.cpp
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*** old/src/hotspot/cpu/arm/gc/shared/cardTableBarrierSetAssembler_arm.cpp Mon Sep 17 10:30:01 2018
--- new/src/hotspot/cpu/arm/gc/shared/cardTableBarrierSetAssembler_arm.cpp Mon Sep 17 10:30:00 2018
*** 117,127 ****
--- 117,126 ----
showed that loading of card table base from thread descriptor is
7-18% slower compared to loading of literal embedded into the code.
Possible cause is a cache miss (card table base address resides in a
rarely accessed area of thread descriptor).
*/
// TODO-AARCH64 Investigate if mov_slow is faster than ldr from Rthread on AArch64
__ mov_address(card_table_base, (address)ct->byte_map_base(), symbolic_Relocation::card_table_reference);
}
// The 2nd part of the store check.
void CardTableBarrierSetAssembler::store_check_part2(MacroAssembler* masm, Register obj, Register card_table_base, Register tmp) {
*** 134,149 ****
--- 133,143 ----
CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
CardTable* ct = ctbs->card_table();
assert(sizeof(*ct->byte_map_base()) == sizeof(jbyte), "Adjust store check code");
assert(CardTable::dirty_card_val() == 0, "Dirty card value must be 0 due to optimizations.");
#ifdef AARCH64
add(card_table_base, card_table_base, AsmOperand(obj, lsr, CardTable::card_shift));
Address card_table_addr(card_table_base);
#else
Address card_table_addr(card_table_base, obj, lsr, CardTable::card_shift);
#endif
if (UseCondCardMark) {
if (ct->scanned_concurrently()) {
__ membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad), noreg);
}
*** 162,174 ****
--- 156,165 ----
set_card(masm, card_table_base, card_table_addr, tmp);
}
}
void CardTableBarrierSetAssembler::set_card(MacroAssembler* masm, Register card_table_base, Address card_table_addr, Register tmp) {
#ifdef AARCH64
strb(ZR, card_table_addr);
#else
CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set());
CardTable* ct = ctbs->card_table();
if ((((uintptr_t)ct->byte_map_base() & 0xff) == 0)) {
// Card table is aligned so the lowest byte of the table address base is zero.
// This works only if the code is not saved for later use, possibly
*** 176,182 ****
--- 167,172 ----
__ strb(card_table_base, card_table_addr);
} else {
__ mov(tmp, 0);
__ strb(tmp, card_table_addr);
}
#endif // AARCH64
}
src/hotspot/cpu/arm/gc/shared/cardTableBarrierSetAssembler_arm.cpp
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