1 /*
   2  * Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/cardTableModRefBS.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_arm.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 void LIRItem::load_byte_item() {
  48   load_item();
  49 }
  50 
  51 void LIRItem::load_nonconstant() {
  52   LIR_Opr r = value()->operand();
  53   if (_gen->can_inline_as_constant(value())) {
  54     assert(r->is_constant(), "should be");
  55     _result = r;
  56   } else {
  57     load_item();
  58   }
  59 }
  60 
  61 //--------------------------------------------------------------
  62 //               LIRGenerator
  63 //--------------------------------------------------------------
  64 
  65 
  66 LIR_Opr LIRGenerator::exceptionOopOpr() {
  67   return FrameMap::Exception_oop_opr;
  68 }
  69 
  70 LIR_Opr LIRGenerator::exceptionPcOpr()  {
  71   return FrameMap::Exception_pc_opr;
  72 }
  73 
  74 LIR_Opr LIRGenerator::syncLockOpr()     {
  75   return new_register(T_INT);
  76 }
  77 
  78 LIR_Opr LIRGenerator::syncTempOpr()     {
  79   return new_register(T_OBJECT);
  80 }
  81 
  82 LIR_Opr LIRGenerator::getThreadTemp()   {
  83   return LIR_OprFact::illegalOpr;
  84 }
  85 
  86 LIR_Opr LIRGenerator::atomicLockOpr() {
  87   return LIR_OprFact::illegalOpr;
  88 }
  89 
  90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  91   LIR_Opr opr;
  92   switch (type->tag()) {
  93     case intTag:     opr = FrameMap::Int_result_opr;    break;
  94     case objectTag:  opr = FrameMap::Object_result_opr; break;
  95     case longTag:    opr = FrameMap::Long_result_opr;   break;
  96     case floatTag:   opr = FrameMap::Float_result_opr;  break;
  97     case doubleTag:  opr = FrameMap::Double_result_opr; break;
  98     case addressTag:
  99     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 100   }
 101   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 102   return opr;
 103 }
 104 
 105 
 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 107   return new_register(T_INT);
 108 }
 109 
 110 
 111 //--------- loading items into registers --------------------------------
 112 
 113 
 114 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 115 #ifdef AARCH64
 116   if (v->type()->as_IntConstant() != NULL) {
 117     return v->type()->as_IntConstant()->value() == 0;
 118   } else if (v->type()->as_LongConstant() != NULL) {
 119     return v->type()->as_LongConstant()->value() == 0;
 120   } else if (v->type()->as_ObjectConstant() != NULL) {
 121     return v->type()->as_ObjectConstant()->value()->is_null_object();
 122   } else if (v->type()->as_FloatConstant() != NULL) {
 123     return jint_cast(v->type()->as_FloatConstant()->value()) == 0;
 124   } else if (v->type()->as_DoubleConstant() != NULL) {
 125     return jlong_cast(v->type()->as_DoubleConstant()->value()) == 0;
 126   }
 127 #endif // AARCH64
 128   return false;
 129 }
 130 
 131 
 132 bool LIRGenerator::can_inline_as_constant(Value v) const {
 133   if (v->type()->as_IntConstant() != NULL) {
 134     return Assembler::is_arith_imm_in_range(v->type()->as_IntConstant()->value());
 135   } else if (v->type()->as_ObjectConstant() != NULL) {
 136     return v->type()->as_ObjectConstant()->value()->is_null_object();
 137 #ifdef AARCH64
 138   } else if (v->type()->as_LongConstant() != NULL) {
 139     return Assembler::is_arith_imm_in_range(v->type()->as_LongConstant()->value());
 140 #else
 141   } else if (v->type()->as_FloatConstant() != NULL) {
 142     return v->type()->as_FloatConstant()->value() == 0.0f;
 143   } else if (v->type()->as_DoubleConstant() != NULL) {
 144     return v->type()->as_DoubleConstant()->value() == 0.0;
 145 #endif // AARCH64
 146   }
 147   return false;
 148 }
 149 
 150 
 151 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 152   ShouldNotCallThis(); // Not used on ARM
 153   return false;
 154 }
 155 
 156 
 157 #ifdef AARCH64
 158 
 159 static bool can_inline_as_constant_in_cmp(Value v) {
 160   jlong constant;
 161   if (v->type()->as_IntConstant() != NULL) {
 162     constant = v->type()->as_IntConstant()->value();
 163   } else if (v->type()->as_LongConstant() != NULL) {
 164     constant = v->type()->as_LongConstant()->value();
 165   } else if (v->type()->as_ObjectConstant() != NULL) {
 166     return v->type()->as_ObjectConstant()->value()->is_null_object();
 167   } else if (v->type()->as_FloatConstant() != NULL) {
 168     return v->type()->as_FloatConstant()->value() == 0.0f;
 169   } else if (v->type()->as_DoubleConstant() != NULL) {
 170     return v->type()->as_DoubleConstant()->value() == 0.0;
 171   } else {
 172     return false;
 173   }
 174 
 175   return Assembler::is_arith_imm_in_range(constant) || Assembler::is_arith_imm_in_range(-constant);
 176 }
 177 
 178 
 179 static bool can_inline_as_constant_in_logic(Value v) {
 180   if (v->type()->as_IntConstant() != NULL) {
 181     return Assembler::LogicalImmediate(v->type()->as_IntConstant()->value(), true).is_encoded();
 182   } else if (v->type()->as_LongConstant() != NULL) {
 183     return Assembler::LogicalImmediate(v->type()->as_LongConstant()->value(), false).is_encoded();
 184   }
 185   return false;
 186 }
 187 
 188 
 189 #endif // AARCH64
 190 
 191 
 192 LIR_Opr LIRGenerator::safepoint_poll_register() {
 193   return LIR_OprFact::illegalOpr;
 194 }
 195 
 196 
 197 static LIR_Opr make_constant(BasicType type, jlong c) {
 198   switch (type) {
 199     case T_ADDRESS:
 200     case T_OBJECT:  return LIR_OprFact::intptrConst(c);
 201     case T_LONG:    return LIR_OprFact::longConst(c);
 202     case T_INT:     return LIR_OprFact::intConst(c);
 203     default: ShouldNotReachHere();
 204     return LIR_OprFact::intConst(-1);
 205   }
 206 }
 207 
 208 #ifdef AARCH64
 209 
 210 void LIRGenerator::add_constant(LIR_Opr src, jlong c, LIR_Opr dest) {
 211   if (c == 0) {
 212     __ move(src, dest);
 213     return;
 214   }
 215 
 216   BasicType type = src->type();
 217   bool is_neg = (c < 0);
 218   c = ABS(c);
 219 
 220   if ((c >> 24) == 0) {
 221     for (int shift = 0; shift <= 12; shift += 12) {
 222       int part = ((int)c) & (right_n_bits(12) << shift);
 223       if (part != 0) {
 224         if (is_neg) {
 225           __ sub(src, make_constant(type, part), dest);
 226         } else {
 227           __ add(src, make_constant(type, part), dest);
 228         }
 229         src = dest;
 230       }
 231     }
 232   } else {
 233     __ move(make_constant(type, c), dest);
 234     if (is_neg) {
 235       __ sub(src, dest, dest);
 236     } else {
 237       __ add(src, dest, dest);
 238     }
 239   }
 240 }
 241 
 242 #endif // AARCH64
 243 
 244 
 245 void LIRGenerator::add_large_constant(LIR_Opr src, int c, LIR_Opr dest) {
 246   assert(c != 0, "must be");
 247 #ifdef AARCH64
 248   add_constant(src, c, dest);
 249 #else
 250   // Find first non-zero bit
 251   int shift = 0;
 252   while ((c & (3 << shift)) == 0) {
 253     shift += 2;
 254   }
 255   // Add the least significant part of the constant
 256   int mask = 0xff << shift;
 257   __ add(src, LIR_OprFact::intConst(c & mask), dest);
 258   // Add up to 3 other parts of the constant;
 259   // each of them can be represented as rotated_imm
 260   if (c & (mask << 8)) {
 261     __ add(dest, LIR_OprFact::intConst(c & (mask << 8)), dest);
 262   }
 263   if (c & (mask << 16)) {
 264     __ add(dest, LIR_OprFact::intConst(c & (mask << 16)), dest);
 265   }
 266   if (c & (mask << 24)) {
 267     __ add(dest, LIR_OprFact::intConst(c & (mask << 24)), dest);
 268   }
 269 #endif // AARCH64
 270 }
 271 
 272 static LIR_Address* make_address(LIR_Opr base, LIR_Opr index, LIR_Address::Scale scale, BasicType type) {
 273   return new LIR_Address(base, index, scale, 0, type);
 274 }
 275 
 276 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 277                                             int shift, int disp, BasicType type) {
 278   assert(base->is_register(), "must be");
 279 
 280   if (index->is_constant()) {
 281     disp += index->as_constant_ptr()->as_jint() << shift;
 282     index = LIR_OprFact::illegalOpr;
 283   }
 284 
 285 #ifndef AARCH64
 286   if (base->type() == T_LONG) {
 287     LIR_Opr tmp = new_register(T_INT);
 288     __ convert(Bytecodes::_l2i, base, tmp);
 289     base = tmp;
 290   }
 291   if (index != LIR_OprFact::illegalOpr && index->type() == T_LONG) {
 292     LIR_Opr tmp = new_register(T_INT);
 293     __ convert(Bytecodes::_l2i, index, tmp);
 294     index = tmp;
 295   }
 296   // At this point base and index should be all ints and not constants
 297   assert(base->is_single_cpu() && !base->is_constant(), "base should be an non-constant int");
 298   assert(index->is_illegal() || (index->type() == T_INT && !index->is_constant()), "index should be an non-constant int");
 299 #endif
 300 
 301   int max_disp;
 302   bool disp_is_in_range;
 303   bool embedded_shift;
 304 
 305 #ifdef AARCH64
 306   int align = exact_log2(type2aelembytes(type, true));
 307   assert((disp & right_n_bits(align)) == 0, "displacement is not aligned");
 308   assert(shift == 0 || shift == align, "shift should be zero or equal to embedded align");
 309   max_disp = (1 << 12) << align;
 310 
 311   if (disp >= 0) {
 312     disp_is_in_range = Assembler::is_unsigned_imm_in_range(disp, 12, align);
 313   } else {
 314     disp_is_in_range = Assembler::is_imm_in_range(disp, 9, 0);
 315   }
 316 
 317   embedded_shift = true;
 318 #else
 319   switch (type) {
 320     case T_BYTE:
 321     case T_SHORT:
 322     case T_CHAR:
 323       max_disp = 256;          // ldrh, ldrsb encoding has 8-bit offset
 324       embedded_shift = false;
 325       break;
 326     case T_FLOAT:
 327     case T_DOUBLE:
 328       max_disp = 1024;         // flds, fldd have 8-bit offset multiplied by 4
 329       embedded_shift = false;
 330       break;
 331     case T_LONG:
 332       max_disp = 4096;
 333       embedded_shift = false;
 334       break;
 335     default:
 336       max_disp = 4096;         // ldr, ldrb allow 12-bit offset
 337       embedded_shift = true;
 338   }
 339 
 340   disp_is_in_range = (-max_disp < disp && disp < max_disp);
 341 #endif // !AARCH64
 342 
 343   if (index->is_register()) {
 344     LIR_Opr tmp = new_pointer_register();
 345     if (!disp_is_in_range) {
 346       add_large_constant(base, disp, tmp);
 347       base = tmp;
 348       disp = 0;
 349     }
 350     LIR_Address* addr = make_address(base, index, (LIR_Address::Scale)shift, type);
 351     if (disp == 0 && embedded_shift) {
 352       // can use ldr/str instruction with register index
 353       return addr;
 354     } else {
 355       LIR_Opr tmp = new_pointer_register();
 356       __ add(base, LIR_OprFact::address(addr), tmp); // add with shifted/extended register
 357       return new LIR_Address(tmp, disp, type);
 358     }
 359   }
 360 
 361   // If the displacement is too large to be inlined into LDR instruction,
 362   // generate large constant with additional sequence of ADD instructions
 363   int excess_disp = disp & ~(max_disp - 1);
 364   if (excess_disp != 0) {
 365     LIR_Opr tmp = new_pointer_register();
 366     add_large_constant(base, excess_disp, tmp);
 367     base = tmp;
 368   }
 369   return new LIR_Address(base, disp & (max_disp - 1), type);
 370 }
 371 
 372 
 373 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 374                                               BasicType type, bool needs_card_mark) {
 375   int base_offset = arrayOopDesc::base_offset_in_bytes(type);
 376   int elem_size = type2aelembytes(type);
 377 
 378   if (index_opr->is_constant()) {
 379     int offset = base_offset + index_opr->as_constant_ptr()->as_jint() * elem_size;
 380     if (needs_card_mark) {
 381       LIR_Opr base_opr = new_pointer_register();
 382       add_large_constant(array_opr, offset, base_opr);
 383       return new LIR_Address(base_opr, (intx)0, type);
 384     } else {
 385       return generate_address(array_opr, offset, type);
 386     }
 387   } else {
 388     assert(index_opr->is_register(), "must be");
 389     int scale = exact_log2(elem_size);
 390     if (needs_card_mark) {
 391       LIR_Opr base_opr = new_pointer_register();
 392       LIR_Address* addr = make_address(base_opr, index_opr, (LIR_Address::Scale)scale, type);
 393       __ add(array_opr, LIR_OprFact::intptrConst(base_offset), base_opr);
 394       __ add(base_opr, LIR_OprFact::address(addr), base_opr); // add with shifted/extended register
 395       return new LIR_Address(base_opr, type);
 396     } else {
 397       return generate_address(array_opr, index_opr, scale, base_offset, type);
 398     }
 399   }
 400 }
 401 
 402 
 403 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 404   assert(type == T_LONG || type == T_INT, "should be");
 405   LIR_Opr r = make_constant(type, x);
 406 #ifdef AARCH64
 407   bool imm_in_range = Assembler::LogicalImmediate(x, type == T_INT).is_encoded();
 408 #else
 409   bool imm_in_range = AsmOperand::is_rotated_imm(x);
 410 #endif // AARCH64
 411   if (!imm_in_range) {
 412     LIR_Opr tmp = new_register(type);
 413     __ move(r, tmp);
 414     return tmp;
 415   }
 416   return r;
 417 }
 418 
 419 
 420 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 421   LIR_Opr pointer = new_pointer_register();
 422   __ move(LIR_OprFact::intptrConst(counter), pointer);
 423   LIR_Address* addr = new LIR_Address(pointer, type);
 424   increment_counter(addr, step);
 425 }
 426 
 427 
 428 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 429   LIR_Opr temp = new_register(addr->type());
 430   __ move(addr, temp);
 431   __ add(temp, make_constant(addr->type(), step), temp);
 432   __ move(temp, addr);
 433 }
 434 
 435 
 436 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 437   __ load(new LIR_Address(base, disp, T_INT), FrameMap::LR_opr, info);
 438   __ cmp(condition, FrameMap::LR_opr, c);
 439 }
 440 
 441 
 442 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 443   __ load(new LIR_Address(base, disp, type), FrameMap::LR_opr, info);
 444   __ cmp(condition, reg, FrameMap::LR_opr);
 445 }
 446 
 447 
 448 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 449   assert(left != result, "should be different registers");
 450   if (is_power_of_2(c + 1)) {
 451 #ifdef AARCH64
 452     __ shift_left(left, log2_intptr(c + 1), result);
 453     __ sub(result, left, result);
 454 #else
 455     LIR_Address::Scale scale = (LIR_Address::Scale) log2_intptr(c + 1);
 456     LIR_Address* addr = new LIR_Address(left, left, scale, 0, T_INT);
 457     __ sub(LIR_OprFact::address(addr), left, result); // rsb with shifted register
 458 #endif // AARCH64
 459     return true;
 460   } else if (is_power_of_2(c - 1)) {
 461     LIR_Address::Scale scale = (LIR_Address::Scale) log2_intptr(c - 1);
 462     LIR_Address* addr = new LIR_Address(left, left, scale, 0, T_INT);
 463     __ add(left, LIR_OprFact::address(addr), result); // add with shifted register
 464     return true;
 465   }
 466   return false;
 467 }
 468 
 469 
 470 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
 471   assert(item->type() == T_INT, "other types are not expected");
 472   __ store(item, new LIR_Address(FrameMap::SP_opr, in_bytes(offset_from_sp), item->type()));
 473 }
 474 
 475 void LIRGenerator::set_card(LIR_Opr value, LIR_Address* card_addr) {
 476   assert(CardTableModRefBS::dirty_card_val() == 0,
 477     "Cannot use ZR register (aarch64) or the register containing the card table base address directly (aarch32) otherwise");
 478 #ifdef AARCH64
 479   // AARCH64 has a register that is constant zero. We can use that one to set the
 480   // value in the card table to dirty.
 481   __ move(FrameMap::ZR_opr, card_addr);
 482 #else // AARCH64
 483   CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
 484   if(((intx)ct->byte_map_base & 0xff) == 0) {
 485     // If the card table base address is aligned to 256 bytes, we can use the register
 486     // that contains the card_table_base_address.
 487     __ move(value, card_addr);
 488   } else {
 489     // Otherwise we need to create a register containing that value.
 490     LIR_Opr tmp_zero = new_register(T_INT);
 491     __ move(LIR_OprFact::intConst(CardTableModRefBS::dirty_card_val()), tmp_zero);
 492     __ move(tmp_zero, card_addr);
 493   }
 494 #endif // AARCH64
 495 }
 496 
 497 void LIRGenerator::CardTableModRef_post_barrier_helper(LIR_OprDesc* addr, LIR_Const* card_table_base) {
 498   assert(addr->is_register(), "must be a register at this point");
 499 
 500   LIR_Opr tmp = FrameMap::LR_ptr_opr;
 501 
 502   // TODO-AARCH64: check performance
 503   bool load_card_table_base_const = AARCH64_ONLY(false) NOT_AARCH64(VM_Version::supports_movw());
 504   if (load_card_table_base_const) {
 505     __ move((LIR_Opr)card_table_base, tmp);
 506   } else {
 507     __ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
 508   }
 509 
 510 #ifdef AARCH64
 511   LIR_Address* shifted_reg_operand = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
 512   LIR_Opr tmp2 = tmp;
 513   __ add(tmp, LIR_OprFact::address(shifted_reg_operand), tmp2); // tmp2 = tmp + (addr >> CardTableModRefBS::card_shift)
 514   LIR_Address* card_addr = new LIR_Address(tmp2, T_BYTE);
 515 #else
 516   // Use unsigned type T_BOOLEAN here rather than (signed) T_BYTE since signed load
 517   // byte instruction does not support the addressing mode we need.
 518   LIR_Address* card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BOOLEAN);
 519 #endif
 520   if (UseCondCardMark) {
 521     if (UseConcMarkSweepGC) {
 522       __ membar_storeload();
 523     }
 524     LIR_Opr cur_value = new_register(T_INT);
 525     __ move(card_addr, cur_value);
 526 
 527     LabelObj* L_already_dirty = new LabelObj();
 528     __ cmp(lir_cond_equal, cur_value, LIR_OprFact::intConst(CardTableModRefBS::dirty_card_val()));
 529     __ branch(lir_cond_equal, T_BYTE, L_already_dirty->label());
 530     set_card(tmp, card_addr);
 531     __ branch_destination(L_already_dirty->label());
 532   } else {
 533     if (UseConcMarkSweepGC && CMSPrecleaningEnabled) {
 534       __ membar_storestore();
 535     }
 536     set_card(tmp, card_addr);
 537   }
 538 }
 539 
 540 //----------------------------------------------------------------------
 541 //             visitor functions
 542 //----------------------------------------------------------------------
 543 
 544 
 545 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 546   assert(x->is_pinned(),"");
 547   bool needs_range_check = x->compute_needs_range_check();
 548   bool use_length = x->length() != NULL;
 549   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 550   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 551                                          !get_jobject_constant(x->value())->is_null_object() ||
 552                                          x->should_profile());
 553 
 554   LIRItem array(x->array(), this);
 555   LIRItem index(x->index(), this);
 556   LIRItem value(x->value(), this);
 557   LIRItem length(this);
 558 
 559   array.load_item();
 560   index.load_nonconstant();
 561 
 562   if (use_length && needs_range_check) {
 563     length.set_instruction(x->length());
 564     length.load_item();
 565   }
 566   if (needs_store_check || x->check_boolean()) {
 567     value.load_item();
 568   } else {
 569     value.load_for_store(x->elt_type());
 570   }
 571 
 572   set_no_result(x);
 573 
 574   // the CodeEmitInfo must be duplicated for each different
 575   // LIR-instruction because spilling can occur anywhere between two
 576   // instructions and so the debug information must be different
 577   CodeEmitInfo* range_check_info = state_for(x);
 578   CodeEmitInfo* null_check_info = NULL;
 579   if (x->needs_null_check()) {
 580     null_check_info = new CodeEmitInfo(range_check_info);
 581   }
 582 
 583   // emit array address setup early so it schedules better
 584   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 585 
 586   if (GenerateRangeChecks && needs_range_check) {
 587     if (use_length) {
 588       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 589       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 590     } else {
 591       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 592       // range_check also does the null check
 593       null_check_info = NULL;
 594     }
 595   }
 596 
 597   if (GenerateArrayStoreCheck && needs_store_check) {
 598     LIR_Opr tmp1 = FrameMap::R0_oop_opr;
 599     LIR_Opr tmp2 = FrameMap::R1_oop_opr;
 600     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 601     __ store_check(value.result(), array.result(), tmp1, tmp2,
 602                    LIR_OprFact::illegalOpr, store_check_info,
 603                    x->profiled_method(), x->profiled_bci());
 604   }
 605 
 606 #if INCLUDE_ALL_GCS
 607   if (obj_store) {
 608     // Needs GC write barriers.
 609     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 610                 true /* do_load */, false /* patch */, NULL);
 611   }
 612 #endif // INCLUDE_ALL_GCS
 613 
 614   LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 615   __ move(result, array_addr, null_check_info);
 616   if (obj_store) {
 617     post_barrier(LIR_OprFact::address(array_addr), value.result());
 618   }
 619 }
 620 
 621 
 622 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 623   assert(x->is_pinned(),"");
 624   LIRItem obj(x->obj(), this);
 625   obj.load_item();
 626   set_no_result(x);
 627 
 628   LIR_Opr lock = new_pointer_register();
 629   LIR_Opr hdr  = new_pointer_register();
 630 
 631   // Need a scratch register for biased locking on arm
 632   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 633   if(UseBiasedLocking) {
 634     scratch = new_pointer_register();
 635   } else {
 636     scratch = atomicLockOpr();
 637   }
 638 
 639   CodeEmitInfo* info_for_exception = NULL;
 640   if (x->needs_null_check()) {
 641     info_for_exception = state_for(x);
 642   }
 643 
 644   CodeEmitInfo* info = state_for(x, x->state(), true);
 645   monitor_enter(obj.result(), lock, hdr, scratch,
 646                 x->monitor_no(), info_for_exception, info);
 647 }
 648 
 649 
 650 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 651   assert(x->is_pinned(),"");
 652   LIRItem obj(x->obj(), this);
 653   obj.dont_load_item();
 654   set_no_result(x);
 655 
 656   LIR_Opr obj_temp = new_pointer_register();
 657   LIR_Opr lock     = new_pointer_register();
 658   LIR_Opr hdr      = new_pointer_register();
 659 
 660   monitor_exit(obj_temp, lock, hdr, atomicLockOpr(), x->monitor_no());
 661 }
 662 
 663 
 664 // _ineg, _lneg, _fneg, _dneg
 665 void LIRGenerator::do_NegateOp(NegateOp* x) {
 666 #ifdef __SOFTFP__
 667   address runtime_func = NULL;
 668   ValueTag tag = x->type()->tag();
 669   if (tag == floatTag) {
 670     runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fneg);
 671   } else if (tag == doubleTag) {
 672     runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dneg);
 673   }
 674   if (runtime_func != NULL) {
 675     set_result(x, call_runtime(x->x(), runtime_func, x->type(), NULL));
 676     return;
 677   }
 678 #endif // __SOFTFP__
 679   LIRItem value(x->x(), this);
 680   value.load_item();
 681   LIR_Opr reg = rlock_result(x);
 682   __ negate(value.result(), reg);
 683 }
 684 
 685 
 686 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 687 //      _dadd, _dmul, _dsub, _ddiv, _drem
 688 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 689   address runtime_func;
 690   switch (x->op()) {
 691     case Bytecodes::_frem:
 692       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 693       break;
 694     case Bytecodes::_drem:
 695       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 696       break;
 697 #ifdef __SOFTFP__
 698     // Call function compiled with -msoft-float.
 699 
 700       // __aeabi_XXXX_glibc: Imported code from glibc soft-fp bundle for calculation accuracy improvement. See CR 6757269.
 701 
 702     case Bytecodes::_fadd:
 703       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fadd_glibc);
 704       break;
 705     case Bytecodes::_fmul:
 706       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fmul);
 707       break;
 708     case Bytecodes::_fsub:
 709       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fsub_glibc);
 710       break;
 711     case Bytecodes::_fdiv:
 712       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_fdiv);
 713       break;
 714     case Bytecodes::_dadd:
 715       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dadd_glibc);
 716       break;
 717     case Bytecodes::_dmul:
 718       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dmul);
 719       break;
 720     case Bytecodes::_dsub:
 721       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_dsub_glibc);
 722       break;
 723     case Bytecodes::_ddiv:
 724       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_ddiv);
 725       break;
 726     default:
 727       ShouldNotReachHere();
 728 #else // __SOFTFP__
 729     default: {
 730       LIRItem left(x->x(), this);
 731       LIRItem right(x->y(), this);
 732       left.load_item();
 733       right.load_item();
 734       rlock_result(x);
 735       arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
 736       return;
 737     }
 738 #endif // __SOFTFP__
 739   }
 740 
 741   LIR_Opr result = call_runtime(x->x(), x->y(), runtime_func, x->type(), NULL);
 742   set_result(x, result);
 743 }
 744 
 745 
 746 void LIRGenerator::make_div_by_zero_check(LIR_Opr right_arg, BasicType type, CodeEmitInfo* info) {
 747   assert(right_arg->is_register(), "must be");
 748   __ cmp(lir_cond_equal, right_arg, make_constant(type, 0));
 749   __ branch(lir_cond_equal, type, new DivByZeroStub(info));
 750 }
 751 
 752 
 753 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 754 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 755   CodeEmitInfo* info = NULL;
 756   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
 757     info = state_for(x);
 758   }
 759 
 760 #ifdef AARCH64
 761   LIRItem left(x->x(), this);
 762   LIRItem right(x->y(), this);
 763   LIRItem* left_arg = &left;
 764   LIRItem* right_arg = &right;
 765 
 766   // Test if instr is commutative and if we should swap
 767   if (x->is_commutative() && left.is_constant()) {
 768     left_arg = &right;
 769     right_arg = &left;
 770   }
 771 
 772   left_arg->load_item();
 773   switch (x->op()) {
 774     case Bytecodes::_ldiv:
 775       right_arg->load_item();
 776       make_div_by_zero_check(right_arg->result(), T_LONG, info);
 777       __ idiv(left_arg->result(), right_arg->result(), rlock_result(x), LIR_OprFact::illegalOpr, NULL);
 778       break;
 779 
 780     case Bytecodes::_lrem: {
 781       right_arg->load_item();
 782       make_div_by_zero_check(right_arg->result(), T_LONG, info);
 783       // a % b is implemented with 2 instructions:
 784       // tmp = a/b       (sdiv)
 785       // res = a - b*tmp (msub)
 786       LIR_Opr tmp = FrameMap::as_long_opr(Rtemp);
 787       __ irem(left_arg->result(), right_arg->result(), rlock_result(x), tmp, NULL);
 788       break;
 789     }
 790 
 791     case Bytecodes::_lmul:
 792       if (right_arg->is_constant() && is_power_of_2_long(right_arg->get_jlong_constant())) {
 793         right_arg->dont_load_item();
 794         __ shift_left(left_arg->result(), exact_log2_long(right_arg->get_jlong_constant()), rlock_result(x));
 795       } else {
 796         right_arg->load_item();
 797         __ mul(left_arg->result(), right_arg->result(), rlock_result(x));
 798       }
 799       break;
 800 
 801     case Bytecodes::_ladd:
 802     case Bytecodes::_lsub:
 803       if (right_arg->is_constant()) {
 804         jlong c = right_arg->get_jlong_constant();
 805         add_constant(left_arg->result(), (x->op() == Bytecodes::_ladd) ? c : -c, rlock_result(x));
 806       } else {
 807         right_arg->load_item();
 808         arithmetic_op_long(x->op(), rlock_result(x), left_arg->result(), right_arg->result(), NULL);
 809       }
 810       break;
 811 
 812     default:
 813       ShouldNotReachHere();
 814   }
 815 #else
 816   switch (x->op()) {
 817     case Bytecodes::_ldiv:
 818     case Bytecodes::_lrem: {
 819       LIRItem right(x->y(), this);
 820       right.load_item();
 821       make_div_by_zero_check(right.result(), T_LONG, info);
 822     }
 823     // Fall through
 824     case Bytecodes::_lmul: {
 825       address entry;
 826       switch (x->op()) {
 827       case Bytecodes::_lrem:
 828         entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 829         break;
 830       case Bytecodes::_ldiv:
 831         entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 832         break;
 833       case Bytecodes::_lmul:
 834         entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 835         break;
 836       default:
 837         ShouldNotReachHere();
 838       }
 839       LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
 840       set_result(x, result);
 841       break;
 842     }
 843     case Bytecodes::_ladd:
 844     case Bytecodes::_lsub: {
 845       LIRItem left(x->x(), this);
 846       LIRItem right(x->y(), this);
 847       left.load_item();
 848       right.load_item();
 849       rlock_result(x);
 850       arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 851       break;
 852     }
 853     default:
 854       ShouldNotReachHere();
 855   }
 856 #endif // AARCH64
 857 }
 858 
 859 
 860 // for: _iadd, _imul, _isub, _idiv, _irem
 861 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 862   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
 863   LIRItem left(x->x(), this);
 864   LIRItem right(x->y(), this);
 865   LIRItem* left_arg = &left;
 866   LIRItem* right_arg = &right;
 867 
 868   // Test if instr is commutative and if we should swap
 869   if (x->is_commutative() && left.is_constant()) {
 870     left_arg = &right;
 871     right_arg = &left;
 872   }
 873 
 874   if (is_div_rem) {
 875     CodeEmitInfo* info = state_for(x);
 876     if (x->op() == Bytecodes::_idiv && right_arg->is_constant() && is_power_of_2(right_arg->get_jint_constant())) {
 877       left_arg->load_item();
 878       right_arg->dont_load_item();
 879       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 880       LIR_Opr result = rlock_result(x);
 881       __ idiv(left_arg->result(), right_arg->result(), result, tmp, info);
 882     } else {
 883 #ifdef AARCH64
 884       left_arg->load_item();
 885       right_arg->load_item();
 886       make_div_by_zero_check(right_arg->result(), T_INT, info);
 887       if (x->op() == Bytecodes::_idiv) {
 888         __ idiv(left_arg->result(), right_arg->result(), rlock_result(x), LIR_OprFact::illegalOpr, NULL);
 889       } else {
 890         // a % b is implemented with 2 instructions:
 891         // tmp = a/b       (sdiv)
 892         // res = a - b*tmp (msub)
 893         LIR_Opr tmp = FrameMap::as_opr(Rtemp);
 894         __ irem(left_arg->result(), right_arg->result(), rlock_result(x), tmp, NULL);
 895       }
 896 #else
 897       left_arg->load_item_force(FrameMap::R0_opr);
 898       right_arg->load_item_force(FrameMap::R2_opr);
 899       LIR_Opr tmp = FrameMap::R1_opr;
 900       LIR_Opr result = rlock_result(x);
 901       LIR_Opr out_reg;
 902       if (x->op() == Bytecodes::_irem) {
 903         out_reg = FrameMap::R0_opr;
 904         __ irem(left_arg->result(), right_arg->result(), out_reg, tmp, info);
 905       } else if (x->op() == Bytecodes::_idiv) {
 906         out_reg = FrameMap::R1_opr;
 907         __ idiv(left_arg->result(), right_arg->result(), out_reg, tmp, info);
 908       }
 909       __ move(out_reg, result);
 910 #endif // AARCH64
 911     }
 912 
 913 #ifdef AARCH64
 914   } else if (((x->op() == Bytecodes::_iadd) || (x->op() == Bytecodes::_isub)) && right_arg->is_constant()) {
 915     left_arg->load_item();
 916     jint c = right_arg->get_jint_constant();
 917     right_arg->dont_load_item();
 918     add_constant(left_arg->result(), (x->op() == Bytecodes::_iadd) ? c : -c, rlock_result(x));
 919 #endif // AARCH64
 920 
 921   } else {
 922     left_arg->load_item();
 923     if (x->op() == Bytecodes::_imul && right_arg->is_constant()) {
 924       int c = right_arg->get_jint_constant();
 925       if (c > 0 && (is_power_of_2(c) || is_power_of_2(c - 1) || is_power_of_2(c + 1))) {
 926         right_arg->dont_load_item();
 927       } else {
 928         right_arg->load_item();
 929       }
 930     } else {
 931       AARCH64_ONLY(assert(!right_arg->is_constant(), "constant right_arg is already handled by this moment");)
 932       right_arg->load_nonconstant();
 933     }
 934     rlock_result(x);
 935     assert(right_arg->is_constant() || right_arg->is_register(), "wrong state of right");
 936     arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), NULL);
 937   }
 938 }
 939 
 940 
 941 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 942   ValueTag tag = x->type()->tag();
 943   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 944   switch (tag) {
 945     case floatTag:
 946     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 947     case longTag:    do_ArithmeticOp_Long(x); return;
 948     case intTag:     do_ArithmeticOp_Int(x);  return;
 949   }
 950   ShouldNotReachHere();
 951 }
 952 
 953 
 954 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 955 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 956   LIRItem value(x->x(), this);
 957   LIRItem count(x->y(), this);
 958 
 959 #ifndef AARCH64
 960   if (value.type()->is_long()) {
 961     count.set_destroys_register();
 962   }
 963 #endif // !AARCH64
 964 
 965   if (count.is_constant()) {
 966     assert(count.type()->as_IntConstant() != NULL, "should be");
 967     count.dont_load_item();
 968   } else {
 969     count.load_item();
 970   }
 971   value.load_item();
 972 
 973   LIR_Opr res = rlock_result(x);
 974   shift_op(x->op(), res, value.result(), count.result(), LIR_OprFact::illegalOpr);
 975 }
 976 
 977 
 978 // _iand, _land, _ior, _lor, _ixor, _lxor
 979 void LIRGenerator::do_LogicOp(LogicOp* x) {
 980   LIRItem left(x->x(), this);
 981   LIRItem right(x->y(), this);
 982 
 983   left.load_item();
 984 
 985 #ifdef AARCH64
 986   if (right.is_constant() && can_inline_as_constant_in_logic(right.value())) {
 987     right.dont_load_item();
 988   } else {
 989     right.load_item();
 990   }
 991 #else
 992   right.load_nonconstant();
 993 #endif // AARCH64
 994 
 995   logic_op(x->op(), rlock_result(x), left.result(), right.result());
 996 }
 997 
 998 
 999 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
1000 void LIRGenerator::do_CompareOp(CompareOp* x) {
1001 #ifdef __SOFTFP__
1002   address runtime_func;
1003   switch (x->op()) {
1004     case Bytecodes::_fcmpl:
1005       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fcmpl);
1006       break;
1007     case Bytecodes::_fcmpg:
1008       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::fcmpg);
1009       break;
1010     case Bytecodes::_dcmpl:
1011       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dcmpl);
1012       break;
1013     case Bytecodes::_dcmpg:
1014       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dcmpg);
1015       break;
1016     case Bytecodes::_lcmp: {
1017         LIRItem left(x->x(), this);
1018         LIRItem right(x->y(), this);
1019         left.load_item();
1020         right.load_nonconstant();
1021         LIR_Opr reg = rlock_result(x);
1022          __ lcmp2int(left.result(), right.result(), reg);
1023         return;
1024       }
1025     default:
1026       ShouldNotReachHere();
1027   }
1028   LIR_Opr result = call_runtime(x->x(), x->y(), runtime_func, x->type(), NULL);
1029   set_result(x, result);
1030 #else // __SOFTFP__
1031   LIRItem left(x->x(), this);
1032   LIRItem right(x->y(), this);
1033   left.load_item();
1034 
1035 #ifdef AARCH64
1036   if (right.is_constant() && can_inline_as_constant_in_cmp(right.value())) {
1037     right.dont_load_item();
1038   } else {
1039     right.load_item();
1040   }
1041 #else
1042   right.load_nonconstant();
1043 #endif // AARCH64
1044 
1045   LIR_Opr reg = rlock_result(x);
1046 
1047   if (x->x()->type()->is_float_kind()) {
1048     Bytecodes::Code code = x->op();
1049     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
1050   } else if (x->x()->type()->tag() == longTag) {
1051     __ lcmp2int(left.result(), right.result(), reg);
1052   } else {
1053     ShouldNotReachHere();
1054   }
1055 #endif // __SOFTFP__
1056 }
1057 
1058 
1059 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
1060   assert(x->number_of_arguments() == 4, "wrong type");
1061   LIRItem obj   (x->argument_at(0), this);  // object
1062   LIRItem offset(x->argument_at(1), this);  // offset of field
1063   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
1064   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
1065 
1066   LIR_Opr addr = new_pointer_register();
1067   LIR_Opr tmp1 = LIR_OprFact::illegalOpr;
1068   LIR_Opr tmp2 = LIR_OprFact::illegalOpr;
1069 
1070   // get address of field
1071   obj.load_item();
1072   offset.load_item();
1073   cmp.load_item();
1074   val.load_item();
1075 
1076   __ add(obj.result(), offset.result(), addr);
1077   LIR_Opr result = rlock_result(x);
1078 
1079   if (type == objectType) {
1080 #if INCLUDE_ALL_GCS
1081     // Do the pre-write barrier, if any.
1082     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
1083                 true /* do_load */, false /* patch */, NULL);
1084 #endif // INCLUDE_ALL_GCS
1085 #ifdef AARCH64
1086     if (UseCompressedOops) {
1087       tmp1 = new_pointer_register();
1088       tmp2 = new_pointer_register();
1089     }
1090 #endif // AARCH64
1091     __ cas_obj(addr, cmp.result(), val.result(), tmp1, tmp2, result);
1092     post_barrier(addr, val.result());
1093   }
1094   else if (type == intType) {
1095     __ cas_int(addr, cmp.result(), val.result(), tmp1, tmp1, result);
1096   }
1097   else if (type == longType) {
1098 #ifndef AARCH64
1099     tmp1 = new_register(T_LONG);
1100 #endif // !AARCH64
1101     __ cas_long(addr, cmp.result(), val.result(), tmp1, tmp2, result);
1102   }
1103   else {
1104     ShouldNotReachHere();
1105   }
1106 }
1107 
1108 
1109 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
1110   address runtime_func;
1111   switch (x->id()) {
1112     case vmIntrinsics::_dabs: {
1113 #ifdef __SOFTFP__
1114       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dabs);
1115       break;
1116 #else
1117       assert(x->number_of_arguments() == 1, "wrong type");
1118       LIRItem value(x->argument_at(0), this);
1119       value.load_item();
1120       __ abs(value.result(), rlock_result(x), LIR_OprFact::illegalOpr);
1121       return;
1122 #endif // __SOFTFP__
1123     }
1124     case vmIntrinsics::_dsqrt: {
1125 #ifdef __SOFTFP__
1126       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
1127       break;
1128 #else
1129       assert(x->number_of_arguments() == 1, "wrong type");
1130       LIRItem value(x->argument_at(0), this);
1131       value.load_item();
1132       __ sqrt(value.result(), rlock_result(x), LIR_OprFact::illegalOpr);
1133       return;
1134 #endif // __SOFTFP__
1135     }
1136     case vmIntrinsics::_dsin:
1137       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
1138       break;
1139     case vmIntrinsics::_dcos:
1140       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
1141       break;
1142     case vmIntrinsics::_dtan:
1143       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
1144       break;
1145     case vmIntrinsics::_dlog:
1146       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
1147       break;
1148     case vmIntrinsics::_dlog10:
1149       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
1150       break;
1151     case vmIntrinsics::_dexp:
1152       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
1153       break;
1154     case vmIntrinsics::_dpow:
1155       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
1156       break;
1157     default:
1158       ShouldNotReachHere();
1159       return;
1160   }
1161 
1162   LIR_Opr result;
1163   if (x->number_of_arguments() == 1) {
1164     result = call_runtime(x->argument_at(0), runtime_func, x->type(), NULL);
1165   } else {
1166     assert(x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow, "unexpected intrinsic");
1167     result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_func, x->type(), NULL);
1168   }
1169   set_result(x, result);
1170 }
1171 
1172 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1173   fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1174 }
1175 
1176 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1177   CodeEmitInfo* info = state_for(x, x->state());
1178   assert(x->number_of_arguments() == 5, "wrong type");
1179   LIRItem src(x->argument_at(0), this);
1180   LIRItem src_pos(x->argument_at(1), this);
1181   LIRItem dst(x->argument_at(2), this);
1182   LIRItem dst_pos(x->argument_at(3), this);
1183   LIRItem length(x->argument_at(4), this);
1184 
1185   // We put arguments into the same registers which are used for a Java call.
1186   // Note: we used fixed registers for all arguments because all registers
1187   // are caller-saved, so register allocator treats them all as used.
1188   src.load_item_force    (FrameMap::R0_oop_opr);
1189   src_pos.load_item_force(FrameMap::R1_opr);
1190   dst.load_item_force    (FrameMap::R2_oop_opr);
1191   dst_pos.load_item_force(FrameMap::R3_opr);
1192   length.load_item_force (FrameMap::R4_opr);
1193   LIR_Opr tmp =          (FrameMap::R5_opr);
1194   set_no_result(x);
1195 
1196   int flags;
1197   ciArrayKlass* expected_type;
1198   arraycopy_helper(x, &flags, &expected_type);
1199   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(),
1200                tmp, expected_type, flags, info);
1201 }
1202 
1203 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1204   fatal("CRC32 intrinsic is not implemented on this platform");
1205 }
1206 
1207 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1208   Unimplemented();
1209 }
1210 
1211 void LIRGenerator::do_Convert(Convert* x) {
1212   address runtime_func;
1213   switch (x->op()) {
1214 #ifndef AARCH64
1215     case Bytecodes::_l2f:
1216       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
1217       break;
1218     case Bytecodes::_l2d:
1219       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
1220       break;
1221     case Bytecodes::_f2l:
1222       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
1223       break;
1224     case Bytecodes::_d2l:
1225       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
1226       break;
1227 #ifdef __SOFTFP__
1228     case Bytecodes::_f2d:
1229       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_f2d);
1230       break;
1231     case Bytecodes::_d2f:
1232       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_d2f);
1233       break;
1234     case Bytecodes::_i2f:
1235       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_i2f);
1236       break;
1237     case Bytecodes::_i2d:
1238       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_i2d);
1239       break;
1240     case Bytecodes::_f2i:
1241       runtime_func = CAST_FROM_FN_PTR(address, __aeabi_f2iz);
1242       break;
1243     case Bytecodes::_d2i:
1244       // This is implemented in hard float in assembler on arm but a call
1245       // on other platforms.
1246       runtime_func = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
1247       break;
1248 #endif // __SOFTFP__
1249 #endif // !AARCH64
1250     default: {
1251       LIRItem value(x->value(), this);
1252       value.load_item();
1253       LIR_Opr reg = rlock_result(x);
1254       __ convert(x->op(), value.result(), reg, NULL);
1255       return;
1256     }
1257   }
1258 
1259   LIR_Opr result = call_runtime(x->value(), runtime_func, x->type(), NULL);
1260   set_result(x, result);
1261 }
1262 
1263 
1264 void LIRGenerator::do_NewInstance(NewInstance* x) {
1265   print_if_not_loaded(x);
1266 
1267   CodeEmitInfo* info = state_for(x, x->state());
1268   LIR_Opr reg = result_register_for(x->type());  // R0 is required by runtime call in NewInstanceStub::emit_code
1269   LIR_Opr klass_reg = FrameMap::R1_metadata_opr; // R1 is required by runtime call in NewInstanceStub::emit_code
1270   LIR_Opr tmp1 = new_register(objectType);
1271   LIR_Opr tmp2 = new_register(objectType);
1272   LIR_Opr tmp3 = FrameMap::LR_oop_opr;
1273 
1274   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3,
1275                LIR_OprFact::illegalOpr, klass_reg, info);
1276 
1277   LIR_Opr result = rlock_result(x);
1278   __ move(reg, result);
1279 }
1280 
1281 
1282 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1283   // Evaluate state_for() first, because it can emit code
1284   // with the same fixed registers that are used here (R1, R2)
1285   CodeEmitInfo* info = state_for(x, x->state());
1286   LIRItem length(x->length(), this);
1287 
1288   length.load_item_force(FrameMap::R2_opr);      // R2 is required by runtime call in NewTypeArrayStub::emit_code
1289   LIR_Opr len = length.result();
1290 
1291   LIR_Opr reg = result_register_for(x->type());  // R0 is required by runtime call in NewTypeArrayStub::emit_code
1292   LIR_Opr klass_reg = FrameMap::R1_metadata_opr; // R1 is required by runtime call in NewTypeArrayStub::emit_code
1293 
1294   LIR_Opr tmp1 = new_register(objectType);
1295   LIR_Opr tmp2 = new_register(objectType);
1296   LIR_Opr tmp3 = FrameMap::LR_oop_opr;
1297   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
1298 
1299   BasicType elem_type = x->elt_type();
1300   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1301 
1302   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1303   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1304 
1305   LIR_Opr result = rlock_result(x);
1306   __ move(reg, result);
1307 }
1308 
1309 
1310 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1311   // Evaluate state_for() first, because it can emit code
1312   // with the same fixed registers that are used here (R1, R2)
1313   CodeEmitInfo* info = state_for(x, x->state());
1314   LIRItem length(x->length(), this);
1315 
1316   length.load_item_force(FrameMap::R2_opr);           // R2 is required by runtime call in NewObjectArrayStub::emit_code
1317   LIR_Opr len = length.result();
1318 
1319   CodeEmitInfo* patching_info = NULL;
1320   if (!x->klass()->is_loaded() || PatchALot) {
1321     patching_info = state_for(x, x->state_before());
1322   }
1323 
1324   LIR_Opr reg = result_register_for(x->type());       // R0 is required by runtime call in NewObjectArrayStub::emit_code
1325   LIR_Opr klass_reg = FrameMap::R1_metadata_opr;      // R1 is required by runtime call in NewObjectArrayStub::emit_code
1326 
1327   LIR_Opr tmp1 = new_register(objectType);
1328   LIR_Opr tmp2 = new_register(objectType);
1329   LIR_Opr tmp3 = FrameMap::LR_oop_opr;
1330   LIR_Opr tmp4 = LIR_OprFact::illegalOpr;
1331 
1332   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1333   ciMetadata* obj = ciObjArrayKlass::make(x->klass());
1334   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1335     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1336   }
1337   klass2reg_with_patching(klass_reg, obj, patching_info);
1338   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1339 
1340   LIR_Opr result = rlock_result(x);
1341   __ move(reg, result);
1342 }
1343 
1344 
1345 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1346   Values* dims = x->dims();
1347   int i = dims->length();
1348   LIRItemList* items = new LIRItemList(i, i, NULL);
1349   while (i-- > 0) {
1350     LIRItem* size = new LIRItem(dims->at(i), this);
1351     items->at_put(i, size);
1352   }
1353 
1354   // Need to get the info before, as the items may become invalid through item_free
1355   CodeEmitInfo* patching_info = NULL;
1356   if (!x->klass()->is_loaded() || PatchALot) {
1357     patching_info = state_for(x, x->state_before());
1358 
1359     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1360     // clone all handlers (NOTE: Usually this is handled transparently
1361     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1362     // is done explicitly here because a stub isn't being used).
1363     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1364   }
1365 
1366   i = dims->length();
1367   while (i-- > 0) {
1368     LIRItem* size = items->at(i);
1369     size->load_item();
1370     LIR_Opr sz = size->result();
1371     assert(sz->type() == T_INT, "should be");
1372     store_stack_parameter(sz, in_ByteSize(i * BytesPerInt));
1373   }
1374 
1375   CodeEmitInfo* info = state_for(x, x->state());
1376   LIR_Opr klass_reg = FrameMap::R0_metadata_opr;
1377   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1378 
1379   LIR_Opr rank = FrameMap::R2_opr;
1380   __ move(LIR_OprFact::intConst(x->rank()), rank);
1381   LIR_Opr varargs = FrameMap::SP_opr;
1382   LIR_OprList* args = new LIR_OprList(3);
1383   args->append(klass_reg);
1384   args->append(rank);
1385   args->append(varargs);
1386   LIR_Opr reg = result_register_for(x->type());
1387   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1388                   LIR_OprFact::illegalOpr, reg, args, info);
1389 
1390   LIR_Opr result = rlock_result(x);
1391   __ move(reg, result);
1392 }
1393 
1394 
1395 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1396   // nothing to do for now
1397 }
1398 
1399 
1400 void LIRGenerator::do_CheckCast(CheckCast* x) {
1401   LIRItem obj(x->obj(), this);
1402   CodeEmitInfo* patching_info = NULL;
1403   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1404     patching_info = state_for(x, x->state_before());
1405   }
1406 
1407   obj.load_item();
1408 
1409   CodeEmitInfo* info_for_exception = state_for(x);
1410   CodeStub* stub;
1411   if (x->is_incompatible_class_change_check()) {
1412     assert(patching_info == NULL, "can't patch this");
1413     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1414                                    LIR_OprFact::illegalOpr, info_for_exception);
1415   } else {
1416     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id,
1417                                    LIR_OprFact::illegalOpr, info_for_exception);
1418   }
1419 
1420   LIR_Opr out_reg = rlock_result(x);
1421   LIR_Opr tmp1 = FrameMap::R0_oop_opr;
1422   LIR_Opr tmp2 = FrameMap::R1_oop_opr;
1423   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1424 
1425   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, x->direct_compare(),
1426                info_for_exception, patching_info, stub, x->profiled_method(), x->profiled_bci());
1427 }
1428 
1429 
1430 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1431   LIRItem obj(x->obj(), this);
1432   CodeEmitInfo* patching_info = NULL;
1433   if (!x->klass()->is_loaded() || PatchALot) {
1434     patching_info = state_for(x, x->state_before());
1435   }
1436 
1437   obj.load_item();
1438   LIR_Opr out_reg = rlock_result(x);
1439   LIR_Opr tmp1 = FrameMap::R0_oop_opr;
1440   LIR_Opr tmp2 = FrameMap::R1_oop_opr;
1441   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1442 
1443   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1444                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1445 }
1446 
1447 
1448 #ifdef __SOFTFP__
1449 // Turn operator if (f <op> g) into runtime call:
1450 //     call _aeabi_fcmp<op>(f, g)
1451 //     cmp(eq, 1)
1452 //     branch(eq, true path).
1453 void LIRGenerator::do_soft_float_compare(If* x) {
1454   assert(x->number_of_sux() == 2, "inconsistency");
1455   ValueTag tag = x->x()->type()->tag();
1456   If::Condition cond = x->cond();
1457   address runtime_func;
1458   // unordered comparison gets the wrong answer because aeabi functions
1459   //  return false.
1460   bool unordered_is_true = x->unordered_is_true();
1461   // reverse of condition for ne
1462   bool compare_to_zero = false;
1463   switch (lir_cond(cond)) {
1464     case lir_cond_notEqual:
1465       compare_to_zero = true;  // fall through
1466     case lir_cond_equal:
1467       runtime_func = tag == floatTag ?
1468           CAST_FROM_FN_PTR(address, __aeabi_fcmpeq):
1469           CAST_FROM_FN_PTR(address, __aeabi_dcmpeq);
1470       break;
1471     case lir_cond_less:
1472       if (unordered_is_true) {
1473         runtime_func = tag == floatTag ?
1474           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmplt):
1475           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmplt);
1476       } else {
1477         runtime_func = tag == floatTag ?
1478           CAST_FROM_FN_PTR(address, __aeabi_fcmplt):
1479           CAST_FROM_FN_PTR(address, __aeabi_dcmplt);
1480       }
1481       break;
1482     case lir_cond_lessEqual:
1483       if (unordered_is_true) {
1484         runtime_func = tag == floatTag ?
1485           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmple):
1486           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmple);
1487       } else {
1488         runtime_func = tag == floatTag ?
1489           CAST_FROM_FN_PTR(address, __aeabi_fcmple):
1490           CAST_FROM_FN_PTR(address, __aeabi_dcmple);
1491       }
1492       break;
1493     case lir_cond_greaterEqual:
1494       if (unordered_is_true) {
1495         runtime_func = tag == floatTag ?
1496           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmpge):
1497           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmpge);
1498       } else {
1499         runtime_func = tag == floatTag ?
1500           CAST_FROM_FN_PTR(address, __aeabi_fcmpge):
1501           CAST_FROM_FN_PTR(address, __aeabi_dcmpge);
1502       }
1503       break;
1504     case lir_cond_greater:
1505       if (unordered_is_true) {
1506         runtime_func = tag == floatTag ?
1507           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_fcmpgt):
1508           CAST_FROM_FN_PTR(address, SharedRuntime::unordered_dcmpgt);
1509       } else {
1510         runtime_func = tag == floatTag ?
1511           CAST_FROM_FN_PTR(address, __aeabi_fcmpgt):
1512           CAST_FROM_FN_PTR(address, __aeabi_dcmpgt);
1513       }
1514       break;
1515     case lir_cond_aboveEqual:
1516     case lir_cond_belowEqual:
1517       ShouldNotReachHere();  // We're not going to get these.
1518     default:
1519       assert(lir_cond(cond) == lir_cond_always, "must be");
1520       ShouldNotReachHere();
1521   }
1522   set_no_result(x);
1523 
1524   // add safepoint before generating condition code so it can be recomputed
1525   if (x->is_safepoint()) {
1526     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1527     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1528   }
1529   // Call float compare function, returns (1,0) if true or false.
1530   LIR_Opr result = call_runtime(x->x(), x->y(), runtime_func, intType, NULL);
1531   __ cmp(lir_cond_equal, result,
1532          compare_to_zero ?
1533            LIR_OprFact::intConst(0) : LIR_OprFact::intConst(1));
1534   profile_branch(x, cond);
1535   move_to_phi(x->state());
1536   __ branch(lir_cond_equal, T_INT, x->tsux());
1537 }
1538 #endif // __SOFTFP__
1539 
1540 void LIRGenerator::do_If(If* x) {
1541   assert(x->number_of_sux() == 2, "inconsistency");
1542   ValueTag tag = x->x()->type()->tag();
1543 
1544 #ifdef __SOFTFP__
1545   if (tag == floatTag || tag == doubleTag) {
1546     do_soft_float_compare(x);
1547     assert(x->default_sux() == x->fsux(), "wrong destination above");
1548     __ jump(x->default_sux());
1549     return;
1550   }
1551 #endif // __SOFTFP__
1552 
1553   LIRItem xitem(x->x(), this);
1554   LIRItem yitem(x->y(), this);
1555   LIRItem* xin = &xitem;
1556   LIRItem* yin = &yitem;
1557   If::Condition cond = x->cond();
1558 
1559 #ifndef AARCH64
1560   if (tag == longTag) {
1561     if (cond == If::gtr || cond == If::leq) {
1562       cond = Instruction::mirror(cond);
1563       xin = &yitem;
1564       yin = &xitem;
1565     }
1566     xin->set_destroys_register();
1567   }
1568 #endif // !AARCH64
1569 
1570   xin->load_item();
1571   LIR_Opr left = xin->result();
1572   LIR_Opr right;
1573 
1574 #ifdef AARCH64
1575   if (yin->is_constant() && can_inline_as_constant_in_cmp(yin->value())) {
1576     yin->dont_load_item();
1577   } else {
1578     yin->load_item();
1579   }
1580   right = yin->result();
1581 #else
1582   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1583       (cond == If::eql || cond == If::neq)) {
1584     // inline long zero
1585     right = LIR_OprFact::value_type(yin->value()->type());
1586   } else {
1587     yin->load_nonconstant();
1588     right = yin->result();
1589   }
1590 #endif // AARCH64
1591 
1592   set_no_result(x);
1593 
1594   // add safepoint before generating condition code so it can be recomputed
1595   if (x->is_safepoint()) {
1596     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1597     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1598   }
1599 
1600   __ cmp(lir_cond(cond), left, right);
1601   profile_branch(x, cond);
1602   move_to_phi(x->state());
1603   if (x->x()->type()->is_float_kind()) {
1604     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1605   } else {
1606     __ branch(lir_cond(cond), right->type(), x->tsux());
1607   }
1608   assert(x->default_sux() == x->fsux(), "wrong destination above");
1609   __ jump(x->default_sux());
1610 }
1611 
1612 
1613 LIR_Opr LIRGenerator::getThreadPointer() {
1614   return FrameMap::Rthread_opr;
1615 }
1616 
1617 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1618   __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::R0_opr);
1619   LIR_OprList* args = new LIR_OprList(1);
1620   args->append(FrameMap::R0_opr);
1621   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1622   __ call_runtime_leaf(func, getThreadTemp(), LIR_OprFact::illegalOpr, args);
1623 }
1624 
1625 
1626 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1627                                         CodeEmitInfo* info) {
1628 #ifndef AARCH64
1629   if (value->is_double_cpu()) {
1630     assert(address->index()->is_illegal(), "should have a constant displacement");
1631     LIR_Opr tmp = new_pointer_register();
1632     add_large_constant(address->base(), address->disp(), tmp);
1633     __ volatile_store_mem_reg(value, new LIR_Address(tmp, (intx)0, address->type()), info);
1634     return;
1635   }
1636 #endif // !AARCH64
1637   // TODO-AARCH64 implement with stlr instruction
1638   __ store(value, address, info, lir_patch_none);
1639 }
1640 
1641 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1642                                        CodeEmitInfo* info) {
1643 #ifndef AARCH64
1644   if (result->is_double_cpu()) {
1645     assert(address->index()->is_illegal(), "should have a constant displacement");
1646     LIR_Opr tmp = new_pointer_register();
1647     add_large_constant(address->base(), address->disp(), tmp);
1648     __ volatile_load_mem_reg(new LIR_Address(tmp, (intx)0, address->type()), result, info);
1649     return;
1650   }
1651 #endif // !AARCH64
1652   // TODO-AARCH64 implement with ldar instruction
1653   __ load(address, result, info, lir_patch_none);
1654 }
1655 
1656 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1657                                      BasicType type, bool is_volatile) {
1658 #ifdef AARCH64
1659   __ load(new LIR_Address(src, offset, type), dst);
1660 #else
1661   assert(offset->is_single_cpu(), "must be");
1662   if (is_volatile && dst->is_double_cpu()) {
1663     LIR_Opr tmp = new_pointer_register();
1664     __ add(src, offset, tmp);
1665     __ volatile_load_mem_reg(new LIR_Address(tmp, (intx)0, type), dst, NULL);
1666   } else if (type == T_FLOAT || type == T_DOUBLE) {
1667     // fld doesn't have indexed addressing mode
1668     LIR_Opr tmp = new_register(T_INT);
1669     __ add(src, offset, tmp);
1670     __ load(new LIR_Address(tmp, (intx)0, type), dst);
1671   } else {
1672     __ load(new LIR_Address(src, offset, type), dst);
1673   }
1674 #endif // AARCH64
1675 }
1676 
1677 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1678                                      BasicType type, bool is_volatile) {
1679 #ifdef AARCH64
1680   LIR_Address* addr = new LIR_Address(src, offset, type);
1681   if (type == T_ARRAY || type == T_OBJECT) {
1682     pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1683                 true /* do_load */, false /* patch */, NULL);
1684     __ move(data, addr);
1685     assert(src->is_register(), "must be register");
1686     post_barrier(LIR_OprFact::address(addr), data);
1687   } else {
1688     __ move(data, addr);
1689   }
1690 #else
1691   assert(offset->is_single_cpu(), "must be");
1692   if (is_volatile && data->is_double_cpu()) {
1693     LIR_Opr tmp = new_register(T_INT);
1694     __ add(src, offset, tmp);
1695     __ volatile_store_mem_reg(data, new LIR_Address(tmp, (intx)0, type), NULL);
1696   } else if (type == T_FLOAT || type == T_DOUBLE) {
1697     // fst doesn't have indexed addressing mode
1698     LIR_Opr tmp = new_register(T_INT);
1699     __ add(src, offset, tmp);
1700     __ move(data, new LIR_Address(tmp, (intx)0, type));
1701   } else {
1702     LIR_Address* addr = new LIR_Address(src, offset, type);
1703     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1704 #if INCLUDE_ALL_GCS
1705     if (is_obj) {
1706       // Do the pre-write barrier, if any.
1707       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1708                   true /* do_load */, false /* patch */, NULL);
1709     }
1710 #endif // INCLUDE_ALL_GCS
1711     __ move(data, addr);
1712     if (is_obj) {
1713       assert(src->is_register(), "must be register");
1714       post_barrier(LIR_OprFact::address(addr), data);
1715     }
1716   }
1717 #endif // AARCH64
1718 }
1719 
1720 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1721   BasicType type = x->basic_type();
1722   LIRItem src(x->object(), this);
1723   LIRItem off(x->offset(), this);
1724   LIRItem value(x->value(), this);
1725 
1726   src.load_item();
1727   if (x->is_add()) {
1728     value.load_nonconstant();
1729   } else {
1730     value.load_item();
1731   }
1732   off.load_nonconstant();
1733 
1734   LIR_Opr dst = rlock_result(x, type);
1735   LIR_Opr data = value.result();
1736   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1737 
1738   assert (type == T_INT || type == T_LONG || (!x->is_add() && is_obj), "unexpected type");
1739   LIR_Opr addr_ptr = new_pointer_register();
1740 
1741   __ add(src.result(), off.result(), addr_ptr);
1742 
1743   LIR_Address* addr = new LIR_Address(addr_ptr, (intx)0, type);
1744 
1745   if (x->is_add()) {
1746     LIR_Opr tmp = new_register(type);
1747     __ xadd(addr_ptr, data, dst, tmp);
1748   } else {
1749     LIR_Opr tmp = (UseCompressedOops && is_obj) ? new_pointer_register() : LIR_OprFact::illegalOpr;
1750     if (is_obj) {
1751       // Do the pre-write barrier, if any.
1752       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1753                   true /* do_load */, false /* patch */, NULL);
1754     }
1755     __ xchg(addr_ptr, data, dst, tmp);
1756     if (is_obj) {
1757       // Seems to be a precise address
1758       post_barrier(LIR_OprFact::address(addr), data);
1759     }
1760   }
1761 }