1 /*
   2  * Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "assembler_arm.inline.hpp"
  28 #include "code/codeCacheExtensions.hpp"
  29 #include "memory/resourceArea.hpp"
  30 #include "prims/jniFastGetField.hpp"
  31 #include "prims/jvm_misc.hpp"
  32 #include "runtime/safepoint.hpp"
  33 
  34 #define __ masm->
  35 
  36 #define BUFFER_SIZE  96
  37 
  38 address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
  39   const char* name = NULL;
  40   address slow_case_addr = NULL;
  41   switch (type) {
  42     case T_BOOLEAN:
  43       name = "jni_fast_GetBooleanField";
  44       slow_case_addr = jni_GetBooleanField_addr();
  45       break;
  46     case T_BYTE:
  47       name = "jni_fast_GetByteField";
  48       slow_case_addr = jni_GetByteField_addr();
  49       break;
  50     case T_CHAR:
  51       name = "jni_fast_GetCharField";
  52       slow_case_addr = jni_GetCharField_addr();
  53       break;
  54     case T_SHORT:
  55       name = "jni_fast_GetShortField";
  56       slow_case_addr = jni_GetShortField_addr();
  57       break;
  58     case T_INT:
  59       name = "jni_fast_GetIntField";
  60       slow_case_addr = jni_GetIntField_addr();
  61       break;
  62     case T_LONG:
  63       name = "jni_fast_GetLongField";
  64       slow_case_addr = jni_GetLongField_addr();
  65       break;
  66     case T_FLOAT:
  67       name = "jni_fast_GetFloatField";
  68       slow_case_addr = jni_GetFloatField_addr();
  69       break;
  70     case T_DOUBLE:
  71       name = "jni_fast_GetDoubleField";
  72       slow_case_addr = jni_GetDoubleField_addr();
  73       break;
  74     default:
  75       ShouldNotReachHere();
  76   }
  77 
  78   // R0 - jni env
  79   // R1 - object handle
  80   // R2 - jfieldID
  81 
  82   const Register Rsafepoint_counter_addr = AARCH64_ONLY(R4) NOT_AARCH64(R3);
  83   const Register Robj = AARCH64_ONLY(R5) NOT_AARCH64(R1);
  84   const Register Rres = AARCH64_ONLY(R6) NOT_AARCH64(R0);
  85 #ifndef AARCH64
  86   const Register Rres_hi = R1;
  87 #endif // !AARCH64
  88   const Register Rsafept_cnt = Rtemp;
  89   const Register Rsafept_cnt2 = Rsafepoint_counter_addr;
  90   const Register Rtmp1 = AARCH64_ONLY(R7) NOT_AARCH64(R3); // same as Rsafepoint_counter_addr on 32-bit ARM
  91   const Register Rtmp2 = AARCH64_ONLY(R8) NOT_AARCH64(R2); // same as jfieldID on 32-bit ARM
  92 
  93 #ifdef AARCH64
  94   assert_different_registers(Rsafepoint_counter_addr, Rsafept_cnt, Robj, Rres, Rtmp1, Rtmp2, R0, R1, R2, LR);
  95   assert_different_registers(Rsafept_cnt2, Rsafept_cnt, Rres, R0, R1, R2, LR);
  96 #else
  97   assert_different_registers(Rsafepoint_counter_addr, Rsafept_cnt, Robj, Rres, LR);
  98   assert_different_registers(Rsafept_cnt, R1, R2, Rtmp1, LR);
  99   assert_different_registers(Rsafepoint_counter_addr, Rsafept_cnt, Rres, Rres_hi, Rtmp2, LR);
 100   assert_different_registers(Rsafept_cnt2, Rsafept_cnt, Rres, Rres_hi, LR);
 101 #endif // AARCH64
 102 
 103   address fast_entry;
 104 
 105   ResourceMark rm;
 106   BufferBlob* blob = BufferBlob::create(name, BUFFER_SIZE);
 107   CodeBuffer cbuf(blob);
 108   MacroAssembler* masm = new MacroAssembler(&cbuf);
 109   fast_entry = __ pc();
 110 
 111   // Safepoint check
 112   InlinedAddress safepoint_counter_addr(SafepointSynchronize::safepoint_counter_addr());
 113   Label slow_case;
 114   __ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
 115 
 116 #ifndef AARCH64
 117   __ push(RegisterSet(R0, R3));  // save incoming arguments for slow case
 118 #endif // !AARCH64
 119 
 120   __ ldr_s32(Rsafept_cnt, Address(Rsafepoint_counter_addr));
 121   __ tbnz(Rsafept_cnt, 0, slow_case);
 122 
 123   if (os::is_MP()) {
 124     // Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
 125     __ andr(Rtmp1, Rsafept_cnt, (unsigned)1);
 126     __ ldr(Robj, Address(R1, Rtmp1));
 127   } else {
 128     __ ldr(Robj, Address(R1));
 129   }
 130 
 131 #ifdef AARCH64
 132   __ add(Robj, Robj, AsmOperand(R2, lsr, 2));
 133   Address field_addr = Address(Robj);
 134 #else
 135   Address field_addr;
 136   if (type != T_BOOLEAN
 137       && type != T_INT
 138 #ifndef __ABI_HARD__
 139       && type != T_FLOAT
 140 #endif // !__ABI_HARD__
 141       ) {
 142     // Only ldr and ldrb support embedded shift, other loads do not
 143     __ add(Robj, Robj, AsmOperand(R2, lsr, 2));
 144     field_addr = Address(Robj);
 145   } else {
 146     field_addr = Address(Robj, R2, lsr, 2);
 147   }
 148 #endif // AARCH64
 149   assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
 150   speculative_load_pclist[count] = __ pc();
 151 
 152   switch (type) {
 153     case T_BOOLEAN:
 154       __ ldrb(Rres, field_addr);
 155       break;
 156     case T_BYTE:
 157       __ ldrsb(Rres, field_addr);
 158       break;
 159     case T_CHAR:
 160       __ ldrh(Rres, field_addr);
 161       break;
 162     case T_SHORT:
 163       __ ldrsh(Rres, field_addr);
 164       break;
 165     case T_INT:
 166 #ifndef __ABI_HARD__
 167     case T_FLOAT:
 168 #endif
 169       __ ldr_s32(Rres, field_addr);
 170       break;
 171     case T_LONG:
 172 #ifndef __ABI_HARD__
 173     case T_DOUBLE:
 174 #endif
 175 #ifdef AARCH64
 176       __ ldr(Rres, field_addr);
 177 #else
 178       // Safe to use ldrd since long and double fields are 8-byte aligned
 179       __ ldrd(Rres, field_addr);
 180 #endif // AARCH64
 181       break;
 182 #ifdef __ABI_HARD__
 183     case T_FLOAT:
 184       __ ldr_float(S0, field_addr);
 185       break;
 186     case T_DOUBLE:
 187       __ ldr_double(D0, field_addr);
 188       break;
 189 #endif // __ABI_HARD__
 190     default:
 191       ShouldNotReachHere();
 192   }
 193 
 194   if(os::is_MP()) {
 195       // Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
 196 #if defined(__ABI_HARD__) && !defined(AARCH64)
 197     if (type == T_FLOAT || type == T_DOUBLE) {
 198       __ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
 199       __ fmrrd(Rres, Rres_hi, D0);
 200       __ eor(Rtmp2, Rres, Rres);
 201       __ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr, Rtmp2));
 202     } else
 203 #endif // __ABI_HARD__ && !AARCH64
 204     {
 205 #ifndef AARCH64
 206       __ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
 207 #endif // !AARCH64
 208       __ eor(Rtmp2, Rres, Rres);
 209       __ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr, Rtmp2));
 210     }
 211   } else {
 212     __ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr));
 213   }
 214   __ cmp(Rsafept_cnt2, Rsafept_cnt);
 215 #ifdef AARCH64
 216   __ b(slow_case, ne);
 217   __ mov(R0, Rres);
 218   __ ret();
 219 #else
 220   // discards saved R0 R1 R2 R3
 221   __ add(SP, SP, 4 * wordSize, eq);
 222   __ bx(LR, eq);
 223 #endif // AARCH64
 224 
 225   slowcase_entry_pclist[count++] = __ pc();
 226 
 227   __ bind(slow_case);
 228 #ifndef AARCH64
 229   __ pop(RegisterSet(R0, R3));
 230 #endif // !AARCH64
 231   // thumb mode switch handled by MacroAssembler::jump if needed
 232   __ jump(slow_case_addr, relocInfo::none, Rtemp);
 233 
 234   __ bind_literal(safepoint_counter_addr);
 235 
 236   __ flush();
 237 
 238   guarantee((__ pc() - fast_entry) <= BUFFER_SIZE, "BUFFER_SIZE too small");
 239 
 240   return fast_entry;
 241 }
 242 
 243 address JNI_FastGetField::generate_fast_get_float_field0(BasicType type) {
 244   ShouldNotReachHere();
 245   return NULL;
 246 }
 247 
 248 address JNI_FastGetField::generate_fast_get_boolean_field() {
 249   return generate_fast_get_int_field0(T_BOOLEAN);
 250 }
 251 
 252 address JNI_FastGetField::generate_fast_get_byte_field() {
 253   return generate_fast_get_int_field0(T_BYTE);
 254 }
 255 
 256 address JNI_FastGetField::generate_fast_get_char_field() {
 257   return generate_fast_get_int_field0(T_CHAR);
 258 }
 259 
 260 address JNI_FastGetField::generate_fast_get_short_field() {
 261   return generate_fast_get_int_field0(T_SHORT);
 262 }
 263 
 264 address JNI_FastGetField::generate_fast_get_int_field() {
 265   return generate_fast_get_int_field0(T_INT);
 266 }
 267 
 268 address JNI_FastGetField::generate_fast_get_long_field() {
 269   return generate_fast_get_int_field0(T_LONG);
 270 }
 271 
 272 address JNI_FastGetField::generate_fast_get_float_field() {
 273   return generate_fast_get_int_field0(T_FLOAT);
 274 }
 275 
 276 address JNI_FastGetField::generate_fast_get_double_field() {
 277   return generate_fast_get_int_field0(T_DOUBLE);
 278 }