1 //
2 // Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 //
5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation.
8 //
9 // This code is distributed in the hope that it will be useful, but WITHOUT
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 // version 2 for more details (a copy is included in the LICENSE file that
13 // accompanied this code).
14 //
15 // You should have received a copy of the GNU General Public License version
16 // 2 along with this work; if not, write to the Free Software Foundation,
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 //
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 // or visit www.oracle.com if you need additional information or have any
21 // questions.
22 //
5785 format %{ "PREFETCHT0 $mem\t# Prefetch allocation to level 1 and 2 caches for write" %}
5786 ins_encode %{
5787 __ prefetcht0($mem$$Address);
5788 %}
5789 ins_pipe(ialu_mem);
5790 %}
5791
5792 instruct prefetchAllocT2( memory mem ) %{
5793 predicate(AllocatePrefetchInstr==2);
5794 match(PrefetchAllocation mem);
5795 ins_cost(125);
5796
5797 format %{ "PREFETCHT2 $mem\t# Prefetch allocation to level 2 cache for write" %}
5798 ins_encode %{
5799 __ prefetcht2($mem$$Address);
5800 %}
5801 ins_pipe(ialu_mem);
5802 %}
5803
5804 //----------Store Instructions-------------------------------------------------
5805
5806 // Store Byte
5807 instruct storeB(memory mem, rRegI src)
5808 %{
5809 match(Set mem (StoreB mem src));
5810
5811 ins_cost(125); // XXX
5812 format %{ "movb $mem, $src\t# byte" %}
5813 opcode(0x88);
5814 ins_encode(REX_breg_mem(src, mem), OpcP, reg_mem(src, mem));
5815 ins_pipe(ialu_mem_reg);
5816 %}
5817
5818 // Store Char/Short
5819 instruct storeC(memory mem, rRegI src)
5820 %{
5821 match(Set mem (StoreC mem src));
5822
5823 ins_cost(125); // XXX
5824 format %{ "movw $mem, $src\t# char/short" %}
|
1 //
2 // Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 //
5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation.
8 //
9 // This code is distributed in the hope that it will be useful, but WITHOUT
10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 // version 2 for more details (a copy is included in the LICENSE file that
13 // accompanied this code).
14 //
15 // You should have received a copy of the GNU General Public License version
16 // 2 along with this work; if not, write to the Free Software Foundation,
17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 //
19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 // or visit www.oracle.com if you need additional information or have any
21 // questions.
22 //
5785 format %{ "PREFETCHT0 $mem\t# Prefetch allocation to level 1 and 2 caches for write" %}
5786 ins_encode %{
5787 __ prefetcht0($mem$$Address);
5788 %}
5789 ins_pipe(ialu_mem);
5790 %}
5791
5792 instruct prefetchAllocT2( memory mem ) %{
5793 predicate(AllocatePrefetchInstr==2);
5794 match(PrefetchAllocation mem);
5795 ins_cost(125);
5796
5797 format %{ "PREFETCHT2 $mem\t# Prefetch allocation to level 2 cache for write" %}
5798 ins_encode %{
5799 __ prefetcht2($mem$$Address);
5800 %}
5801 ins_pipe(ialu_mem);
5802 %}
5803
5804 //----------Store Instructions-------------------------------------------------
5805 // Store Bit
5806 instruct storeZ0(memory mem, rRegI src)
5807 %{
5808 match(Set mem (StoreZ0 mem src));
5809
5810 ins_cost(125);
5811 format %{ "andb $mem, $src\t# byte" %}
5812 opcode(0x20);
5813 ins_encode(lock_prefix, REX_breg_mem(src, mem), OpcP, reg_mem(src, mem));
5814 ins_pipe(ialu_mem_reg);
5815 %}
5816
5817 instruct storeZ1(memory mem, rRegI src)
5818 %{
5819 match(Set mem (StoreZ1 mem src));
5820 ins_cost(125);
5821 format %{ "orb $mem, $src\t# byte" %}
5822 opcode(0x08);
5823 ins_encode(lock_prefix, REX_breg_mem(src, mem), OpcP, reg_mem(src, mem));
5824 ins_pipe(ialu_mem_reg);
5825 %}
5826
5827 // Store Byte
5828 instruct storeB(memory mem, rRegI src)
5829 %{
5830 match(Set mem (StoreB mem src));
5831
5832 ins_cost(125); // XXX
5833 format %{ "movb $mem, $src\t# byte" %}
5834 opcode(0x88);
5835 ins_encode(REX_breg_mem(src, mem), OpcP, reg_mem(src, mem));
5836 ins_pipe(ialu_mem_reg);
5837 %}
5838
5839 // Store Char/Short
5840 instruct storeC(memory mem, rRegI src)
5841 %{
5842 match(Set mem (StoreC mem src));
5843
5844 ins_cost(125); // XXX
5845 format %{ "movw $mem, $src\t# char/short" %}
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