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src/hotspot/cpu/x86/x86_64.ad
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*** 9261,9270 ****
--- 9261,9282 ----
ins_encode(REX_reg_mem(dst, src), OpcP, reg_mem(dst, src));
ins_pipe(ialu_reg_mem);
%}
// And Memory with Register
+ instruct andB_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
+ %{
+ match(Set dst (StoreB dst (AndI (LoadB dst) src)));
+ effect(KILL cr);
+
+ ins_cost(150);
+ format %{ "andb $dst, $src\t# byte" %}
+ opcode(0x20);
+ ins_encode(REX_breg_mem(src, dst), OpcP, reg_mem(src, dst));
+ ins_pipe(ialu_mem_reg);
+ %}
+
instruct andI_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
%{
match(Set dst (StoreI dst (AndI (LoadI dst) src)));
effect(KILL cr);
*** 9442,9451 ****
--- 9454,9475 ----
ins_encode(REX_reg_mem(dst, src), OpcP, reg_mem(dst, src));
ins_pipe(ialu_reg_mem);
%}
// Or Memory with Register
+ instruct orB_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
+ %{
+ match(Set dst (StoreB dst (OrI (LoadB dst) src)));
+ effect(KILL cr);
+
+ ins_cost(150);
+ format %{ "orb $dst, $src\t# byte" %}
+ opcode(0x08);
+ ins_encode(REX_breg_mem(src, dst), OpcP, reg_mem(src, dst));
+ ins_pipe(ialu_mem_reg);
+ %}
+
instruct orI_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
%{
match(Set dst (StoreI dst (OrI (LoadI dst) src)));
effect(KILL cr);
*** 9518,9527 ****
--- 9542,9563 ----
ins_encode(REX_reg_mem(dst, src), OpcP, reg_mem(dst, src));
ins_pipe(ialu_reg_mem);
%}
// Xor Memory with Register
+ instruct xorB_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
+ %{
+ match(Set dst (StoreB dst (XorI (LoadB dst) src)));
+ effect(KILL cr);
+
+ ins_cost(150);
+ format %{ "xorb $dst, $src\t# byte" %}
+ opcode(0x30);
+ ins_encode(REX_breg_mem(src, dst), OpcP, reg_mem(src, dst));
+ ins_pipe(ialu_mem_reg);
+ %}
+
instruct xorI_mem_rReg(memory dst, rRegI src, rFlagsReg cr)
%{
match(Set dst (StoreI dst (XorI (LoadI dst) src)));
effect(KILL cr);
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