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src/hotspot/cpu/aarch64/aarch64.ad

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3648 // the constant from stack.
3649 const bool Matcher::rematerialize_float_constants = false;
3650 
3651 // If CPU can load and store mis-aligned doubles directly then no
3652 // fixup is needed.  Else we split the double into 2 integer pieces
3653 // and move it piece-by-piece.  Only happens when passing doubles into
3654 // C code as the Java calling convention forces doubles to be aligned.
3655 const bool Matcher::misaligned_doubles_ok = true;
3656 
3657 // No-op on amd64
3658 void Matcher::pd_implicit_null_fixup(MachNode *node, uint idx) {
3659   Unimplemented();
3660 }
3661 
3662 // Advertise here if the CPU requires explicit rounding operations to
3663 // implement the UseStrictFP mode.
3664 const bool Matcher::strict_fp_requires_explicit_rounding = false;
3665 
3666 // Are floats converted to double when stored to stack during
3667 // deoptimization?
3668 bool Matcher::float_in_double() { return true; }
3669 
3670 // Do ints take an entire long register or just half?
3671 // The relevant question is how the int is callee-saved:
3672 // the whole long is written but de-opt'ing will have to extract
3673 // the relevant 32 bits.
3674 const bool Matcher::int_in_long = true;
3675 
3676 // Return whether or not this register is ever used as an argument.
3677 // This function is used on startup to build the trampoline stubs in
3678 // generateOptoStub.  Registers not mentioned will be killed by the VM
3679 // call in the trampoline, and arguments in those registers not be
3680 // available to the callee.
3681 bool Matcher::can_be_java_arg(int reg)
3682 {
3683   return
3684     reg ==  R0_num || reg == R0_H_num ||
3685     reg ==  R1_num || reg == R1_H_num ||
3686     reg ==  R2_num || reg == R2_H_num ||
3687     reg ==  R3_num || reg == R3_H_num ||
3688     reg ==  R4_num || reg == R4_H_num ||




3648 // the constant from stack.
3649 const bool Matcher::rematerialize_float_constants = false;
3650 
3651 // If CPU can load and store mis-aligned doubles directly then no
3652 // fixup is needed.  Else we split the double into 2 integer pieces
3653 // and move it piece-by-piece.  Only happens when passing doubles into
3654 // C code as the Java calling convention forces doubles to be aligned.
3655 const bool Matcher::misaligned_doubles_ok = true;
3656 
3657 // No-op on amd64
3658 void Matcher::pd_implicit_null_fixup(MachNode *node, uint idx) {
3659   Unimplemented();
3660 }
3661 
3662 // Advertise here if the CPU requires explicit rounding operations to
3663 // implement the UseStrictFP mode.
3664 const bool Matcher::strict_fp_requires_explicit_rounding = false;
3665 
3666 // Are floats converted to double when stored to stack during
3667 // deoptimization?
3668 bool Matcher::float_in_double() { return false; }
3669 
3670 // Do ints take an entire long register or just half?
3671 // The relevant question is how the int is callee-saved:
3672 // the whole long is written but de-opt'ing will have to extract
3673 // the relevant 32 bits.
3674 const bool Matcher::int_in_long = true;
3675 
3676 // Return whether or not this register is ever used as an argument.
3677 // This function is used on startup to build the trampoline stubs in
3678 // generateOptoStub.  Registers not mentioned will be killed by the VM
3679 // call in the trampoline, and arguments in those registers not be
3680 // available to the callee.
3681 bool Matcher::can_be_java_arg(int reg)
3682 {
3683   return
3684     reg ==  R0_num || reg == R0_H_num ||
3685     reg ==  R1_num || reg == R1_H_num ||
3686     reg ==  R2_num || reg == R2_H_num ||
3687     reg ==  R3_num || reg == R3_H_num ||
3688     reg ==  R4_num || reg == R4_H_num ||


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