< prev index next >
src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp
Print this page
*** 180,189 ****
--- 180,190 ----
template<class T>
inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); }
// imm is limited to 12 bits.
inline void cmp(Register Rd, unsigned imm) { subs(zr, Rd, imm); }
+ inline void cmp(Register Rd, Register Rn, unsigned imm) { subs(Rd, Rn, imm); }
inline void cmnw(Register Rd, unsigned imm) { addsw(zr, Rd, imm); }
inline void cmn(Register Rd, unsigned imm) { adds(zr, Rd, imm); }
void cset(Register Rd, Assembler::Condition cond) {
< prev index next >