165
166 // Frame creation and destruction shared between JITs.
167 void build_frame(int framesize);
168 void remove_frame(int framesize);
169
170 virtual void _call_Unimplemented(address call_site) {
171 mov(rscratch2, call_site);
172 haltsim();
173 }
174
175 #define call_Unimplemented() _call_Unimplemented((address)__PRETTY_FUNCTION__)
176
177 virtual void notify(int type);
178
179 // aliases defined in AARCH64 spec
180
181 template<class T>
182 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); }
183 // imm is limited to 12 bits.
184 inline void cmp(Register Rd, unsigned imm) { subs(zr, Rd, imm); }
185
186 inline void cmnw(Register Rd, unsigned imm) { addsw(zr, Rd, imm); }
187 inline void cmn(Register Rd, unsigned imm) { adds(zr, Rd, imm); }
188
189 void cset(Register Rd, Assembler::Condition cond) {
190 csinc(Rd, zr, zr, ~cond);
191 }
192 void csetw(Register Rd, Assembler::Condition cond) {
193 csincw(Rd, zr, zr, ~cond);
194 }
195
196 void cneg(Register Rd, Register Rn, Assembler::Condition cond) {
197 csneg(Rd, Rn, Rn, ~cond);
198 }
199 void cnegw(Register Rd, Register Rn, Assembler::Condition cond) {
200 csnegw(Rd, Rn, Rn, ~cond);
201 }
202
203 inline void movw(Register Rd, Register Rn) {
204 if (Rd == sp || Rn == sp) {
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165
166 // Frame creation and destruction shared between JITs.
167 void build_frame(int framesize);
168 void remove_frame(int framesize);
169
170 virtual void _call_Unimplemented(address call_site) {
171 mov(rscratch2, call_site);
172 haltsim();
173 }
174
175 #define call_Unimplemented() _call_Unimplemented((address)__PRETTY_FUNCTION__)
176
177 virtual void notify(int type);
178
179 // aliases defined in AARCH64 spec
180
181 template<class T>
182 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); }
183 // imm is limited to 12 bits.
184 inline void cmp(Register Rd, unsigned imm) { subs(zr, Rd, imm); }
185 inline void cmp(Register Rd, Register Rn, unsigned imm) { subs(Rd, Rn, imm); }
186
187 inline void cmnw(Register Rd, unsigned imm) { addsw(zr, Rd, imm); }
188 inline void cmn(Register Rd, unsigned imm) { adds(zr, Rd, imm); }
189
190 void cset(Register Rd, Assembler::Condition cond) {
191 csinc(Rd, zr, zr, ~cond);
192 }
193 void csetw(Register Rd, Assembler::Condition cond) {
194 csincw(Rd, zr, zr, ~cond);
195 }
196
197 void cneg(Register Rd, Register Rn, Assembler::Condition cond) {
198 csneg(Rd, Rn, Rn, ~cond);
199 }
200 void cnegw(Register Rd, Register Rn, Assembler::Condition cond) {
201 csnegw(Rd, Rn, Rn, ~cond);
202 }
203
204 inline void movw(Register Rd, Register Rn) {
205 if (Rd == sp || Rn == sp) {
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