src/hotspot/cpu/aarch64/macroAssembler_aarch64_trig.cpp

8248238: Adding Windows support to OpenJDK on AArch64

Summary: LP64 vs LLP64 changes to add Windows support

Contributed-by: Monica Beckwith <monica.beckwith@microsoft.com>, Ludovic Henry <luhenry@microsoft.com>
Reviewed-by:

*** 199,211 ****
  //     2. Return n in r2, y[0] == y0 == v4, y[1] == y1 == v5
  // NOTE: general purpose register names match local variable names in C code
  // NOTE: fpu registers are actively reused. See comments in code about their usage
  void MacroAssembler::generate__ieee754_rem_pio2(address npio2_hw,
      address two_over_pi, address pio2) {
!   const long PIO2_1t = 0x3DD0B4611A626331UL;
!   const long PIO2_2  = 0x3DD0B4611A600000UL;
!   const long PIO2_2t = 0x3BA3198A2E037073UL;
    Label X_IS_NEGATIVE, X_IS_MEDIUM_OR_LARGE, X_IS_POSITIVE_LONG_PI, LARGE_ELSE,
        REDUCTION_DONE, X_IS_MEDIUM_BRANCH_DONE, X_IS_LARGE, NX_SET,
        X_IS_NEGATIVE_LONG_PI;
    Register X = r0, n = r2, ix = r3, jv = r4, tmp5 = r5, jx = r6,
        tmp3 = r7, iqBase = r10, ih = r11, i = r17;
--- 199,211 ----
  //     2. Return n in r2, y[0] == y0 == v4, y[1] == y1 == v5
  // NOTE: general purpose register names match local variable names in C code
  // NOTE: fpu registers are actively reused. See comments in code about their usage
  void MacroAssembler::generate__ieee754_rem_pio2(address npio2_hw,
      address two_over_pi, address pio2) {
!   const int64_t PIO2_1t = 0x3DD0B4611A626331UL;
!   const int64_t PIO2_2  = 0x3DD0B4611A600000UL;
!   const int64_t PIO2_2t = 0x3BA3198A2E037073UL;
    Label X_IS_NEGATIVE, X_IS_MEDIUM_OR_LARGE, X_IS_POSITIVE_LONG_PI, LARGE_ELSE,
        REDUCTION_DONE, X_IS_MEDIUM_BRANCH_DONE, X_IS_LARGE, NX_SET,
        X_IS_NEGATIVE_LONG_PI;
    Register X = r0, n = r2, ix = r3, jv = r4, tmp5 = r5, jx = r6,
        tmp3 = r7, iqBase = r10, ih = r11, i = r17;