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src/hotspot/cpu/aarch64/nativeInst_aarch64.hpp

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8248238: Adding Windows support to OpenJDK on AArch64

Summary: LP64 vs LLP64 changes to add Windows support

Contributed-by: Monica Beckwith <monica.beckwith@microsoft.com>, Ludovic Henry <luhenry@microsoft.com>
Reviewed-by:


 667 public:
 668   Register target() {
 669     uint32_t r = Instruction_aarch64::extract(uint_at(0), 4, 0);
 670     return r == 0x1f ? zr : as_Register(r);
 671   }
 672   Register base() {
 673     uint32_t b = Instruction_aarch64::extract(uint_at(0), 9, 5);
 674     return b == 0x1f ? sp : as_Register(b);
 675   }
 676   int64_t offset() {
 677     if (is_ldst_ur()) {
 678       return Instruction_aarch64::sextract(uint_at(0), 20, 12);
 679     } else if (is_ldst_unsigned_offset()) {
 680       return Instruction_aarch64::extract(uint_at(0), 21, 10) << size();
 681     } else {
 682       // others like: pre-index or post-index.
 683       ShouldNotReachHere();
 684       return 0;
 685     }
 686   }
 687   size_t size_in_bytes() { return 1 << size(); }
 688   bool is_not_pre_post_index() { return (is_ldst_ur() || is_ldst_unsigned_offset()); }
 689   bool is_load() {
 690     assert(Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b01 ||
 691            Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b00, "must be ldr or str");
 692 
 693     return Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b01;
 694   }
 695   bool is_store() {
 696     assert(Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b01 ||
 697            Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b00, "must be ldr or str");
 698 
 699     return Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b00;
 700   }
 701 };
 702 
 703 inline NativeLdSt *NativeLdSt_at(address addr) {
 704   assert(nativeInstruction_at(addr)->is_Imm_LdSt(), "no immediate load/store found");
 705   return (NativeLdSt*)addr;
 706 }
 707 #endif // CPU_AARCH64_NATIVEINST_AARCH64_HPP



 667 public:
 668   Register target() {
 669     uint32_t r = Instruction_aarch64::extract(uint_at(0), 4, 0);
 670     return r == 0x1f ? zr : as_Register(r);
 671   }
 672   Register base() {
 673     uint32_t b = Instruction_aarch64::extract(uint_at(0), 9, 5);
 674     return b == 0x1f ? sp : as_Register(b);
 675   }
 676   int64_t offset() {
 677     if (is_ldst_ur()) {
 678       return Instruction_aarch64::sextract(uint_at(0), 20, 12);
 679     } else if (is_ldst_unsigned_offset()) {
 680       return Instruction_aarch64::extract(uint_at(0), 21, 10) << size();
 681     } else {
 682       // others like: pre-index or post-index.
 683       ShouldNotReachHere();
 684       return 0;
 685     }
 686   }
 687   size_t size_in_bytes() { return 1ULL << size(); }
 688   bool is_not_pre_post_index() { return (is_ldst_ur() || is_ldst_unsigned_offset()); }
 689   bool is_load() {
 690     assert(Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b01 ||
 691            Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b00, "must be ldr or str");
 692 
 693     return Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b01;
 694   }
 695   bool is_store() {
 696     assert(Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b01 ||
 697            Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b00, "must be ldr or str");
 698 
 699     return Instruction_aarch64::extract(uint_at(0), 23, 22) == 0b00;
 700   }
 701 };
 702 
 703 inline NativeLdSt *NativeLdSt_at(address addr) {
 704   assert(nativeInstruction_at(addr)->is_Imm_LdSt(), "no immediate load/store found");
 705   return (NativeLdSt*)addr;
 706 }
 707 #endif // CPU_AARCH64_NATIVEINST_AARCH64_HPP
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