1 /* 2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_SPARC_VM_FRAME_SPARC_HPP 26 #define CPU_SPARC_VM_FRAME_SPARC_HPP 27 28 #include "runtime/synchronizer.hpp" 29 #include "utilities/top.hpp" 30 31 // A frame represents a physical stack frame (an activation). Frames can be 32 // C or Java frames, and the Java frames can be interpreted or compiled. 33 // In contrast, vframes represent source-level activations, so that one physical frame 34 // can correspond to multiple source level frames because of inlining. 35 // A frame is comprised of {pc, sp, younger_sp} 36 37 38 // Layout of asm interpreter frame: 39 // 40 // 0xfffffff 41 // ...... 42 // [last extra incoming arg, (local # Nargs > 6 ? Nargs-1 : undef)] 43 // .. Note: incoming args are copied to local frame area upon entry 44 // [first extra incoming arg, (local # Nargs > 6 ? 6 : undef)] 45 // [6 words for C-arg storage (unused)] Are this and next one really needed? 46 // [C-aggregate-word (unused)] Yes, if want extra params to be in same place as C convention 47 // [16 words for register saving] <--- FP 48 // [interpreter_frame_vm_locals ] (see below) 49 50 // Note: Llocals is always double-word aligned 51 // [first local i.e. local # 0] <-- Llocals 52 // ... 53 // [last local, i.e. local # Nlocals-1] 54 55 // [monitors ] 56 // .... 57 // [monitors ] <-- Lmonitors (same as Llocals + 6*4 if none) 58 // (must be double-word aligned because 59 // monitor element size is constrained to 60 // doubleword) 61 // 62 // <-- Lesp (points 1 past TOS) 63 // [bottom word used for stack ] 64 // ... 65 // [top word used for stack] (first word of stack is double-word aligned) 66 67 // [space for outgoing args (conservatively allocated as max_stack - 6 + interpreter_frame_extra_outgoing_argument_words)] 68 // [6 words for C-arg storage] 69 // [C-aggregate-word (unused)] 70 // [16 words for register saving] <--- SP 71 // ... 72 // 0x0000000 73 // 74 // The in registers and local registers are preserved in a block at SP. 75 // 76 // The first six in registers (I0..I5) hold the first six locals. 77 // The locals are used as follows: 78 // Lesp first free element of expression stack 79 // (which grows towards __higher__ addresses) 80 // Lbcp is set to address of bytecode to execute 81 // It may at times (during GC) be an index instead. 82 // Lmethod the method being interpreted 83 // Llocals the base pointer for accessing the locals array 84 // (lower-numbered locals have lower addresses) 85 // Lmonitors the base pointer for accessing active monitors 86 // Lcache a saved pointer to the method's constant pool cache 87 // 88 // 89 // When calling out to another method, 90 // G5_method is set to method to call, G5_inline_cache_klass may be set, 91 // parameters are put in O registers, and also extra parameters 92 // must be cleverly copied from the top of stack to the outgoing param area in the frame, 93 // ------------------------------ C++ interpreter ---------------------------------------- 94 // Layout of C++ interpreter frame: 95 // 96 97 98 99 // All frames: 100 101 public: 102 103 enum { 104 // normal return address is 2 words past PC 105 pc_return_offset = 2 * BytesPerInstWord, 106 107 // size of each block, in order of increasing address: 108 register_save_words = 16, 109 #ifdef _LP64 110 callee_aggregate_return_pointer_words = 0, 111 #else 112 callee_aggregate_return_pointer_words = 1, 113 #endif 114 callee_register_argument_save_area_words = 6, 115 // memory_parameter_words = <arbitrary>, 116 117 // offset of each block, in order of increasing address: 118 // (note: callee_register_argument_save_area_words == Assembler::n_register_parameters) 119 register_save_words_sp_offset = 0, 120 callee_aggregate_return_pointer_sp_offset = register_save_words_sp_offset + register_save_words, 121 callee_register_argument_save_area_sp_offset = callee_aggregate_return_pointer_sp_offset + callee_aggregate_return_pointer_words, 122 memory_parameter_word_sp_offset = callee_register_argument_save_area_sp_offset + callee_register_argument_save_area_words, 123 varargs_offset = memory_parameter_word_sp_offset 124 }; 125 126 private: 127 intptr_t* _younger_sp; // optional SP of callee (used to locate O7) 128 int _sp_adjustment_by_callee; // adjustment in words to SP by callee for making locals contiguous 129 130 // Note: On SPARC, unlike Intel, the saved PC for a stack frame 131 // is stored at a __variable__ distance from that frame's SP. 132 // (In fact, it may be in the register save area of the callee frame, 133 // but that fact need not bother us.) Thus, we must store the 134 // address of that saved PC explicitly. On the other hand, SPARC 135 // stores the FP for a frame at a fixed offset from the frame's SP, 136 // so there is no need for a separate "frame::_fp" field. 137 138 public: 139 // Accessors 140 141 intptr_t* younger_sp() const { 142 assert(_younger_sp != NULL, "frame must possess a younger_sp"); 143 return _younger_sp; 144 } 145 146 int callee_sp_adjustment() const { return _sp_adjustment_by_callee; } 147 void set_sp_adjustment_by_callee(int number_of_words) { _sp_adjustment_by_callee = number_of_words; } 148 149 // Constructors 150 151 // This constructor relies on the fact that the creator of a frame 152 // has flushed register windows which the frame will refer to, and 153 // that those register windows will not be reloaded until the frame is 154 // done reading and writing the stack. Moreover, if the "younger_sp" 155 // argument points into the register save area of the next younger 156 // frame (though it need not), the register window for that next 157 // younger frame must also stay flushed. (The caller is responsible 158 // for ensuring this.) 159 160 frame(intptr_t* sp, intptr_t* younger_sp, bool younger_frame_adjusted_stack = false); 161 162 // make a deficient frame which doesn't know where its PC is: 163 enum unpatchable_t { unpatchable }; 164 frame(intptr_t* sp, unpatchable_t, address pc = NULL, CodeBlob* cb = NULL); 165 166 // Walk from sp outward looking for old_sp, and return old_sp's predecessor 167 // (i.e. return the sp from the frame where old_sp is the fp). 168 // Register windows are assumed to be flushed for the stack in question. 169 170 static intptr_t* next_younger_sp_or_null(intptr_t* old_sp, intptr_t* sp); 171 172 // Return true if sp is a younger sp in the stack described by valid_sp. 173 static bool is_valid_stack_pointer(intptr_t* valid_sp, intptr_t* sp); 174 175 public: 176 // accessors for the instance variables 177 intptr_t* fp() const { return (intptr_t*) ((intptr_t)(sp()[FP->sp_offset_in_saved_window()]) + STACK_BIAS ); } 178 179 // All frames 180 181 intptr_t* fp_addr_at(int index) const { return &fp()[index]; } 182 intptr_t* sp_addr_at(int index) const { return &sp()[index]; } 183 intptr_t fp_at( int index) const { return *fp_addr_at(index); } 184 intptr_t sp_at( int index) const { return *sp_addr_at(index); } 185 186 private: 187 inline address* I7_addr() const; 188 inline address* O7_addr() const; 189 190 inline address* I0_addr() const; 191 inline address* O0_addr() const; 192 intptr_t* younger_sp_addr_at(int index) const { return &younger_sp()[index]; } 193 194 public: 195 // access to SPARC arguments and argument registers 196 197 // Assumes reg is an in/local register 198 intptr_t* register_addr(Register reg) const { 199 return sp_addr_at(reg->sp_offset_in_saved_window()); 200 } 201 202 // Assumes reg is an out register 203 intptr_t* out_register_addr(Register reg) const { 204 return younger_sp_addr_at(reg->after_save()->sp_offset_in_saved_window()); 205 } 206 207 208 // Interpreter frames 209 210 public: 211 // Asm interpreter 212 #ifndef CC_INTERP 213 enum interpreter_frame_vm_locals { 214 // 2 words, also used to save float regs across calls to C 215 interpreter_frame_d_scratch_fp_offset = -2, 216 interpreter_frame_l_scratch_fp_offset = -4, 217 interpreter_frame_padding_offset = -5, // for native calls only 218 interpreter_frame_oop_temp_offset = -6, // for native calls only 219 interpreter_frame_vm_locals_fp_offset = -6, // should be same as above, and should be zero mod 8 220 221 interpreter_frame_vm_local_words = -interpreter_frame_vm_locals_fp_offset, 222 223 224 // interpreter frame set-up needs to save 2 extra words in outgoing param area 225 // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_ 226 227 interpreter_frame_extra_outgoing_argument_words = 2 228 }; 229 #else 230 enum interpreter_frame_vm_locals { 231 // 2 words, also used to save float regs across calls to C 232 interpreter_state_ptr_offset = 0, // Is in L0 (Lstate) in save area 233 interpreter_frame_mirror_offset = 1, // Is in L1 (Lmirror) in save area (for native calls only) 234 235 // interpreter frame set-up needs to save 2 extra words in outgoing param area 236 // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_ 237 238 interpreter_frame_extra_outgoing_argument_words = 2 239 }; 240 #endif /* CC_INTERP */ 241 242 enum compiler_frame_fixed_locals { 243 compiler_frame_vm_locals_fp_offset = -2 244 }; 245 246 private: 247 ConstantPoolCache** interpreter_frame_cpoolcache_addr() const; 248 249 #ifndef CC_INTERP 250 251 // where Lmonitors is saved: 252 inline BasicObjectLock** interpreter_frame_monitors_addr() const; 253 inline intptr_t** interpreter_frame_esp_addr() const; 254 255 inline void interpreter_frame_set_tos_address(intptr_t* x); 256 257 // monitors: 258 259 // next two fns read and write Lmonitors value, 260 private: 261 BasicObjectLock* interpreter_frame_monitors() const; 262 void interpreter_frame_set_monitors(BasicObjectLock* monitors); 263 #else 264 public: 265 inline interpreterState get_interpreterState() const { 266 return ((interpreterState)sp_at(interpreter_state_ptr_offset)); 267 } 268 269 #endif /* CC_INTERP */ 270 271 public: 272 273 #endif // CPU_SPARC_VM_FRAME_SPARC_HPP