1 /* 2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_SPARC_VM_FRAME_SPARC_HPP 26 #define CPU_SPARC_VM_FRAME_SPARC_HPP 27 28 #include "runtime/synchronizer.hpp" 29 #include "utilities/top.hpp" 30 31 // A frame represents a physical stack frame (an activation). Frames can be 32 // C or Java frames, and the Java frames can be interpreted or compiled. 33 // In contrast, vframes represent source-level activations, so that one physical frame 34 // can correspond to multiple source level frames because of inlining. 35 // A frame is comprised of {pc, sp, younger_sp} 36 37 38 // Layout of asm interpreter frame: 39 // 40 // 0xfffffff 41 // ...... 42 // [last extra incoming arg, (local # Nargs > 6 ? Nargs-1 : undef)] 43 // .. Note: incoming args are copied to local frame area upon entry 44 // [first extra incoming arg, (local # Nargs > 6 ? 6 : undef)] 45 // [6 words for C-arg storage (unused)] Are this and next one really needed? 46 // [C-aggregate-word (unused)] Yes, if want extra params to be in same place as C convention 47 // [16 words for register saving] <--- FP 48 // [interpreter_frame_vm_locals ] (see below) 49 50 // Note: Llocals is always double-word aligned 51 // [first local i.e. local # 0] <-- Llocals 52 // ... 53 // [last local, i.e. local # Nlocals-1] 54 55 // [monitors ] 56 // .... 57 // [monitors ] <-- Lmonitors (same as Llocals + 6*4 if none) 58 // (must be double-word aligned because 59 // monitor element size is constrained to 60 // doubleword) 61 // 62 // <-- Lesp (points 1 past TOS) 63 // [bottom word used for stack ] 64 // ... 65 // [top word used for stack] (first word of stack is double-word aligned) 66 67 // [space for outgoing args (conservatively allocated as max_stack - 6 + interpreter_frame_extra_outgoing_argument_words)] 68 // [6 words for C-arg storage] 69 // [C-aggregate-word (unused)] 70 // [16 words for register saving] <--- SP 71 // ... 72 // 0x0000000 73 // 74 // The in registers and local registers are preserved in a block at SP. 75 // 76 // The first six in registers (I0..I5) hold the first six locals. 77 // The locals are used as follows: 78 // Lesp first free element of expression stack 79 // (which grows towards __higher__ addresses) 80 // Lbcp is set to address of bytecode to execute 81 // It may at times (during GC) be an index instead. 82 // Lmethod the method being interpreted 83 // Llocals the base pointer for accessing the locals array 84 // (lower-numbered locals have lower addresses) 85 // Lmonitors the base pointer for accessing active monitors 86 // Lcache a saved pointer to the method's constant pool cache 87 // 88 // 89 // When calling out to another method, 90 // G5_method is set to method to call, G5_inline_cache_klass may be set, 91 // parameters are put in O registers, and also extra parameters 92 // must be cleverly copied from the top of stack to the outgoing param area in the frame, 93 94 // All frames: 95 96 public: 97 98 enum { 99 // normal return address is 2 words past PC 100 pc_return_offset = 2 * BytesPerInstWord, 101 102 // size of each block, in order of increasing address: 103 register_save_words = 16, 104 #ifdef _LP64 105 callee_aggregate_return_pointer_words = 0, 106 #else 107 callee_aggregate_return_pointer_words = 1, 108 #endif 109 callee_register_argument_save_area_words = 6, 110 // memory_parameter_words = <arbitrary>, 111 112 // offset of each block, in order of increasing address: 113 // (note: callee_register_argument_save_area_words == Assembler::n_register_parameters) 114 register_save_words_sp_offset = 0, 115 callee_aggregate_return_pointer_sp_offset = register_save_words_sp_offset + register_save_words, 116 callee_register_argument_save_area_sp_offset = callee_aggregate_return_pointer_sp_offset + callee_aggregate_return_pointer_words, 117 memory_parameter_word_sp_offset = callee_register_argument_save_area_sp_offset + callee_register_argument_save_area_words, 118 varargs_offset = memory_parameter_word_sp_offset 119 }; 120 121 private: 122 intptr_t* _younger_sp; // optional SP of callee (used to locate O7) 123 int _sp_adjustment_by_callee; // adjustment in words to SP by callee for making locals contiguous 124 125 // Note: On SPARC, unlike Intel, the saved PC for a stack frame 126 // is stored at a __variable__ distance from that frame's SP. 127 // (In fact, it may be in the register save area of the callee frame, 128 // but that fact need not bother us.) Thus, we must store the 129 // address of that saved PC explicitly. On the other hand, SPARC 130 // stores the FP for a frame at a fixed offset from the frame's SP, 131 // so there is no need for a separate "frame::_fp" field. 132 133 public: 134 // Accessors 135 136 intptr_t* younger_sp() const { 137 assert(_younger_sp != NULL, "frame must possess a younger_sp"); 138 return _younger_sp; 139 } 140 141 int callee_sp_adjustment() const { return _sp_adjustment_by_callee; } 142 void set_sp_adjustment_by_callee(int number_of_words) { _sp_adjustment_by_callee = number_of_words; } 143 144 // Constructors 145 146 // This constructor relies on the fact that the creator of a frame 147 // has flushed register windows which the frame will refer to, and 148 // that those register windows will not be reloaded until the frame is 149 // done reading and writing the stack. Moreover, if the "younger_sp" 150 // argument points into the register save area of the next younger 151 // frame (though it need not), the register window for that next 152 // younger frame must also stay flushed. (The caller is responsible 153 // for ensuring this.) 154 155 frame(intptr_t* sp, intptr_t* younger_sp, bool younger_frame_adjusted_stack = false); 156 157 // make a deficient frame which doesn't know where its PC is: 158 enum unpatchable_t { unpatchable }; 159 frame(intptr_t* sp, unpatchable_t, address pc = NULL, CodeBlob* cb = NULL); 160 161 void init(intptr_t* sp, address pc, CodeBlob* cb); 162 163 // Walk from sp outward looking for old_sp, and return old_sp's predecessor 164 // (i.e. return the sp from the frame where old_sp is the fp). 165 // Register windows are assumed to be flushed for the stack in question. 166 167 static intptr_t* next_younger_sp_or_null(intptr_t* old_sp, intptr_t* sp); 168 169 // Return true if sp is a younger sp in the stack described by valid_sp. 170 static bool is_valid_stack_pointer(intptr_t* valid_sp, intptr_t* sp); 171 172 public: 173 // accessors for the instance variables 174 intptr_t* fp() const { return (intptr_t*) ((intptr_t)(sp()[FP->sp_offset_in_saved_window()]) + STACK_BIAS ); } 175 176 // All frames 177 178 intptr_t* fp_addr_at(int index) const { return &fp()[index]; } 179 intptr_t* sp_addr_at(int index) const { return &sp()[index]; } 180 intptr_t fp_at( int index) const { return *fp_addr_at(index); } 181 intptr_t sp_at( int index) const { return *sp_addr_at(index); } 182 183 private: 184 inline address* I7_addr() const; 185 inline address* O7_addr() const; 186 187 inline address* I0_addr() const; 188 inline address* O0_addr() const; 189 intptr_t* younger_sp_addr_at(int index) const { return &younger_sp()[index]; } 190 191 public: 192 // access to SPARC arguments and argument registers 193 194 // Assumes reg is an in/local register 195 intptr_t* register_addr(Register reg) const { 196 return sp_addr_at(reg->sp_offset_in_saved_window()); 197 } 198 199 // Assumes reg is an out register 200 intptr_t* out_register_addr(Register reg) const { 201 return younger_sp_addr_at(reg->after_save()->sp_offset_in_saved_window()); 202 } 203 204 205 // Interpreter frames 206 207 public: 208 // Asm interpreter 209 enum interpreter_frame_vm_locals { 210 // 2 words, also used to save float regs across calls to C 211 interpreter_frame_d_scratch_fp_offset = -2, 212 interpreter_frame_l_scratch_fp_offset = -4, 213 interpreter_frame_padding_offset = -5, // for native calls only 214 interpreter_frame_oop_temp_offset = -6, // for native calls only 215 interpreter_frame_vm_locals_fp_offset = -6, // should be same as above, and should be zero mod 8 216 217 interpreter_frame_vm_local_words = -interpreter_frame_vm_locals_fp_offset, 218 219 220 // interpreter frame set-up needs to save 2 extra words in outgoing param area 221 // for class and jnienv arguments for native stubs (see nativeStubGen_sparc.cpp_ 222 223 interpreter_frame_extra_outgoing_argument_words = 2 224 }; 225 226 enum compiler_frame_fixed_locals { 227 compiler_frame_vm_locals_fp_offset = -2 228 }; 229 230 private: 231 ConstantPoolCache** interpreter_frame_cpoolcache_addr() const; 232 233 // where Lmonitors is saved: 234 inline BasicObjectLock** interpreter_frame_monitors_addr() const; 235 inline intptr_t** interpreter_frame_esp_addr() const; 236 237 inline void interpreter_frame_set_tos_address(intptr_t* x); 238 239 // monitors: 240 241 // next two fns read and write Lmonitors value, 242 private: 243 BasicObjectLock* interpreter_frame_monitors() const; 244 void interpreter_frame_set_monitors(BasicObjectLock* monitors); 245 public: 246 247 #endif // CPU_SPARC_VM_FRAME_SPARC_HPP