src/cpu/sparc/vm/interp_masm_sparc.hpp
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*** old/src/cpu/sparc/vm/interp_masm_sparc.hpp	Thu Dec 17 17:51:58 2015
--- new/src/cpu/sparc/vm/interp_masm_sparc.hpp	Thu Dec 17 17:51:58 2015

*** 52,62 **** --- 52,61 ---- #define Ftos_d2 F1 #endif // DONT_USE_REGISTER_DEFINES class InterpreterMacroAssembler: public MacroAssembler { protected: #ifndef CC_INTERP // Interpreter specific version of call_VM_base virtual void call_VM_leaf_base( Register java_thread, address entry_point, int number_of_arguments
*** 74,106 **** --- 73,100 ---- virtual void check_and_handle_popframe(Register java_thread); virtual void check_and_handle_earlyret(Register java_thread); // base routine for all dispatches void dispatch_base(TosState state, address* table); #endif /* CC_INTERP */ public: InterpreterMacroAssembler(CodeBuffer* c) : MacroAssembler(c) {} void jump_to_entry(address entry); #ifndef CC_INTERP virtual void load_earlyret_value(TosState state); static const Address l_tmp ; static const Address d_tmp ; #endif /* CC_INTERP */ // helper routine for frame allocation/deallocation // compute the delta by which the caller's SP has to // be adjusted to accomodate for the non-argument // locals void compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta); #ifndef CC_INTERP // dispatch routines void dispatch_prolog(TosState state, int step = 0); void dispatch_epilog(TosState state, int step = 0); void dispatch_only(TosState state); void dispatch_normal(TosState state);
*** 116,126 **** --- 110,119 ---- bool throw_monitor_exception = true, bool install_monitor_exception = true); protected: void dispatch_Lbyte_code(TosState state, address* table, int bcp_incr = 0, bool verify = true); #endif /* CC_INTERP */ public: // Super call_VM calls - correspond to MacroAssembler::call_VM(_leaf) calls void super_call_VM(Register thread_cache, Register oop_result,
*** 128,138 **** --- 121,130 ---- address entry_point, Register arg_1, Register arg_2, bool check_exception = true); #ifndef CC_INTERP void super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2); // Generate a subtype check: branch to ok_is_subtype if sub_klass is // a subtype of super_klass. Blows registers tmp1, tmp2 and tmp3. void gen_subtype_check( Register sub_klass, Register super_klass, Register tmp1, Register tmp2, Register tmp3, Label &ok_is_subtype );
*** 263,285 **** --- 255,273 ---- static int top_most_monitor_byte_offset(); // offset in bytes to top of monitor block Address top_most_monitor(); void compute_stack_base( Register Rdest ); #endif /* CC_INTERP */ void get_method_counters(Register method, Register Rcounters, Label& skip); void increment_invocation_counter( Register Rcounters, Register Rtmp, Register Rtmp2 ); void increment_backedge_counter( Register Rcounters, Register Rtmp, Register Rtmp2 ); #ifndef CC_INTERP void test_backedge_count_for_osr(Register backedge_count, Register method_counters, Register branch_bcp, Register Rtmp ); #endif /* CC_INTERP */ // Object locking void lock_object (Register lock_reg, Register obj_reg); void unlock_object(Register lock_reg); #ifndef CC_INTERP // Interpreter profiling operations void set_method_data_pointer(); void set_method_data_pointer_for_bcp(); void test_method_data_pointer(Label& zero_continue); void verify_method_data_pointer();
*** 339,349 **** --- 327,336 ---- // Debugging void interp_verify_oop(Register reg, TosState state, const char * file, int line); // only if +VerifyOops && state == atos void verify_oop_or_return_address(Register reg, Register rtmp); // for astore void verify_FPU(int stack_depth, TosState state = ftos); // only if +VerifyFPU && (state == ftos || state == dtos) #endif /* CC_INTERP */ // support for JVMTI/Dtrace typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode; void notify_method_entry(); void notify_method_exit( bool save_result, TosState state, NotifyMethodExitMode mode);

src/cpu/sparc/vm/interp_masm_sparc.hpp
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