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src/hotspot/cpu/arm/templateTable_arm.cpp

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2946   assert_different_registers(Rcache, Rindex, Rtemp);
2947   assert_different_registers(Roffset, Rflags, Robj, Rtemp);
2948 
2949   ByteSize cp_base_offset = ConstantPoolCache::base_offset();
2950 
2951   __ add(Rtemp, Rcache, AsmOperand(Rindex, lsl, LogBytesPerWord));
2952 
2953   // Field offset
2954   __ ldr(Roffset, Address(Rtemp,
2955            cp_base_offset + ConstantPoolCacheEntry::f2_offset()));
2956 
2957   // Flags
2958   __ ldr_u32(Rflags, Address(Rtemp,
2959            cp_base_offset + ConstantPoolCacheEntry::flags_offset()));
2960 
2961   if (is_static) {
2962     __ ldr(Robj, Address(Rtemp,
2963              cp_base_offset + ConstantPoolCacheEntry::f1_offset()));
2964     const int mirror_offset = in_bytes(Klass::java_mirror_offset());
2965     __ ldr(Robj, Address(Robj, mirror_offset));

2966   }
2967 }
2968 
2969 
2970 // Blows all volatile registers: R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR.
2971 void TemplateTable::load_invoke_cp_cache_entry(int byte_no,
2972                                                Register method,
2973                                                Register itable_index,
2974                                                Register flags,
2975                                                bool is_invokevirtual,
2976                                                bool is_invokevfinal/*unused*/,
2977                                                bool is_invokedynamic) {
2978   // setup registers
2979   const Register cache = R2_tmp;
2980   const Register index = R3_tmp;
2981   const Register temp_reg = Rtemp;
2982   assert_different_registers(cache, index, temp_reg);
2983   assert_different_registers(method, itable_index, temp_reg);
2984 
2985   // determine constant pool cache field offsets




2946   assert_different_registers(Rcache, Rindex, Rtemp);
2947   assert_different_registers(Roffset, Rflags, Robj, Rtemp);
2948 
2949   ByteSize cp_base_offset = ConstantPoolCache::base_offset();
2950 
2951   __ add(Rtemp, Rcache, AsmOperand(Rindex, lsl, LogBytesPerWord));
2952 
2953   // Field offset
2954   __ ldr(Roffset, Address(Rtemp,
2955            cp_base_offset + ConstantPoolCacheEntry::f2_offset()));
2956 
2957   // Flags
2958   __ ldr_u32(Rflags, Address(Rtemp,
2959            cp_base_offset + ConstantPoolCacheEntry::flags_offset()));
2960 
2961   if (is_static) {
2962     __ ldr(Robj, Address(Rtemp,
2963              cp_base_offset + ConstantPoolCacheEntry::f1_offset()));
2964     const int mirror_offset = in_bytes(Klass::java_mirror_offset());
2965     __ ldr(Robj, Address(Robj, mirror_offset));
2966     __ resolve_oop_handle(Robj);
2967   }
2968 }
2969 
2970 
2971 // Blows all volatile registers: R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR.
2972 void TemplateTable::load_invoke_cp_cache_entry(int byte_no,
2973                                                Register method,
2974                                                Register itable_index,
2975                                                Register flags,
2976                                                bool is_invokevirtual,
2977                                                bool is_invokevfinal/*unused*/,
2978                                                bool is_invokedynamic) {
2979   // setup registers
2980   const Register cache = R2_tmp;
2981   const Register index = R3_tmp;
2982   const Register temp_reg = Rtemp;
2983   assert_different_registers(cache, index, temp_reg);
2984   assert_different_registers(method, itable_index, temp_reg);
2985 
2986   // determine constant pool cache field offsets


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