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src/hotspot/cpu/s390/macroAssembler_s390.cpp

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4654     if (oop_shift == 0) {
4655       lgr_if_needed(Rdst, Rsrc);
4656     } else {
4657       z_sllg(Rdst, Rsrc, oop_shift);
4658     }
4659     BLOCK_COMMENT("} cOop decoder zeroBase");
4660   }
4661 }
4662 
4663 // ((OopHandle)result).resolve();
4664 void MacroAssembler::resolve_oop_handle(Register result) {
4665   // OopHandle::resolve is an indirection.
4666   z_lg(result, 0, result);
4667 }
4668 
4669 void MacroAssembler::load_mirror(Register mirror, Register method) {
4670   mem2reg_opt(mirror, Address(method, Method::const_offset()));
4671   mem2reg_opt(mirror, Address(mirror, ConstMethod::constants_offset()));
4672   mem2reg_opt(mirror, Address(mirror, ConstantPool::pool_holder_offset_in_bytes()));
4673   mem2reg_opt(mirror, Address(mirror, Klass::java_mirror_offset()));

4674 }
4675 
4676 //---------------------------------------------------------------
4677 //---  Operations on arrays.
4678 //---------------------------------------------------------------
4679 
4680 // Compiler ensures base is doubleword aligned and cnt is #doublewords.
4681 // Emitter does not KILL cnt and base arguments, since they need to be copied to
4682 // work registers anyway.
4683 // Actually, only r0, r1, and r5 are killed.
4684 unsigned int MacroAssembler::Clear_Array(Register cnt_arg, Register base_pointer_arg, Register src_addr, Register src_len) {
4685   // Src_addr is evenReg.
4686   // Src_len is odd_Reg.
4687 
4688   int      block_start = offset();
4689   Register tmp_reg  = src_len; // Holds target instr addr for EX.
4690   Register dst_len  = Z_R1;    // Holds dst len  for MVCLE.
4691   Register dst_addr = Z_R0;    // Holds dst addr for MVCLE.
4692 
4693   Label doXC, doMVCLE, done;




4654     if (oop_shift == 0) {
4655       lgr_if_needed(Rdst, Rsrc);
4656     } else {
4657       z_sllg(Rdst, Rsrc, oop_shift);
4658     }
4659     BLOCK_COMMENT("} cOop decoder zeroBase");
4660   }
4661 }
4662 
4663 // ((OopHandle)result).resolve();
4664 void MacroAssembler::resolve_oop_handle(Register result) {
4665   // OopHandle::resolve is an indirection.
4666   z_lg(result, 0, result);
4667 }
4668 
4669 void MacroAssembler::load_mirror(Register mirror, Register method) {
4670   mem2reg_opt(mirror, Address(method, Method::const_offset()));
4671   mem2reg_opt(mirror, Address(mirror, ConstMethod::constants_offset()));
4672   mem2reg_opt(mirror, Address(mirror, ConstantPool::pool_holder_offset_in_bytes()));
4673   mem2reg_opt(mirror, Address(mirror, Klass::java_mirror_offset()));
4674   resolve_oop_handle(mirror);
4675 }
4676 
4677 //---------------------------------------------------------------
4678 //---  Operations on arrays.
4679 //---------------------------------------------------------------
4680 
4681 // Compiler ensures base is doubleword aligned and cnt is #doublewords.
4682 // Emitter does not KILL cnt and base arguments, since they need to be copied to
4683 // work registers anyway.
4684 // Actually, only r0, r1, and r5 are killed.
4685 unsigned int MacroAssembler::Clear_Array(Register cnt_arg, Register base_pointer_arg, Register src_addr, Register src_len) {
4686   // Src_addr is evenReg.
4687   // Src_len is odd_Reg.
4688 
4689   int      block_start = offset();
4690   Register tmp_reg  = src_len; // Holds target instr addr for EX.
4691   Register dst_len  = Z_R1;    // Holds dst len  for MVCLE.
4692   Register dst_addr = Z_R0;    // Holds dst addr for MVCLE.
4693 
4694   Label doXC, doMVCLE, done;


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