1 /*
2 * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016, 2017 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "compiler/disassembler.hpp"
29 #include "code/compiledIC.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "prims/jvm.h"
32 #include "runtime/java.hpp"
33 #include "runtime/stubCodeGenerator.hpp"
34 #include "vm_version_s390.hpp"
35
36 # include <sys/sysinfo.h>
37
38 bool VM_Version::_is_determine_features_test_running = false;
39
40 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0};
41 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0};
42 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0};
43 unsigned int VM_Version::_nfeatures = 0;
44 unsigned int VM_Version::_ncipher_features = 0;
45 unsigned int VM_Version::_nmsgdigest_features = 0;
46 unsigned int VM_Version::_Dcache_lineSize = 256;
47 unsigned int VM_Version::_Icache_lineSize = 256;
48
49 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" };
50 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" };
51 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" };
52
53 void VM_Version::initialize() {
54 determine_features(); // Get processor capabilities.
55 set_features_string(); // Set a descriptive feature indication.
56
57 if (Verbose) {
58 print_features();
59 }
60
61 intx cache_line_size = Dcache_lineSize(0);
62
63 MaxVectorSize = 8;
64
65 if (has_PrefetchRaw()) {
66 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
67 // 0 = no prefetch.
68 // 1 = Prefetch instructions for each allocation.
69 // 2 = Use TLAB watermark to gate allocation prefetch.
70 AllocatePrefetchStyle = 1;
71 }
72
73 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all?
74 // Distance to prefetch ahead of allocation pointer.
75 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset
76 AllocatePrefetchDistance = 0;
77 }
78
79 // Number of lines to prefetch ahead of allocation pointer.
80 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset
81 AllocatePrefetchLines = 3;
82 }
83
84 // Step size in bytes of sequential prefetch instructions.
85 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset
86 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
87 } else if (AllocatePrefetchStepSize < cache_line_size) {
88 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
89 } else {
90 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
91 }
92 } else {
93 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
94 AllocatePrefetchDistance = 0;
95 AllocatePrefetchLines = 0;
96 // Can't be zero. Will SIGFPE during constraints checking.
97 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
98 }
99
100 } else {
101 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
102 AllocatePrefetchDistance = 0;
103 AllocatePrefetchLines = 0;
104 // Can't be zero. Will SIGFPE during constraints checking.
105 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
106 }
107
108 // TODO:
109 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need
110 // to keep contended members that far apart? Performance tests are required.
111 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) {
112 ContendedPaddingWidth = cache_line_size;
113 }
114
115 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand".
116 // TODO: Provide implementation based on the vector instructions available from z13.
117 // Note: The CHECKSUM instruction, which has been there since the very beginning
118 // (of z/Architecture), computes "some kind of" a checksum.
119 // It has nothing to do with the CRC32 algorithm.
120 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
121 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
122 }
123 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
124 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
125 }
126
127 // TODO: Provide implementation.
128 if (UseAdler32Intrinsics) {
129 warning("Adler32Intrinsics not available on this CPU.");
130 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
131 }
132
133 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics.
134 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set
135 // depending on the actual machine capabilities.
136 // Explicitly setting them via CmdLine option takes precedence, of course.
137 // TODO: UseAESIntrinsics must be made keylength specific.
138 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions.
139 // Therefore, UseAESIntrinsics is of minimal use at the moment.
140 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) {
141 FLAG_SET_DEFAULT(UseAES, true);
142 }
143 if (UseAES && !has_Crypto_AES()) {
144 warning("AES instructions are not available on this CPU");
145 FLAG_SET_DEFAULT(UseAES, false);
146 }
147 if (UseAES) {
148 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
149 FLAG_SET_DEFAULT(UseAESIntrinsics, true);
150 }
151 }
152 if (UseAESIntrinsics && !has_Crypto_AES()) {
153 warning("AES intrinsics are not available on this CPU");
154 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
155 }
156 if (UseAESIntrinsics && !UseAES) {
157 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
158 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
159 }
160
161 // TODO: implement AES/CTR intrinsics
162 if (UseAESCTRIntrinsics) {
163 warning("AES/CTR intrinsics are not available on this CPU");
164 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
165 }
166
167 // TODO: implement GHASH intrinsics
168 if (UseGHASHIntrinsics) {
169 warning("GHASH intrinsics are not available on this CPU");
170 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
171 }
172
173 if (FLAG_IS_DEFAULT(UseFMA)) {
174 FLAG_SET_DEFAULT(UseFMA, true);
175 }
176
177 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics.
178 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual
179 // machine capabilities.
180 // Explicitly setting them via CmdLine option takes precedence, of course.
181 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) {
182 FLAG_SET_DEFAULT(UseSHA, true);
183 }
184 if (UseSHA && !has_Crypto_SHA()) {
185 warning("SHA instructions are not available on this CPU");
186 FLAG_SET_DEFAULT(UseSHA, false);
187 }
188 if (UseSHA && has_Crypto_SHA1()) {
189 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
190 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
191 }
192 } else if (UseSHA1Intrinsics) {
193 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
194 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
195 }
196 if (UseSHA && has_Crypto_SHA256()) {
197 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
198 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
199 }
200 } else if (UseSHA256Intrinsics) {
201 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
202 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
203 }
204 if (UseSHA && has_Crypto_SHA512()) {
205 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
206 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
207 }
208 } else if (UseSHA512Intrinsics) {
209 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
210 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
211 }
212
213 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
214 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
215 }
216 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
217 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true);
218 }
219 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
220 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
221 }
222 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
223 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
224 }
225
226 // z/Architecture supports 8-byte compare-exchange operations
227 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
228 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
229 _supports_cx8 = true;
230
231 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1();
232 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1();
233
234 // z/Architecture supports unaligned memory accesses.
235 // Performance penalty is negligible. An additional tick or so
236 // is lost if the accessed data spans a cache line boundary.
237 // Unaligned accesses are not atomic, of course.
238 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
239 FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
240 }
241 }
242
243
244 void VM_Version::set_features_string() {
245
246 unsigned int ambiguity = 0;
247 if (is_z13()) {
248 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)";
249 ambiguity++;
250 }
251 if (is_ec12()) {
252 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)";
253 ambiguity++;
254 }
255 if (is_z196()) {
256 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)";
257 ambiguity++;
258 }
259 if (is_z10()) {
260 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)";
261 ambiguity++;
262 }
263 if (is_z9()) {
264 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01";
265 ambiguity++;
266 }
267 if (is_z990()) {
268 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01";
269 ambiguity++;
270 }
271 if (is_z900()) {
272 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01";
273 ambiguity++;
274 }
275
276 if (ambiguity == 0) {
277 _features_string = "z/Architecture (unknown generation)";
278 } else if (ambiguity > 1) {
279 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity);
280 tty->print_cr(" oldest detected generation is %s", _features_string);
281 _features_string = "z/Architecture (ambiguous detection)";
282 }
283
284 if (has_Crypto_AES()) {
285 char buf[256];
286 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size");
287 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it.
288 _features_string,
289 has_Crypto_AES128() ? " 128" : "",
290 has_Crypto_AES192() ? " 192" : "",
291 has_Crypto_AES256() ? " 256" : "");
292 _features_string = os::strdup(buf);
293 }
294
295 if (has_Crypto_SHA()) {
296 char buf[256];
297 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size");
298 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it.
299 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s",
300 _features_string,
301 has_Crypto_SHA1() ? " sha1" : "",
302 has_Crypto_SHA256() ? " sha256" : "",
303 has_Crypto_SHA512() ? " sha512" : "",
304 has_Crypto_GHASH() ? " ghash" : "");
305 if (has_Crypto_AES()) { os::free((void *)_features_string); }
306 _features_string = os::strdup(buf);
307 }
308 }
309
310 // featureBuffer - bit array indicating availability of various features
311 // featureNum - bit index of feature to be tested
312 // Featurenum < 0 requests test for any nonzero bit in featureBuffer.
313 // bufLen - length of featureBuffer in bits
314 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) {
315 assert(bufLen > 0, "buffer len must be positive");
316 assert((bufLen & 0x0007) == 0, "unaligned buffer len");
317 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer");
318 if (featureNum < 0) {
319 // Any bit set at all?
320 bool anyBit = false;
321 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) {
322 anyBit = anyBit || (featureBuffer[i] != 0);
323 }
324 return anyBit;
325 } else {
326 assert((unsigned int)featureNum < bufLen, "feature index out of range");
327 unsigned char* byteBuffer = (unsigned char*)featureBuffer;
328 int byteIndex = featureNum/(8*sizeof(char));
329 int bitIndex = featureNum%(8*sizeof(char));
330 // Indexed bit set?
331 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0;
332 }
333 }
334
335 void VM_Version::print_features_internal(const char* text, bool print_anyway) {
336 tty->print_cr("%s %s", text, features_string());
337 tty->print("%s", text);
338 for (unsigned int i = 0; i < _nfeatures; i++) {
339 tty->print(" 0x%16.16lx", _features[i]);
340 }
341 tty->cr();
342
343 if (Verbose || print_anyway) {
344 // z900
345 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility");
346 // z990
347 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf");
348 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3");
349 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility");
350 // z9
351 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility");
352 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended");
353 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast");
354 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements");
355 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements");
356 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility");
357 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility");
358 // z10
359 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements");
360 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime");
361 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore");
362 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions");
363 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch");
364 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap");
365 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store");
366 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32");
367 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch");
368 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory");
369 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate");
370 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes");
371 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions");
372 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements");
373 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint");
374 // z196
375 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands");
376 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)");
377 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount");
378 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional");
379 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions");
380 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)");
381 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate");
382 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions");
383 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3");
384 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4");
385 // EC12
386 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions");
387 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)");
388 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists");
389 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap");
390 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory");
391 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)");
392 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions");
393 // z13
394 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2");
395 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5");
396 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions");
397 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility");
398 // test switches
399 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl");
400 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl");
401 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl");
402 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl");
403
404 if (has_Crypto()) {
405 tty->cr();
406 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility");
407 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) {
408 tty->cr();
409 tty->print_cr(" available: %s", "Message Cipher Functions");
410 }
411 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) {
412 tty->print_cr(" available Crypto Features of KM (Cipher Message):");
413 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
414 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) {
415 switch (i) {
416 case Cipher::_Query: tty->print_cr(" available: KM Query"); break;
417 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break;
418 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break;
419 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break;
420 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break;
421 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break;
422 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break;
423 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break;
424 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break;
425 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break;
426 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break;
427 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break;
428 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break;
429 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break;
430 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break;
431 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break;
432 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break;
433 default: tty->print_cr(" available: unknown KM code %d", i); break;
434 }
435 }
436 }
437 }
438 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) {
439 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):");
440 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
441 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) {
442 switch (i) {
443 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break;
444 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break;
445 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break;
446 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break;
447 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break;
448 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break;
449 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break;
450 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break;
451 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break;
452 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break;
453 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break;
454 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break;
455 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break;
456 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break;
457 default: tty->print_cr(" available: unknown KMC code %d", i); break;
458 }
459 }
460 }
461 }
462
463 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) {
464 tty->cr();
465 tty->print_cr(" available: %s", "Message Digest Functions for SHA");
466 }
467 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) {
468 tty->print_cr(" available Features of KIMD (Msg Digest):");
469 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
470 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) {
471 switch (i) {
472 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break;
473 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break;
474 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break;
475 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break;
476 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break;
477 default: tty->print_cr(" available: unknown code %d", i); break;
478 }
479 }
480 }
481 }
482 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) {
483 tty->print_cr(" available Features of KLMD (Msg Digest):");
484 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
485 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) {
486 switch (i) {
487 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break;
488 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break;
489 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break;
490 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break;
491 default: tty->print_cr(" available: unknown code %d", i); break;
492 }
493 }
494 }
495 }
496 }
497 if (ContendedPaddingWidth > 0) {
498 tty->cr();
499 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth);
500 }
501 }
502 }
503
504 void VM_Version::print_features() {
505 print_features_internal("Version:");
506 }
507
508 void VM_Version::reset_features(bool reset) {
509 if (reset) {
510 for (unsigned int i = 0; i < _features_buffer_len; i++) {
511 VM_Version::_features[i] = 0;
512 }
513 }
514 }
515
516 void VM_Version::set_features_z900(bool reset) {
517 reset_features(reset);
518
519 set_has_long_displacement();
520 set_has_ETF2();
521 }
522
523 void VM_Version::set_features_z990(bool reset) {
524 reset_features(reset);
525
526 set_features_z900(false);
527 set_has_ETF3();
528 set_has_long_displacement_fast();
529 set_has_HFPMultiplyAndAdd();
530 }
531
532 void VM_Version::set_features_z9(bool reset) {
533 reset_features(reset);
534
535 set_features_z990(false);
536 set_has_StoreFacilityListExtended();
537 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately.
538 set_has_ETF2Enhancements();
539 set_has_ETF3Enhancements();
540 set_has_extended_immediate();
541 set_has_StoreClockFast();
542 set_has_HFPUnnormalized();
543 }
544
545 void VM_Version::set_features_z10(bool reset) {
546 reset_features(reset);
547
548 set_features_z9(false);
549 set_has_CompareSwapStore();
550 set_has_RelativeLoadStore();
551 set_has_CompareBranch();
552 set_has_CompareTrap();
553 set_has_MultiplySingleImm32();
554 set_has_Prefetch();
555 set_has_MoveImmToMem();
556 set_has_MemWithImmALUOps();
557 set_has_ExecuteExtensions();
558 set_has_FPSupportEnhancements();
559 set_has_DecimalFloatingPoint();
560 set_has_ExtractCPUtime();
561 set_has_CryptoExt3();
562 }
563
564 void VM_Version::set_features_z196(bool reset) {
565 reset_features(reset);
566
567 set_features_z10(false);
568 set_has_InterlockedAccessV1();
569 set_has_PopCount();
570 set_has_LoadStoreConditional();
571 set_has_HighWordInstr();
572 set_has_FastSync();
573 set_has_FPExtensions();
574 set_has_DistinctOpnds();
575 set_has_CryptoExt4();
576 }
577
578 void VM_Version::set_features_ec12(bool reset) {
579 reset_features(reset);
580
581 set_features_z196(false);
582 set_has_MiscInstrExt();
583 set_has_InterlockedAccessV2();
584 set_has_LoadAndALUAtomicV2();
585 set_has_TxMem();
586 }
587
588 void VM_Version::set_features_z13(bool reset) {
589 reset_features(reset);
590
591 set_features_ec12(false);
592 set_has_LoadStoreConditional2();
593 set_has_CryptoExt5();
594 set_has_VectorFacility();
595 }
596
597 void VM_Version::set_features_from(const char* march) {
598 bool err = false;
599 bool prt = false;
600
601 if ((march != NULL) && (march[0] != '\0')) {
602 const int buf_len = 16;
603 const int hdr_len = 5;
604 char buf[buf_len];
605 if (strlen(march) >= hdr_len) {
606 memcpy(buf, march, hdr_len);
607 buf[hdr_len] = '\00';
608 } else {
609 buf[0] = '\00';
610 }
611
612 if (!strcmp(march, "z900")) {
613 set_features_z900();
614 } else if (!strcmp(march, "z990")) {
615 set_features_z990();
616 } else if (!strcmp(march, "z9")) {
617 set_features_z9();
618 } else if (!strcmp(march, "z10")) {
619 set_features_z10();
620 } else if (!strcmp(march, "z196")) {
621 set_features_z196();
622 } else if (!strcmp(march, "ec12")) {
623 set_features_ec12();
624 } else if (!strcmp(march, "z13")) {
625 set_features_z13();
626 } else if (!strcmp(buf, "ztest")) {
627 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict");
628 if (strlen(march) > hdr_len) {
629 int itest = 0;
630 if ((strlen(march)-hdr_len) >= buf_len) err = true;
631 if (!err) {
632 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len);
633 buf[strlen(march)-hdr_len] = '\00';
634 for (size_t i = 0; !err && (i < strlen(buf)); i++) {
635 itest = itest*10 + buf[i]-'0';
636 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15);
637 }
638 }
639 if (!err) {
640 prt = true;
641 if (itest & 0x01) { set_has_TestFeature1Impl(); }
642 if (itest & 0x02) { set_has_TestFeature2Impl(); }
643 if (itest & 0x04) { set_has_TestFeature4Impl(); }
644 if (itest & 0x08) { set_has_TestFeature8Impl(); }
645 }
646 } else {
647 prt = true;
648 set_has_TestFeature1Impl();
649 set_has_TestFeature2Impl();
650 set_has_TestFeature4Impl();
651 set_has_TestFeature8Impl();
652 }
653 } else {
654 err = true;
655 }
656 if (!err) {
657 set_features_string();
658 if (prt || PrintAssembly) {
659 print_features_internal("CPU Version as set by cmdline option:", prt);
660 }
661 } else {
662 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march);
663 }
664 }
665
666 }
667
668 static long (*getFeatures)(unsigned long*, int, int) = NULL;
669
670 void VM_Version::set_getFeatures(address entryPoint) {
671 if (getFeatures == NULL) {
672 getFeatures = (long(*)(unsigned long*, int, int))entryPoint;
673 }
674 }
675
676 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) {
677 VM_Version::_is_determine_features_test_running = true;
678 long functionResult = (*getFeatures)(buffer, buflen, functionCode);
679 VM_Version::_is_determine_features_test_running = false;
680 return functionResult;
681 }
682
683 // Helper function for "extract cache attribute" instruction.
684 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication,
685 unsigned int levelIndication,
686 unsigned int typeIndication) {
687 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication;
688 }
689
690 void VM_Version::determine_features() {
691
692 const int cbuf_size = _code_buffer_len;
693 const int buf_len = _features_buffer_len;
694
695 // Allocate code buffer space for the detection code.
696 ResourceMark rm;
697 CodeBuffer cbuf("determine CPU features", cbuf_size, 0);
698 MacroAssembler* a = new MacroAssembler(&cbuf);
699
700 // Emit code.
701 set_getFeatures(a->pc());
702 address code = a->pc();
703
704 // Try STFLE. Possible INVOP will cause defaults to be used.
705 Label getFEATURES;
706 Label getCPUFEATURES; // fcode = -1 (cache)
707 Label getCIPHERFEATURES; // fcode = -2 (cipher)
708 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA)
709 Label getVECTORFEATURES; // fcode = -4 (OS support for vector instructions)
710 Label checkLongDispFast;
711 Label noLongDisp;
712 Label posDisp, negDisp;
713 Label errRTN;
714 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test.
715 a->z_brl(getFEATURES); // negative -> Get machine features not covered by facility list.
716 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility.
717 a->z_aghi(Z_R0, -1);
718 a->z_stfle(0, Z_ARG1);
719 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list.
720 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success.
721 a->z_la(Z_RET, 1, Z_RET);
722 a->z_brnz(errRTN); // Instr failed if non-zero CC.
723 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0.
724 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return.
725
726 a->bind(errRTN);
727 a->z_lngr(Z_RET, Z_RET);
728 a->z_ltgr(Z_R1, Z_R1);
729 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small".
730 a->z_xgr(Z_RET, Z_RET);
731 a->z_br(Z_R14); // Return "operation aborted".
732
733 a->bind(getFEATURES);
734 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only.
735 a->z_bre(getCPUFEATURES);
736 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions).
737 a->z_bre(getCIPHERFEATURES);
738 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions).
739 a->z_bre(getMSGDIGESTFEATURES);
740 a->z_cghi(Z_R0, -4); // -4: Verify vector instruction availability (OS support).
741 a->z_bre(getVECTORFEATURES);
742
743 a->z_xgr(Z_RET, Z_RET); // Not a valid function code.
744 a->z_br(Z_R14); // Return "operation aborted".
745
746 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions.
747 a->bind(getMSGDIGESTFEATURES);
748 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code
749 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size
750 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk).
751 a->z_la(Z_R1,16,Z_R1); // next param block addr
752 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk).
753 a->z_lghi(Z_RET,4);
754 a->z_br(Z_R14);
755
756 // Try KM/KMC query function to get details about crypto instructions.
757 a->bind(getCIPHERFEATURES);
758 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code
759 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output)
760 a->z_km(Z_R2,Z_R2); // get available KM functions
761 a->z_la(Z_R1,16,Z_R1); // next param block addr
762 a->z_kmc(Z_R2,Z_R2); // get available KMC functions
763 a->z_lghi(Z_RET,4);
764 a->z_br(Z_R14);
765
766 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout.
767 a->bind(getCPUFEATURES);
768 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation
769 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents.
770 a->z_br(Z_R14);
771
772 // Use a vector instruction to verify OS support. Will fail with SIGFPE if OS support is missing.
773 a->bind(getVECTORFEATURES);
774 a->z_vtm(Z_V0,Z_V0); // non-destructive vector instruction. Will cause SIGFPE if not supported.
775 a->z_br(Z_R14);
776
777 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer.
778 a->bind(checkLongDispFast);
779 a->z_llill(Z_R0, 0xffff); // preset #iterations
780 a->z_larl(Z_R1, posDisp);
781 a->z_stck(0, Z_ARG1); // Get begin timestamp.
782
783 a->bind(posDisp); // Positive disp loop.
784 a->z_lg(Z_ARG2, 0, Z_ARG1);
785 a->z_bctgr(Z_R0, Z_R1);
786
787 a->z_stck(0, Z_ARG1); // Get end timestamp.
788 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time.
789 a->z_lcgr(Z_ARG2, Z_ARG2);
790 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds
791 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1].
792
793 a->z_llill(Z_R0, 0xffff); // preset #iterations
794 a->z_larl(Z_R1, negDisp);
795 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility.
796 a->z_stck(0, Z_ARG1); // Get begin timestamp.
797 a->z_la(Z_ARG1, 8, Z_ARG1);
798
799 a->bind(negDisp); // Negative disp loop.
800 a->z_lg(Z_ARG2, -8, Z_ARG1);
801 a->z_bctgr(Z_R0, Z_R1);
802
803 a->z_aghi(Z_ARG1, -8);
804 a->z_stck(0, Z_ARG1); // Get end timestamp.
805 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility.
806 a->z_brz(noLongDisp);
807 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time.
808 a->z_lcgr(Z_ARG2, Z_ARG2);
809 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds
810 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0]
811
812 a->z_llill(Z_RET,0xffff);
813 a->z_br(Z_R14);
814
815 a->bind(noLongDisp);
816 a->z_lghi(Z_RET,-1);
817 a->z_br(Z_R14);
818
819 address code_end = a->pc();
820 a->flush();
821
822 // Print the detection code.
823 bool printVerbose = Verbose || PrintAssembly || PrintStubCode;
824 if (printVerbose) {
825 ttyLocker ttyl;
826 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
827 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.",
828 code_end-code, cbuf_size, cbuf_size-(code_end-code));
829
830 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile.
831 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
832 }
833
834 // Prepare for detection code execution and clear work buffer.
835 _nfeatures = 0;
836 _ncipher_features = 0;
837 unsigned long buffer[buf_len];
838
839 for (int i = 0; i < buf_len; i++) {
840 buffer[i] = 0L;
841 }
842
843 // execute code
844 // Illegal instructions will be replaced by 0 in signal handler.
845 // In case of problems, call_getFeatures will return a not-positive result.
846 long used_len = call_getFeatures(buffer, buf_len, 0);
847
848 bool ok;
849 if (used_len == 1) {
850 ok = true;
851 } else if (used_len > 1) {
852 unsigned int used_lenU = (unsigned int)used_len;
853 ok = true;
854 for (unsigned int i = 1; i < used_lenU; i++) {
855 ok = ok && (buffer[i] == 0L);
856 }
857 if (printVerbose && !ok) {
858 bool compact = false;
859 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU);
860 if (compact) {
861 tty->print("non-zero feature list elements:");
862 for (unsigned int i = 0; i < used_lenU; i++) {
863 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]);
864 }
865 tty->cr();
866 } else {
867 for (unsigned int i = 0; i < used_lenU; i++) {
868 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]);
869 }
870 }
871
872 if (compact) {
873 tty->print_cr("Active features (compact view):");
874 for (unsigned int k = 0; k < used_lenU; k++) {
875 tty->print_cr(" buffer[%d]:", k);
876 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
877 bool line = false;
878 for (unsigned int i = j*8; i < (j+1)*8; i++) {
879 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
880 if (bit) {
881 if (!line) {
882 tty->print(" byte[%d]:", j);
883 line = true;
884 }
885 tty->print(" [%3.3d]", i);
886 }
887 }
888 if (line) {
889 tty->cr();
890 }
891 }
892 }
893 } else {
894 tty->print_cr("Active features (full view):");
895 for (unsigned int k = 0; k < used_lenU; k++) {
896 tty->print_cr(" buffer[%d]:", k);
897 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
898 tty->print(" byte[%d]:", j);
899 for (unsigned int i = j*8; i < (j+1)*8; i++) {
900 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
901 if (bit) {
902 tty->print(" [%3.3d]", i);
903 } else {
904 tty->print(" ");
905 }
906 }
907 tty->cr();
908 }
909 }
910 }
911 }
912 ok = true;
913 } else { // No features retrieved if we reach here. Buffer too short or instr not available.
914 if (used_len < 0) {
915 ok = false;
916 if (printVerbose) {
917 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len);
918 }
919 } else {
920 if (printVerbose) {
921 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out...");
922 }
923 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!!
924
925 ok = used_len > 0;
926 if (ok) {
927 if (buffer[1]*10 < buffer[0]) {
928 set_features_z900();
929 } else {
930 set_features_z990();
931 }
932
933 if (printVerbose) {
934 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len);
935 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]);
936 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]);
937 if (has_long_displacement_fast()) {
938 tty->print_cr(" assuming high-speed long displacement IS available.");
939 } else {
940 tty->print_cr(" assuming high-speed long displacement is NOT available.");
941 }
942 }
943 } else {
944 if (printVerbose) {
945 tty->print_cr("Note: high-speed long displacement test was not successful.");
946 tty->print_cr(" assuming long displacement is NOT available.");
947 }
948 }
949 return; // Do not copy buffer to _features, no test for cipher features.
950 }
951 }
952
953 if (ok) {
954 // Fill features buffer.
955 // Clear work buffer.
956 for (int i = 0; i < buf_len; i++) {
957 _features[i] = buffer[i];
958 _cipher_features[i] = 0;
959 _msgdigest_features[i] = 0;
960 buffer[i] = 0L;
961 }
962 _nfeatures = used_len;
963 } else {
964 for (int i = 0; i < buf_len; i++) {
965 _features[i] = 0;
966 _cipher_features[i] = 0;
967 _msgdigest_features[i] = 0;
968 buffer[i] = 0L;
969 }
970 _nfeatures = 0;
971 }
972
973 if (has_VectorFacility()) {
974 // Verify that feature can actually be used. OS support required.
975 call_getFeatures(buffer, -4, 0);
976 if (printVerbose) {
977 ttyLocker ttyl;
978 if (has_VectorFacility()) {
979 tty->print_cr(" Vector Facility has been verified to be supported by OS");
980 } else {
981 tty->print_cr(" Vector Facility has been disabled - not supported by OS");
982 }
983 }
984 }
985
986 // Extract Crypto Facility details.
987 if (has_Crypto()) {
988 // Get cipher features.
989 used_len = call_getFeatures(buffer, -2, 0);
990 for (int i = 0; i < buf_len; i++) {
991 _cipher_features[i] = buffer[i];
992 }
993 _ncipher_features = used_len;
994
995 // Get msg digest features.
996 used_len = call_getFeatures(buffer, -3, 0);
997 for (int i = 0; i < buf_len; i++) {
998 _msgdigest_features[i] = buffer[i];
999 }
1000 _nmsgdigest_features = used_len;
1001 }
1002
1003 static int levelProperties[_max_cache_levels]; // All property indications per level.
1004 static int levelScope[_max_cache_levels]; // private/shared
1005 static const char* levelScopeText[4] = {"No cache ",
1006 "CPU private",
1007 "shared ",
1008 "reserved "};
1009
1010 static int levelType[_max_cache_levels]; // D/I/mixed
1011 static const char* levelTypeText[4] = {"separate D and I caches",
1012 "I cache only ",
1013 "D-cache only ",
1014 "combined D/I cache "};
1015
1016 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits
1017 static unsigned int levelLineSize[_max_cache_levels];
1018 static unsigned int levelTotalSize[_max_cache_levels];
1019 static unsigned int levelAssociativity[_max_cache_levels];
1020
1021
1022 // Extract Cache Layout details.
1023 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now.
1024 bool lineSize_mismatch;
1025 bool print_something;
1026 long functionResult;
1027 unsigned int attributeIndication = 0; // 0..15
1028 unsigned int levelIndication = 0; // 0..8
1029 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1030 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication);
1031
1032 // Get cache topology.
1033 functionResult = call_getFeatures(buffer, -1, functionCode);
1034
1035 for (unsigned int i = 0; i < _max_cache_levels; i++) {
1036 if (functionResult > 0) {
1037 int shiftVal = 8*(_max_cache_levels-(i+1));
1038 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal;
1039 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4;
1040 levelScope[i] = (levelProperties[i] & 0x0c) >> 2;
1041 levelType[i] = (levelProperties[i] & 0x03);
1042 } else {
1043 levelProperties[i] = 0;
1044 levelReserved[i] = 0;
1045 levelScope[i] = 0;
1046 levelType[i] = 0;
1047 }
1048 levelLineSize[i] = 0;
1049 levelTotalSize[i] = 0;
1050 levelAssociativity[i] = 0;
1051 }
1052
1053 tty->cr();
1054 tty->print_cr("------------------------------------");
1055 tty->print_cr("--- Cache Topology Information ---");
1056 tty->print_cr("------------------------------------");
1057 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1058 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s",
1059 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]);
1060 }
1061
1062 // Get D-cache details per level.
1063 _Dcache_lineSize = 0;
1064 lineSize_mismatch = false;
1065 print_something = false;
1066 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1067 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1068 if ((levelType[i] == 0) || (levelType[i] == 2)) {
1069 print_something = true;
1070
1071 // Get cache line size of level i.
1072 attributeIndication = 1;
1073 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1074 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1075
1076 // Get cache total size of level i.
1077 attributeIndication = 2;
1078 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1079 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1080
1081 // Get cache associativity of level i.
1082 attributeIndication = 3;
1083 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1084 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1085
1086 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1087 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]);
1088 } else {
1089 levelLineSize[i] = 0;
1090 }
1091 }
1092
1093 if (print_something) {
1094 tty->cr();
1095 tty->print_cr("------------------------------------");
1096 tty->print_cr("--- D-Cache Detail Information ---");
1097 tty->print_cr("------------------------------------");
1098 if (lineSize_mismatch) {
1099 tty->print_cr("WARNING: D-Cache line size mismatch!");
1100 }
1101 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1102 if (levelLineSize[i] > 0) {
1103 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1104 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1105 }
1106 }
1107 }
1108
1109 // Get I-cache details per level.
1110 _Icache_lineSize = 0;
1111 lineSize_mismatch = false;
1112 print_something = false;
1113 typeIndication = 1; // 0..1 (D-Cache, I-Cache)
1114 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1115 if ((levelType[i] == 0) || (levelType[i] == 1)) {
1116 print_something = true;
1117
1118 // Get cache line size of level i.
1119 attributeIndication = 1;
1120 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1121 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1122
1123 // Get cache total size of level i.
1124 attributeIndication = 2;
1125 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1126 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1127
1128 // Get cache associativity of level i.
1129 attributeIndication = 3;
1130 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1131 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1132
1133 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1134 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]);
1135 } else {
1136 levelLineSize[i] = 0;
1137 }
1138 }
1139
1140 if (print_something) {
1141 tty->cr();
1142 tty->print_cr("------------------------------------");
1143 tty->print_cr("--- I-Cache Detail Information ---");
1144 tty->print_cr("------------------------------------");
1145 if (lineSize_mismatch) {
1146 tty->print_cr("WARNING: I-Cache line size mismatch!");
1147 }
1148 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1149 if (levelLineSize[i] > 0) {
1150 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1151 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1152 }
1153 }
1154 }
1155
1156 // Get D/I-cache details per level.
1157 lineSize_mismatch = false;
1158 print_something = false;
1159 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1160 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1161 if (levelType[i] == 3) {
1162 print_something = true;
1163
1164 // Get cache line size of level i.
1165 attributeIndication = 1;
1166 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1167 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1168
1169 // Get cache total size of level i.
1170 attributeIndication = 2;
1171 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1172 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1173
1174 // Get cache associativity of level i.
1175 attributeIndication = 3;
1176 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1177 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1178
1179 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1180 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1181 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i])
1182 || (_Icache_lineSize != levelLineSize[i]);
1183 } else {
1184 levelLineSize[i] = 0;
1185 }
1186 }
1187
1188 if (print_something) {
1189 tty->cr();
1190 tty->print_cr("--------------------------------------");
1191 tty->print_cr("--- D/I-Cache Detail Information ---");
1192 tty->print_cr("--------------------------------------");
1193 if (lineSize_mismatch) {
1194 tty->print_cr("WARNING: D/I-Cache line size mismatch!");
1195 }
1196 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1197 if (levelLineSize[i] > 0) {
1198 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1199 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1200 }
1201 }
1202 }
1203 tty->cr();
1204 }
1205 return;
1206 }
1207
1208 unsigned long VM_Version::z_SIGILL() {
1209 unsigned long ZeroBuffer = 0;
1210 unsigned long work;
1211 asm(
1212 " LA %[work],%[buffer] \n\t" // Load address of buffer.
1213 " LARL 14,+6 \n\t" // Load address of faulting instruction.
1214 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there.
1215 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1216 , [work] "=&a" (work) /* outputs */
1217 : /* inputs */
1218 : "cc" /* clobbered */
1219 );
1220 return ZeroBuffer;
1221 }
1222
1223 unsigned long VM_Version::z_SIGSEGV() {
1224 unsigned long ZeroBuffer = 0;
1225 unsigned long work;
1226 asm(
1227 " LG %[work],%[buffer] \n\t" // Load zero address.
1228 " STG %[work],0(,%[work])\n\t" // Store to address zero.
1229 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1230 , [work] "=&a" (work) /* outputs */
1231 : /* inputs */
1232 : "cc" /* clobbered */
1233 );
1234 return ZeroBuffer;
1235 }
1236