1 /*
   2  * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #ifndef _WINDOWS
  27 #include "alloca.h"
  28 #endif
  29 #include "asm/macroAssembler.hpp"
  30 #include "asm/macroAssembler.inline.hpp"
  31 #include "code/debugInfoRec.hpp"
  32 #include "code/icBuffer.hpp"
  33 #include "code/nativeInst.hpp"
  34 #include "code/vtableStubs.hpp"
  35 #include "gc/shared/gcLocker.hpp"
  36 #include "interpreter/interpreter.hpp"
  37 #include "logging/log.hpp"
  38 #include "memory/resourceArea.hpp"
  39 #include "oops/compiledICHolder.hpp"
  40 #include "runtime/safepointMechanism.hpp"
  41 #include "runtime/sharedRuntime.hpp"
  42 #include "runtime/vframeArray.hpp"
  43 #include "utilities/align.hpp"
  44 #include "vm_version_x86.hpp"
  45 #include "vmreg_x86.inline.hpp"
  46 #ifdef COMPILER1
  47 #include "c1/c1_Runtime1.hpp"
  48 #endif
  49 #ifdef COMPILER2
  50 #include "opto/runtime.hpp"
  51 #endif
  52 #if INCLUDE_JVMCI
  53 #include "jvmci/jvmciJavaClasses.hpp"
  54 #endif
  55 
  56 #define __ masm->
  57 
  58 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  59 
  60 class SimpleRuntimeFrame {
  61 
  62   public:
  63 
  64   // Most of the runtime stubs have this simple frame layout.
  65   // This class exists to make the layout shared in one place.
  66   // Offsets are for compiler stack slots, which are jints.
  67   enum layout {
  68     // The frame sender code expects that rbp will be in the "natural" place and
  69     // will override any oopMap setting for it. We must therefore force the layout
  70     // so that it agrees with the frame sender code.
  71     rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
  72     rbp_off2,
  73     return_off, return_off2,
  74     framesize
  75   };
  76 };
  77 
  78 class RegisterSaver {
  79   // Capture info about frame layout.  Layout offsets are in jint
  80   // units because compiler frame slots are jints.
  81 #define XSAVE_AREA_BEGIN 160
  82 #define XSAVE_AREA_YMM_BEGIN 576
  83 #define XSAVE_AREA_ZMM_BEGIN 1152
  84 #define XSAVE_AREA_UPPERBANK 1664
  85 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  86 #define DEF_YMM_OFFS(regnum) ymm ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt, ymm ## regnum ## H_off
  87 #define DEF_ZMM_OFFS(regnum) zmm ## regnum ## _off = zmm_off + (regnum-16)*64/BytesPerInt, zmm ## regnum ## H_off
  88   enum layout {
  89     fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
  90     xmm_off       = fpu_state_off + XSAVE_AREA_BEGIN/BytesPerInt,            // offset in fxsave save area
  91     DEF_XMM_OFFS(0),
  92     DEF_XMM_OFFS(1),
  93     // 2..15 are implied in range usage
  94     ymm_off = xmm_off + (XSAVE_AREA_YMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
  95     DEF_YMM_OFFS(0),
  96     DEF_YMM_OFFS(1),
  97     // 2..15 are implied in range usage
  98     zmm_high = xmm_off + (XSAVE_AREA_ZMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
  99     zmm_off = xmm_off + (XSAVE_AREA_UPPERBANK - XSAVE_AREA_BEGIN)/BytesPerInt,
 100     DEF_ZMM_OFFS(16),
 101     DEF_ZMM_OFFS(17),
 102     // 18..31 are implied in range usage
 103     fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
 104     fpu_stateH_end,
 105     r15_off, r15H_off,
 106     r14_off, r14H_off,
 107     r13_off, r13H_off,
 108     r12_off, r12H_off,
 109     r11_off, r11H_off,
 110     r10_off, r10H_off,
 111     r9_off,  r9H_off,
 112     r8_off,  r8H_off,
 113     rdi_off, rdiH_off,
 114     rsi_off, rsiH_off,
 115     ignore_off, ignoreH_off,  // extra copy of rbp
 116     rsp_off, rspH_off,
 117     rbx_off, rbxH_off,
 118     rdx_off, rdxH_off,
 119     rcx_off, rcxH_off,
 120     rax_off, raxH_off,
 121     // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
 122     align_off, alignH_off,
 123     flags_off, flagsH_off,
 124     // The frame sender code expects that rbp will be in the "natural" place and
 125     // will override any oopMap setting for it. We must therefore force the layout
 126     // so that it agrees with the frame sender code.
 127     rbp_off, rbpH_off,        // copy of rbp we will restore
 128     return_off, returnH_off,  // slot for return address
 129     reg_save_size             // size in compiler stack slots
 130   };
 131 
 132  public:
 133   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
 134   static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
 135 
 136   // Offsets into the register save area
 137   // Used by deoptimization when it is managing result register
 138   // values on its own
 139 
 140   static int rax_offset_in_bytes(void)    { return BytesPerInt * rax_off; }
 141   static int rdx_offset_in_bytes(void)    { return BytesPerInt * rdx_off; }
 142   static int rbx_offset_in_bytes(void)    { return BytesPerInt * rbx_off; }
 143   static int xmm0_offset_in_bytes(void)   { return BytesPerInt * xmm0_off; }
 144   static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
 145 
 146   // During deoptimization only the result registers need to be restored,
 147   // all the other values have already been extracted.
 148   static void restore_result_registers(MacroAssembler* masm);
 149 };
 150 
 151 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
 152   int off = 0;
 153   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 154   if (UseAVX < 3) {
 155     num_xmm_regs = num_xmm_regs/2;
 156   }
 157 #if COMPILER2_OR_JVMCI
 158   if (save_vectors) {
 159     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 160     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 161   }
 162 #else
 163   assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
 164 #endif
 165 
 166   // Always make the frame size 16-byte aligned, both vector and non vector stacks are always allocated
 167   int frame_size_in_bytes = align_up(reg_save_size*BytesPerInt, num_xmm_regs);
 168   // OopMap frame size is in compiler stack slots (jint's) not bytes or words
 169   int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
 170   // CodeBlob frame size is in words.
 171   int frame_size_in_words = frame_size_in_bytes / wordSize;
 172   *total_frame_words = frame_size_in_words;
 173 
 174   // Save registers, fpu state, and flags.
 175   // We assume caller has already pushed the return address onto the
 176   // stack, so rsp is 8-byte aligned here.
 177   // We push rpb twice in this sequence because we want the real rbp
 178   // to be under the return like a normal enter.
 179 
 180   __ enter();          // rsp becomes 16-byte aligned here
 181   __ push_CPU_state(); // Push a multiple of 16 bytes
 182 
 183   // push cpu state handles this on EVEX enabled targets
 184   if (save_vectors) {
 185     // Save upper half of YMM registers(0..15)
 186     int base_addr = XSAVE_AREA_YMM_BEGIN;
 187     for (int n = 0; n < 16; n++) {
 188       __ vextractf128_high(Address(rsp, base_addr+n*16), as_XMMRegister(n));
 189     }
 190     if (VM_Version::supports_evex()) {
 191       // Save upper half of ZMM registers(0..15)
 192       base_addr = XSAVE_AREA_ZMM_BEGIN;
 193       for (int n = 0; n < 16; n++) {
 194         __ vextractf64x4_high(Address(rsp, base_addr+n*32), as_XMMRegister(n));
 195       }
 196       // Save full ZMM registers(16..num_xmm_regs)
 197       base_addr = XSAVE_AREA_UPPERBANK;
 198       off = 0;
 199       int vector_len = Assembler::AVX_512bit;
 200       for (int n = 16; n < num_xmm_regs; n++) {
 201         __ evmovdqul(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n), vector_len);
 202       }
 203     }
 204   } else {
 205     if (VM_Version::supports_evex()) {
 206       // Save upper bank of ZMM registers(16..31) for double/float usage
 207       int base_addr = XSAVE_AREA_UPPERBANK;
 208       off = 0;
 209       for (int n = 16; n < num_xmm_regs; n++) {
 210         __ movsd(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n));
 211       }
 212     }
 213   }
 214   __ vzeroupper();
 215   if (frame::arg_reg_save_area_bytes != 0) {
 216     // Allocate argument register save area
 217     __ subptr(rsp, frame::arg_reg_save_area_bytes);
 218   }
 219 
 220   // Set an oopmap for the call site.  This oopmap will map all
 221   // oop-registers and debug-info registers as callee-saved.  This
 222   // will allow deoptimization at this safepoint to find all possible
 223   // debug-info recordings, as well as let GC find all oops.
 224 
 225   OopMapSet *oop_maps = new OopMapSet();
 226   OopMap* map = new OopMap(frame_size_in_slots, 0);
 227 
 228 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x))
 229 
 230   map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
 231   map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
 232   map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
 233   map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
 234   // rbp location is known implicitly by the frame sender code, needs no oopmap
 235   // and the location where rbp was saved by is ignored
 236   map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
 237   map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
 238   map->set_callee_saved(STACK_OFFSET( r8_off  ), r8->as_VMReg());
 239   map->set_callee_saved(STACK_OFFSET( r9_off  ), r9->as_VMReg());
 240   map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
 241   map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
 242   map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
 243   map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
 244   map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
 245   map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
 246   // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
 247   // on EVEX enabled targets, we get it included in the xsave area
 248   off = xmm0_off;
 249   int delta = xmm1_off - off;
 250   for (int n = 0; n < 16; n++) {
 251     XMMRegister xmm_name = as_XMMRegister(n);
 252     map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
 253     off += delta;
 254   }
 255   if(UseAVX > 2) {
 256     // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
 257     off = zmm16_off;
 258     delta = zmm17_off - off;
 259     for (int n = 16; n < num_xmm_regs; n++) {
 260       XMMRegister zmm_name = as_XMMRegister(n);
 261       map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg());
 262       off += delta;
 263     }
 264   }
 265 
 266 #if COMPILER2_OR_JVMCI
 267   if (save_vectors) {
 268     off = ymm0_off;
 269     int delta = ymm1_off - off;
 270     for (int n = 0; n < 16; n++) {
 271       XMMRegister ymm_name = as_XMMRegister(n);
 272       map->set_callee_saved(STACK_OFFSET(off), ymm_name->as_VMReg()->next(4));
 273       off += delta;
 274     }
 275   }
 276 #endif // COMPILER2_OR_JVMCI
 277 
 278   // %%% These should all be a waste but we'll keep things as they were for now
 279   if (true) {
 280     map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
 281     map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
 282     map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
 283     map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
 284     // rbp location is known implicitly by the frame sender code, needs no oopmap
 285     map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
 286     map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
 287     map->set_callee_saved(STACK_OFFSET( r8H_off  ), r8->as_VMReg()->next());
 288     map->set_callee_saved(STACK_OFFSET( r9H_off  ), r9->as_VMReg()->next());
 289     map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
 290     map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
 291     map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
 292     map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
 293     map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
 294     map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
 295     // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
 296     // on EVEX enabled targets, we get it included in the xsave area
 297     off = xmm0H_off;
 298     delta = xmm1H_off - off;
 299     for (int n = 0; n < 16; n++) {
 300       XMMRegister xmm_name = as_XMMRegister(n);
 301       map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()->next());
 302       off += delta;
 303     }
 304     if (UseAVX > 2) {
 305       // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
 306       off = zmm16H_off;
 307       delta = zmm17H_off - off;
 308       for (int n = 16; n < num_xmm_regs; n++) {
 309         XMMRegister zmm_name = as_XMMRegister(n);
 310         map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg()->next());
 311         off += delta;
 312       }
 313     }
 314   }
 315 
 316   return map;
 317 }
 318 
 319 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 320   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 321   if (UseAVX < 3) {
 322     num_xmm_regs = num_xmm_regs/2;
 323   }
 324   if (frame::arg_reg_save_area_bytes != 0) {
 325     // Pop arg register save area
 326     __ addptr(rsp, frame::arg_reg_save_area_bytes);
 327   }
 328 
 329 #if COMPILER2_OR_JVMCI
 330   if (restore_vectors) {
 331     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 332     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 333   }
 334 #else
 335   assert(!restore_vectors, "vectors are generated only by C2");
 336 #endif
 337 
 338   __ vzeroupper();
 339 
 340   // On EVEX enabled targets everything is handled in pop fpu state
 341   if (restore_vectors) {
 342     // Restore upper half of YMM registers (0..15)
 343     int base_addr = XSAVE_AREA_YMM_BEGIN;
 344     for (int n = 0; n < 16; n++) {
 345       __ vinsertf128_high(as_XMMRegister(n), Address(rsp, base_addr+n*16));
 346     }
 347     if (VM_Version::supports_evex()) {
 348       // Restore upper half of ZMM registers (0..15)
 349       base_addr = XSAVE_AREA_ZMM_BEGIN;
 350       for (int n = 0; n < 16; n++) {
 351         __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, base_addr+n*32));
 352       }
 353       // Restore full ZMM registers(16..num_xmm_regs)
 354       base_addr = XSAVE_AREA_UPPERBANK;
 355       int vector_len = Assembler::AVX_512bit;
 356       int off = 0;
 357       for (int n = 16; n < num_xmm_regs; n++) {
 358         __ evmovdqul(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)), vector_len);
 359       }
 360     }
 361   } else {
 362     if (VM_Version::supports_evex()) {
 363       // Restore upper bank of ZMM registers(16..31) for double/float usage
 364       int base_addr = XSAVE_AREA_UPPERBANK;
 365       int off = 0;
 366       for (int n = 16; n < num_xmm_regs; n++) {
 367         __ movsd(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)));
 368       }
 369     }
 370   }
 371 
 372   // Recover CPU state
 373   __ pop_CPU_state();
 374   // Get the rbp described implicitly by the calling convention (no oopMap)
 375   __ pop(rbp);
 376 }
 377 
 378 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 379 
 380   // Just restore result register. Only used by deoptimization. By
 381   // now any callee save register that needs to be restored to a c2
 382   // caller of the deoptee has been extracted into the vframeArray
 383   // and will be stuffed into the c2i adapter we create for later
 384   // restoration so only result registers need to be restored here.
 385 
 386   // Restore fp result register
 387   __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
 388   // Restore integer result register
 389   __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
 390   __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
 391 
 392   // Pop all of the register save are off the stack except the return address
 393   __ addptr(rsp, return_offset_in_bytes());
 394 }
 395 
 396 // Is vector's size (in bytes) bigger than a size saved by default?
 397 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
 398 bool SharedRuntime::is_wide_vector(int size) {
 399   return size > 16;
 400 }
 401 
 402 size_t SharedRuntime::trampoline_size() {
 403   return 16;
 404 }
 405 
 406 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
 407   __ jump(RuntimeAddress(destination));
 408 }
 409 
 410 // The java_calling_convention describes stack locations as ideal slots on
 411 // a frame with no abi restrictions. Since we must observe abi restrictions
 412 // (like the placement of the register window) the slots must be biased by
 413 // the following value.
 414 static int reg2offset_in(VMReg r) {
 415   // Account for saved rbp and return address
 416   // This should really be in_preserve_stack_slots
 417   return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
 418 }
 419 
 420 static int reg2offset_out(VMReg r) {
 421   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 422 }
 423 
 424 // ---------------------------------------------------------------------------
 425 // Read the array of BasicTypes from a signature, and compute where the
 426 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 427 // quantities.  Values less than VMRegImpl::stack0 are registers, those above
 428 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 429 // as framesizes are fixed.
 430 // VMRegImpl::stack0 refers to the first slot 0(sp).
 431 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 432 // up to RegisterImpl::number_of_registers) are the 64-bit
 433 // integer registers.
 434 
 435 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 436 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 437 // units regardless of build. Of course for i486 there is no 64 bit build
 438 
 439 // The Java calling convention is a "shifted" version of the C ABI.
 440 // By skipping the first C ABI register we can call non-static jni methods
 441 // with small numbers of arguments without having to shuffle the arguments
 442 // at all. Since we control the java ABI we ought to at least get some
 443 // advantage out of it.
 444 
 445 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 446                                            VMRegPair *regs,
 447                                            int total_args_passed,
 448                                            int is_outgoing) {
 449 
 450   // Create the mapping between argument positions and
 451   // registers.
 452   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 453     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
 454   };
 455   static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 456     j_farg0, j_farg1, j_farg2, j_farg3,
 457     j_farg4, j_farg5, j_farg6, j_farg7
 458   };
 459 
 460 
 461   uint int_args = 0;
 462   uint fp_args = 0;
 463   uint stk_args = 0; // inc by 2 each time
 464 
 465   for (int i = 0; i < total_args_passed; i++) {
 466     switch (sig_bt[i]) {
 467     case T_BOOLEAN:
 468     case T_CHAR:
 469     case T_BYTE:
 470     case T_SHORT:
 471     case T_INT:
 472       if (int_args < Argument::n_int_register_parameters_j) {
 473         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 474       } else {
 475         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 476         stk_args += 2;
 477       }
 478       break;
 479     case T_VOID:
 480       // halves of T_LONG or T_DOUBLE
 481       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 482       regs[i].set_bad();
 483       break;
 484     case T_LONG:
 485       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 486       // fall through
 487     case T_OBJECT:
 488     case T_ARRAY:
 489     case T_ADDRESS:
 490       if (int_args < Argument::n_int_register_parameters_j) {
 491         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 492       } else {
 493         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 494         stk_args += 2;
 495       }
 496       break;
 497     case T_FLOAT:
 498       if (fp_args < Argument::n_float_register_parameters_j) {
 499         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 500       } else {
 501         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 502         stk_args += 2;
 503       }
 504       break;
 505     case T_DOUBLE:
 506       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 507       if (fp_args < Argument::n_float_register_parameters_j) {
 508         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 509       } else {
 510         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 511         stk_args += 2;
 512       }
 513       break;
 514     default:
 515       ShouldNotReachHere();
 516       break;
 517     }
 518   }
 519 
 520   return align_up(stk_args, 2);
 521 }
 522 
 523 // Patch the callers callsite with entry to compiled code if it exists.
 524 static void patch_callers_callsite(MacroAssembler *masm) {
 525   Label L;
 526   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 527   __ jcc(Assembler::equal, L);
 528 
 529   // Save the current stack pointer
 530   __ mov(r13, rsp);
 531   // Schedule the branch target address early.
 532   // Call into the VM to patch the caller, then jump to compiled callee
 533   // rax isn't live so capture return address while we easily can
 534   __ movptr(rax, Address(rsp, 0));
 535 
 536   // align stack so push_CPU_state doesn't fault
 537   __ andptr(rsp, -(StackAlignmentInBytes));
 538   __ push_CPU_state();
 539   __ vzeroupper();
 540   // VM needs caller's callsite
 541   // VM needs target method
 542   // This needs to be a long call since we will relocate this adapter to
 543   // the codeBuffer and it may not reach
 544 
 545   // Allocate argument register save area
 546   if (frame::arg_reg_save_area_bytes != 0) {
 547     __ subptr(rsp, frame::arg_reg_save_area_bytes);
 548   }
 549   __ mov(c_rarg0, rbx);
 550   __ mov(c_rarg1, rax);
 551   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 552 
 553   // De-allocate argument register save area
 554   if (frame::arg_reg_save_area_bytes != 0) {
 555     __ addptr(rsp, frame::arg_reg_save_area_bytes);
 556   }
 557 
 558   __ vzeroupper();
 559   __ pop_CPU_state();
 560   // restore sp
 561   __ mov(rsp, r13);
 562   __ bind(L);
 563 }
 564 
 565 
 566 static void gen_c2i_adapter(MacroAssembler *masm,
 567                             int total_args_passed,
 568                             int comp_args_on_stack,
 569                             const BasicType *sig_bt,
 570                             const VMRegPair *regs,
 571                             Label& skip_fixup) {
 572   // Before we get into the guts of the C2I adapter, see if we should be here
 573   // at all.  We've come from compiled code and are attempting to jump to the
 574   // interpreter, which means the caller made a static call to get here
 575   // (vcalls always get a compiled target if there is one).  Check for a
 576   // compiled target.  If there is one, we need to patch the caller's call.
 577   patch_callers_callsite(masm);
 578 
 579   __ bind(skip_fixup);
 580 
 581   // Since all args are passed on the stack, total_args_passed *
 582   // Interpreter::stackElementSize is the space we need. Plus 1 because
 583   // we also account for the return address location since
 584   // we store it first rather than hold it in rax across all the shuffling
 585 
 586   int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
 587 
 588   // stack is aligned, keep it that way
 589   extraspace = align_up(extraspace, 2*wordSize);
 590 
 591   // Get return address
 592   __ pop(rax);
 593 
 594   // set senderSP value
 595   __ mov(r13, rsp);
 596 
 597   __ subptr(rsp, extraspace);
 598 
 599   // Store the return address in the expected location
 600   __ movptr(Address(rsp, 0), rax);
 601 
 602   // Now write the args into the outgoing interpreter space
 603   for (int i = 0; i < total_args_passed; i++) {
 604     if (sig_bt[i] == T_VOID) {
 605       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 606       continue;
 607     }
 608 
 609     // offset to start parameters
 610     int st_off   = (total_args_passed - i) * Interpreter::stackElementSize;
 611     int next_off = st_off - Interpreter::stackElementSize;
 612 
 613     // Say 4 args:
 614     // i   st_off
 615     // 0   32 T_LONG
 616     // 1   24 T_VOID
 617     // 2   16 T_OBJECT
 618     // 3    8 T_BOOL
 619     // -    0 return address
 620     //
 621     // However to make thing extra confusing. Because we can fit a long/double in
 622     // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
 623     // leaves one slot empty and only stores to a single slot. In this case the
 624     // slot that is occupied is the T_VOID slot. See I said it was confusing.
 625 
 626     VMReg r_1 = regs[i].first();
 627     VMReg r_2 = regs[i].second();
 628     if (!r_1->is_valid()) {
 629       assert(!r_2->is_valid(), "");
 630       continue;
 631     }
 632     if (r_1->is_stack()) {
 633       // memory to memory use rax
 634       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 635       if (!r_2->is_valid()) {
 636         // sign extend??
 637         __ movl(rax, Address(rsp, ld_off));
 638         __ movptr(Address(rsp, st_off), rax);
 639 
 640       } else {
 641 
 642         __ movq(rax, Address(rsp, ld_off));
 643 
 644         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 645         // T_DOUBLE and T_LONG use two slots in the interpreter
 646         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 647           // ld_off == LSW, ld_off+wordSize == MSW
 648           // st_off == MSW, next_off == LSW
 649           __ movq(Address(rsp, next_off), rax);
 650 #ifdef ASSERT
 651           // Overwrite the unused slot with known junk
 652           __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 653           __ movptr(Address(rsp, st_off), rax);
 654 #endif /* ASSERT */
 655         } else {
 656           __ movq(Address(rsp, st_off), rax);
 657         }
 658       }
 659     } else if (r_1->is_Register()) {
 660       Register r = r_1->as_Register();
 661       if (!r_2->is_valid()) {
 662         // must be only an int (or less ) so move only 32bits to slot
 663         // why not sign extend??
 664         __ movl(Address(rsp, st_off), r);
 665       } else {
 666         // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 667         // T_DOUBLE and T_LONG use two slots in the interpreter
 668         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 669           // long/double in gpr
 670 #ifdef ASSERT
 671           // Overwrite the unused slot with known junk
 672           __ mov64(rax, CONST64(0xdeadffffdeadaaab));
 673           __ movptr(Address(rsp, st_off), rax);
 674 #endif /* ASSERT */
 675           __ movq(Address(rsp, next_off), r);
 676         } else {
 677           __ movptr(Address(rsp, st_off), r);
 678         }
 679       }
 680     } else {
 681       assert(r_1->is_XMMRegister(), "");
 682       if (!r_2->is_valid()) {
 683         // only a float use just part of the slot
 684         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 685       } else {
 686 #ifdef ASSERT
 687         // Overwrite the unused slot with known junk
 688         __ mov64(rax, CONST64(0xdeadffffdeadaaac));
 689         __ movptr(Address(rsp, st_off), rax);
 690 #endif /* ASSERT */
 691         __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
 692       }
 693     }
 694   }
 695 
 696   // Schedule the branch target address early.
 697   __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
 698   __ jmp(rcx);
 699 }
 700 
 701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
 702                         address code_start, address code_end,
 703                         Label& L_ok) {
 704   Label L_fail;
 705   __ lea(temp_reg, ExternalAddress(code_start));
 706   __ cmpptr(pc_reg, temp_reg);
 707   __ jcc(Assembler::belowEqual, L_fail);
 708   __ lea(temp_reg, ExternalAddress(code_end));
 709   __ cmpptr(pc_reg, temp_reg);
 710   __ jcc(Assembler::below, L_ok);
 711   __ bind(L_fail);
 712 }
 713 
 714 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 715                                     int total_args_passed,
 716                                     int comp_args_on_stack,
 717                                     const BasicType *sig_bt,
 718                                     const VMRegPair *regs) {
 719 
 720   // Note: r13 contains the senderSP on entry. We must preserve it since
 721   // we may do a i2c -> c2i transition if we lose a race where compiled
 722   // code goes non-entrant while we get args ready.
 723   // In addition we use r13 to locate all the interpreter args as
 724   // we must align the stack to 16 bytes on an i2c entry else we
 725   // lose alignment we expect in all compiled code and register
 726   // save code can segv when fxsave instructions find improperly
 727   // aligned stack pointer.
 728 
 729   // Adapters can be frameless because they do not require the caller
 730   // to perform additional cleanup work, such as correcting the stack pointer.
 731   // An i2c adapter is frameless because the *caller* frame, which is interpreted,
 732   // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
 733   // even if a callee has modified the stack pointer.
 734   // A c2i adapter is frameless because the *callee* frame, which is interpreted,
 735   // routinely repairs its caller's stack pointer (from sender_sp, which is set
 736   // up via the senderSP register).
 737   // In other words, if *either* the caller or callee is interpreted, we can
 738   // get the stack pointer repaired after a call.
 739   // This is why c2i and i2c adapters cannot be indefinitely composed.
 740   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 741   // both caller and callee would be compiled methods, and neither would
 742   // clean up the stack pointer changes performed by the two adapters.
 743   // If this happens, control eventually transfers back to the compiled
 744   // caller, but with an uncorrected stack, causing delayed havoc.
 745 
 746   // Pick up the return address
 747   __ movptr(rax, Address(rsp, 0));
 748 
 749   if (VerifyAdapterCalls &&
 750       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 751     // So, let's test for cascading c2i/i2c adapters right now.
 752     //  assert(Interpreter::contains($return_addr) ||
 753     //         StubRoutines::contains($return_addr),
 754     //         "i2c adapter must return to an interpreter frame");
 755     __ block_comment("verify_i2c { ");
 756     Label L_ok;
 757     if (Interpreter::code() != NULL)
 758       range_check(masm, rax, r11,
 759                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 760                   L_ok);
 761     if (StubRoutines::code1() != NULL)
 762       range_check(masm, rax, r11,
 763                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 764                   L_ok);
 765     if (StubRoutines::code2() != NULL)
 766       range_check(masm, rax, r11,
 767                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 768                   L_ok);
 769     const char* msg = "i2c adapter must return to an interpreter frame";
 770     __ block_comment(msg);
 771     __ stop(msg);
 772     __ bind(L_ok);
 773     __ block_comment("} verify_i2ce ");
 774   }
 775 
 776   // Must preserve original SP for loading incoming arguments because
 777   // we need to align the outgoing SP for compiled code.
 778   __ movptr(r11, rsp);
 779 
 780   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 781   // in registers, we will occasionally have no stack args.
 782   int comp_words_on_stack = 0;
 783   if (comp_args_on_stack) {
 784     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 785     // registers are below.  By subtracting stack0, we either get a negative
 786     // number (all values in registers) or the maximum stack slot accessed.
 787 
 788     // Convert 4-byte c2 stack slots to words.
 789     comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
 790     // Round up to miminum stack alignment, in wordSize
 791     comp_words_on_stack = align_up(comp_words_on_stack, 2);
 792     __ subptr(rsp, comp_words_on_stack * wordSize);
 793   }
 794 
 795 
 796   // Ensure compiled code always sees stack at proper alignment
 797   __ andptr(rsp, -16);
 798 
 799   // push the return address and misalign the stack that youngest frame always sees
 800   // as far as the placement of the call instruction
 801   __ push(rax);
 802 
 803   // Put saved SP in another register
 804   const Register saved_sp = rax;
 805   __ movptr(saved_sp, r11);
 806 
 807   // Will jump to the compiled code just as if compiled code was doing it.
 808   // Pre-load the register-jump target early, to schedule it better.
 809   __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
 810 
 811 #if INCLUDE_JVMCI
 812   if (EnableJVMCI || UseAOT) {
 813     // check if this call should be routed towards a specific entry point
 814     __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
 815     Label no_alternative_target;
 816     __ jcc(Assembler::equal, no_alternative_target);
 817     __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 818     __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
 819     __ bind(no_alternative_target);
 820   }
 821 #endif // INCLUDE_JVMCI
 822 
 823   // Now generate the shuffle code.  Pick up all register args and move the
 824   // rest through the floating point stack top.
 825   for (int i = 0; i < total_args_passed; i++) {
 826     if (sig_bt[i] == T_VOID) {
 827       // Longs and doubles are passed in native word order, but misaligned
 828       // in the 32-bit build.
 829       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 830       continue;
 831     }
 832 
 833     // Pick up 0, 1 or 2 words from SP+offset.
 834 
 835     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 836             "scrambled load targets?");
 837     // Load in argument order going down.
 838     int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
 839     // Point to interpreter value (vs. tag)
 840     int next_off = ld_off - Interpreter::stackElementSize;
 841     //
 842     //
 843     //
 844     VMReg r_1 = regs[i].first();
 845     VMReg r_2 = regs[i].second();
 846     if (!r_1->is_valid()) {
 847       assert(!r_2->is_valid(), "");
 848       continue;
 849     }
 850     if (r_1->is_stack()) {
 851       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 852       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 853 
 854       // We can use r13 as a temp here because compiled code doesn't need r13 as an input
 855       // and if we end up going thru a c2i because of a miss a reasonable value of r13
 856       // will be generated.
 857       if (!r_2->is_valid()) {
 858         // sign extend???
 859         __ movl(r13, Address(saved_sp, ld_off));
 860         __ movptr(Address(rsp, st_off), r13);
 861       } else {
 862         //
 863         // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 864         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 865         // So we must adjust where to pick up the data to match the interpreter.
 866         //
 867         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 868         // are accessed as negative so LSW is at LOW address
 869 
 870         // ld_off is MSW so get LSW
 871         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 872                            next_off : ld_off;
 873         __ movq(r13, Address(saved_sp, offset));
 874         // st_off is LSW (i.e. reg.first())
 875         __ movq(Address(rsp, st_off), r13);
 876       }
 877     } else if (r_1->is_Register()) {  // Register argument
 878       Register r = r_1->as_Register();
 879       assert(r != rax, "must be different");
 880       if (r_2->is_valid()) {
 881         //
 882         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 883         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 884         // So we must adjust where to pick up the data to match the interpreter.
 885 
 886         const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 887                            next_off : ld_off;
 888 
 889         // this can be a misaligned move
 890         __ movq(r, Address(saved_sp, offset));
 891       } else {
 892         // sign extend and use a full word?
 893         __ movl(r, Address(saved_sp, ld_off));
 894       }
 895     } else {
 896       if (!r_2->is_valid()) {
 897         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 898       } else {
 899         __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
 900       }
 901     }
 902   }
 903 
 904   // 6243940 We might end up in handle_wrong_method if
 905   // the callee is deoptimized as we race thru here. If that
 906   // happens we don't want to take a safepoint because the
 907   // caller frame will look interpreted and arguments are now
 908   // "compiled" so it is much better to make this transition
 909   // invisible to the stack walking code. Unfortunately if
 910   // we try and find the callee by normal means a safepoint
 911   // is possible. So we stash the desired callee in the thread
 912   // and the vm will find there should this case occur.
 913 
 914   __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
 915 
 916   // put Method* where a c2i would expect should we end up there
 917   // only needed becaus eof c2 resolve stubs return Method* as a result in
 918   // rax
 919   __ mov(rax, rbx);
 920   __ jmp(r11);
 921 }
 922 
 923 // ---------------------------------------------------------------
 924 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 925                                                             int total_args_passed,
 926                                                             int comp_args_on_stack,
 927                                                             const BasicType *sig_bt,
 928                                                             const VMRegPair *regs,
 929                                                             AdapterFingerPrint* fingerprint) {
 930   address i2c_entry = __ pc();
 931 
 932   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 933 
 934   // -------------------------------------------------------------------------
 935   // Generate a C2I adapter.  On entry we know rbx holds the Method* during calls
 936   // to the interpreter.  The args start out packed in the compiled layout.  They
 937   // need to be unpacked into the interpreter layout.  This will almost always
 938   // require some stack space.  We grow the current (compiled) stack, then repack
 939   // the args.  We  finally end in a jump to the generic interpreter entry point.
 940   // On exit from the interpreter, the interpreter will restore our SP (lest the
 941   // compiled code, which relys solely on SP and not RBP, get sick).
 942 
 943   address c2i_unverified_entry = __ pc();
 944   Label skip_fixup;
 945   Label ok;
 946 
 947   Register holder = rax;
 948   Register receiver = j_rarg0;
 949   Register temp = rbx;
 950 
 951   {
 952     __ load_klass(temp, receiver);
 953     __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
 954     __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
 955     __ jcc(Assembler::equal, ok);
 956     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 957 
 958     __ bind(ok);
 959     // Method might have been compiled since the call site was patched to
 960     // interpreted if that is the case treat it as a miss so we can get
 961     // the call site corrected.
 962     __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 963     __ jcc(Assembler::equal, skip_fixup);
 964     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 965   }
 966 
 967   address c2i_entry = __ pc();
 968 
 969   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 970 
 971   __ flush();
 972   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
 973 }
 974 
 975 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 976                                          VMRegPair *regs,
 977                                          VMRegPair *regs2,
 978                                          int total_args_passed) {
 979   assert(regs2 == NULL, "not needed on x86");
 980 // We return the amount of VMRegImpl stack slots we need to reserve for all
 981 // the arguments NOT counting out_preserve_stack_slots.
 982 
 983 // NOTE: These arrays will have to change when c1 is ported
 984 #ifdef _WIN64
 985     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 986       c_rarg0, c_rarg1, c_rarg2, c_rarg3
 987     };
 988     static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 989       c_farg0, c_farg1, c_farg2, c_farg3
 990     };
 991 #else
 992     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
 993       c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
 994     };
 995     static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
 996       c_farg0, c_farg1, c_farg2, c_farg3,
 997       c_farg4, c_farg5, c_farg6, c_farg7
 998     };
 999 #endif // _WIN64
1000 
1001 
1002     uint int_args = 0;
1003     uint fp_args = 0;
1004     uint stk_args = 0; // inc by 2 each time
1005 
1006     for (int i = 0; i < total_args_passed; i++) {
1007       switch (sig_bt[i]) {
1008       case T_BOOLEAN:
1009       case T_CHAR:
1010       case T_BYTE:
1011       case T_SHORT:
1012       case T_INT:
1013         if (int_args < Argument::n_int_register_parameters_c) {
1014           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1015 #ifdef _WIN64
1016           fp_args++;
1017           // Allocate slots for callee to stuff register args the stack.
1018           stk_args += 2;
1019 #endif
1020         } else {
1021           regs[i].set1(VMRegImpl::stack2reg(stk_args));
1022           stk_args += 2;
1023         }
1024         break;
1025       case T_LONG:
1026         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1027         // fall through
1028       case T_OBJECT:
1029       case T_ARRAY:
1030       case T_ADDRESS:
1031       case T_METADATA:
1032         if (int_args < Argument::n_int_register_parameters_c) {
1033           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1034 #ifdef _WIN64
1035           fp_args++;
1036           stk_args += 2;
1037 #endif
1038         } else {
1039           regs[i].set2(VMRegImpl::stack2reg(stk_args));
1040           stk_args += 2;
1041         }
1042         break;
1043       case T_FLOAT:
1044         if (fp_args < Argument::n_float_register_parameters_c) {
1045           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1046 #ifdef _WIN64
1047           int_args++;
1048           // Allocate slots for callee to stuff register args the stack.
1049           stk_args += 2;
1050 #endif
1051         } else {
1052           regs[i].set1(VMRegImpl::stack2reg(stk_args));
1053           stk_args += 2;
1054         }
1055         break;
1056       case T_DOUBLE:
1057         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1058         if (fp_args < Argument::n_float_register_parameters_c) {
1059           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1060 #ifdef _WIN64
1061           int_args++;
1062           // Allocate slots for callee to stuff register args the stack.
1063           stk_args += 2;
1064 #endif
1065         } else {
1066           regs[i].set2(VMRegImpl::stack2reg(stk_args));
1067           stk_args += 2;
1068         }
1069         break;
1070       case T_VOID: // Halves of longs and doubles
1071         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1072         regs[i].set_bad();
1073         break;
1074       default:
1075         ShouldNotReachHere();
1076         break;
1077       }
1078     }
1079 #ifdef _WIN64
1080   // windows abi requires that we always allocate enough stack space
1081   // for 4 64bit registers to be stored down.
1082   if (stk_args < 8) {
1083     stk_args = 8;
1084   }
1085 #endif // _WIN64
1086 
1087   return stk_args;
1088 }
1089 
1090 // On 64 bit we will store integer like items to the stack as
1091 // 64 bits items (sparc abi) even though java would only store
1092 // 32bits for a parameter. On 32bit it will simply be 32 bits
1093 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
1094 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1095   if (src.first()->is_stack()) {
1096     if (dst.first()->is_stack()) {
1097       // stack to stack
1098       __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
1099       __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1100     } else {
1101       // stack to reg
1102       __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1103     }
1104   } else if (dst.first()->is_stack()) {
1105     // reg to stack
1106     // Do we really have to sign extend???
1107     // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1108     __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1109   } else {
1110     // Do we really have to sign extend???
1111     // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1112     if (dst.first() != src.first()) {
1113       __ movq(dst.first()->as_Register(), src.first()->as_Register());
1114     }
1115   }
1116 }
1117 
1118 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1119   if (src.first()->is_stack()) {
1120     if (dst.first()->is_stack()) {
1121       // stack to stack
1122       __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1123       __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1124     } else {
1125       // stack to reg
1126       __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1127     }
1128   } else if (dst.first()->is_stack()) {
1129     // reg to stack
1130     __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1131   } else {
1132     if (dst.first() != src.first()) {
1133       __ movq(dst.first()->as_Register(), src.first()->as_Register());
1134     }
1135   }
1136 }
1137 
1138 // An oop arg. Must pass a handle not the oop itself
1139 static void object_move(MacroAssembler* masm,
1140                         OopMap* map,
1141                         int oop_handle_offset,
1142                         int framesize_in_slots,
1143                         VMRegPair src,
1144                         VMRegPair dst,
1145                         bool is_receiver,
1146                         int* receiver_offset) {
1147 
1148   // must pass a handle. First figure out the location we use as a handle
1149 
1150   Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
1151 
1152   // See if oop is NULL if it is we need no handle
1153 
1154   if (src.first()->is_stack()) {
1155 
1156     // Oop is already on the stack as an argument
1157     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1158     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1159     if (is_receiver) {
1160       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1161     }
1162 
1163     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1164     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1165     // conditionally move a NULL
1166     __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1167   } else {
1168 
1169     // Oop is in an a register we must store it to the space we reserve
1170     // on the stack for oop_handles and pass a handle if oop is non-NULL
1171 
1172     const Register rOop = src.first()->as_Register();
1173     int oop_slot;
1174     if (rOop == j_rarg0)
1175       oop_slot = 0;
1176     else if (rOop == j_rarg1)
1177       oop_slot = 1;
1178     else if (rOop == j_rarg2)
1179       oop_slot = 2;
1180     else if (rOop == j_rarg3)
1181       oop_slot = 3;
1182     else if (rOop == j_rarg4)
1183       oop_slot = 4;
1184     else {
1185       assert(rOop == j_rarg5, "wrong register");
1186       oop_slot = 5;
1187     }
1188 
1189     oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1190     int offset = oop_slot*VMRegImpl::stack_slot_size;
1191 
1192     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1193     // Store oop in handle area, may be NULL
1194     __ movptr(Address(rsp, offset), rOop);
1195     if (is_receiver) {
1196       *receiver_offset = offset;
1197     }
1198 
1199     __ cmpptr(rOop, (int32_t)NULL_WORD);
1200     __ lea(rHandle, Address(rsp, offset));
1201     // conditionally move a NULL from the handle area where it was just stored
1202     __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1203   }
1204 
1205   // If arg is on the stack then place it otherwise it is already in correct reg.
1206   if (dst.first()->is_stack()) {
1207     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1208   }
1209 }
1210 
1211 // A float arg may have to do float reg int reg conversion
1212 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1213   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1214 
1215   // The calling conventions assures us that each VMregpair is either
1216   // all really one physical register or adjacent stack slots.
1217   // This greatly simplifies the cases here compared to sparc.
1218 
1219   if (src.first()->is_stack()) {
1220     if (dst.first()->is_stack()) {
1221       __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1222       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1223     } else {
1224       // stack to reg
1225       assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1226       __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1227     }
1228   } else if (dst.first()->is_stack()) {
1229     // reg to stack
1230     assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1231     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1232   } else {
1233     // reg to reg
1234     // In theory these overlap but the ordering is such that this is likely a nop
1235     if ( src.first() != dst.first()) {
1236       __ movdbl(dst.first()->as_XMMRegister(),  src.first()->as_XMMRegister());
1237     }
1238   }
1239 }
1240 
1241 // A long move
1242 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1243 
1244   // The calling conventions assures us that each VMregpair is either
1245   // all really one physical register or adjacent stack slots.
1246   // This greatly simplifies the cases here compared to sparc.
1247 
1248   if (src.is_single_phys_reg() ) {
1249     if (dst.is_single_phys_reg()) {
1250       if (dst.first() != src.first()) {
1251         __ mov(dst.first()->as_Register(), src.first()->as_Register());
1252       }
1253     } else {
1254       assert(dst.is_single_reg(), "not a stack pair");
1255       __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1256     }
1257   } else if (dst.is_single_phys_reg()) {
1258     assert(src.is_single_reg(),  "not a stack pair");
1259     __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1260   } else {
1261     assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1262     __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1263     __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1264   }
1265 }
1266 
1267 // A double move
1268 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1269 
1270   // The calling conventions assures us that each VMregpair is either
1271   // all really one physical register or adjacent stack slots.
1272   // This greatly simplifies the cases here compared to sparc.
1273 
1274   if (src.is_single_phys_reg() ) {
1275     if (dst.is_single_phys_reg()) {
1276       // In theory these overlap but the ordering is such that this is likely a nop
1277       if ( src.first() != dst.first()) {
1278         __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1279       }
1280     } else {
1281       assert(dst.is_single_reg(), "not a stack pair");
1282       __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1283     }
1284   } else if (dst.is_single_phys_reg()) {
1285     assert(src.is_single_reg(),  "not a stack pair");
1286     __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1287   } else {
1288     assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1289     __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1290     __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1291   }
1292 }
1293 
1294 
1295 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1296   // We always ignore the frame_slots arg and just use the space just below frame pointer
1297   // which by this time is free to use
1298   switch (ret_type) {
1299   case T_FLOAT:
1300     __ movflt(Address(rbp, -wordSize), xmm0);
1301     break;
1302   case T_DOUBLE:
1303     __ movdbl(Address(rbp, -wordSize), xmm0);
1304     break;
1305   case T_VOID:  break;
1306   default: {
1307     __ movptr(Address(rbp, -wordSize), rax);
1308     }
1309   }
1310 }
1311 
1312 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1313   // We always ignore the frame_slots arg and just use the space just below frame pointer
1314   // which by this time is free to use
1315   switch (ret_type) {
1316   case T_FLOAT:
1317     __ movflt(xmm0, Address(rbp, -wordSize));
1318     break;
1319   case T_DOUBLE:
1320     __ movdbl(xmm0, Address(rbp, -wordSize));
1321     break;
1322   case T_VOID:  break;
1323   default: {
1324     __ movptr(rax, Address(rbp, -wordSize));
1325     }
1326   }
1327 }
1328 
1329 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1330     for ( int i = first_arg ; i < arg_count ; i++ ) {
1331       if (args[i].first()->is_Register()) {
1332         __ push(args[i].first()->as_Register());
1333       } else if (args[i].first()->is_XMMRegister()) {
1334         __ subptr(rsp, 2*wordSize);
1335         __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1336       }
1337     }
1338 }
1339 
1340 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1341     for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1342       if (args[i].first()->is_Register()) {
1343         __ pop(args[i].first()->as_Register());
1344       } else if (args[i].first()->is_XMMRegister()) {
1345         __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1346         __ addptr(rsp, 2*wordSize);
1347       }
1348     }
1349 }
1350 
1351 
1352 static void save_or_restore_arguments(MacroAssembler* masm,
1353                                       const int stack_slots,
1354                                       const int total_in_args,
1355                                       const int arg_save_area,
1356                                       OopMap* map,
1357                                       VMRegPair* in_regs,
1358                                       BasicType* in_sig_bt) {
1359   // if map is non-NULL then the code should store the values,
1360   // otherwise it should load them.
1361   int slot = arg_save_area;
1362   // Save down double word first
1363   for ( int i = 0; i < total_in_args; i++) {
1364     if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1365       int offset = slot * VMRegImpl::stack_slot_size;
1366       slot += VMRegImpl::slots_per_word;
1367       assert(slot <= stack_slots, "overflow");
1368       if (map != NULL) {
1369         __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1370       } else {
1371         __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1372       }
1373     }
1374     if (in_regs[i].first()->is_Register() &&
1375         (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1376       int offset = slot * VMRegImpl::stack_slot_size;
1377       if (map != NULL) {
1378         __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
1379         if (in_sig_bt[i] == T_ARRAY) {
1380           map->set_oop(VMRegImpl::stack2reg(slot));;
1381         }
1382       } else {
1383         __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
1384       }
1385       slot += VMRegImpl::slots_per_word;
1386     }
1387   }
1388   // Save or restore single word registers
1389   for ( int i = 0; i < total_in_args; i++) {
1390     if (in_regs[i].first()->is_Register()) {
1391       int offset = slot * VMRegImpl::stack_slot_size;
1392       slot++;
1393       assert(slot <= stack_slots, "overflow");
1394 
1395       // Value is in an input register pass we must flush it to the stack
1396       const Register reg = in_regs[i].first()->as_Register();
1397       switch (in_sig_bt[i]) {
1398         case T_BOOLEAN:
1399         case T_CHAR:
1400         case T_BYTE:
1401         case T_SHORT:
1402         case T_INT:
1403           if (map != NULL) {
1404             __ movl(Address(rsp, offset), reg);
1405           } else {
1406             __ movl(reg, Address(rsp, offset));
1407           }
1408           break;
1409         case T_ARRAY:
1410         case T_LONG:
1411           // handled above
1412           break;
1413         case T_OBJECT:
1414         default: ShouldNotReachHere();
1415       }
1416     } else if (in_regs[i].first()->is_XMMRegister()) {
1417       if (in_sig_bt[i] == T_FLOAT) {
1418         int offset = slot * VMRegImpl::stack_slot_size;
1419         slot++;
1420         assert(slot <= stack_slots, "overflow");
1421         if (map != NULL) {
1422           __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1423         } else {
1424           __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1425         }
1426       }
1427     } else if (in_regs[i].first()->is_stack()) {
1428       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1429         int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1430         map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1431       }
1432     }
1433   }
1434 }
1435 
1436 
1437 // Check GCLocker::needs_gc and enter the runtime if it's true.  This
1438 // keeps a new JNI critical region from starting until a GC has been
1439 // forced.  Save down any oops in registers and describe them in an
1440 // OopMap.
1441 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1442                                                int stack_slots,
1443                                                int total_c_args,
1444                                                int total_in_args,
1445                                                int arg_save_area,
1446                                                OopMapSet* oop_maps,
1447                                                VMRegPair* in_regs,
1448                                                BasicType* in_sig_bt) {
1449   __ block_comment("check GCLocker::needs_gc");
1450   Label cont;
1451   __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1452   __ jcc(Assembler::equal, cont);
1453 
1454   // Save down any incoming oops and call into the runtime to halt for a GC
1455 
1456   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1457   save_or_restore_arguments(masm, stack_slots, total_in_args,
1458                             arg_save_area, map, in_regs, in_sig_bt);
1459 
1460   address the_pc = __ pc();
1461   oop_maps->add_gc_map( __ offset(), map);
1462   __ set_last_Java_frame(rsp, noreg, the_pc);
1463 
1464   __ block_comment("block_for_jni_critical");
1465   __ movptr(c_rarg0, r15_thread);
1466   __ mov(r12, rsp); // remember sp
1467   __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1468   __ andptr(rsp, -16); // align stack as required by ABI
1469   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1470   __ mov(rsp, r12); // restore sp
1471   __ reinit_heapbase();
1472 
1473   __ reset_last_Java_frame(false);
1474 
1475   save_or_restore_arguments(masm, stack_slots, total_in_args,
1476                             arg_save_area, NULL, in_regs, in_sig_bt);
1477   __ bind(cont);
1478 #ifdef ASSERT
1479   if (StressCriticalJNINatives) {
1480     // Stress register saving
1481     OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1482     save_or_restore_arguments(masm, stack_slots, total_in_args,
1483                               arg_save_area, map, in_regs, in_sig_bt);
1484     // Destroy argument registers
1485     for (int i = 0; i < total_in_args - 1; i++) {
1486       if (in_regs[i].first()->is_Register()) {
1487         const Register reg = in_regs[i].first()->as_Register();
1488         __ xorptr(reg, reg);
1489       } else if (in_regs[i].first()->is_XMMRegister()) {
1490         __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1491       } else if (in_regs[i].first()->is_FloatRegister()) {
1492         ShouldNotReachHere();
1493       } else if (in_regs[i].first()->is_stack()) {
1494         // Nothing to do
1495       } else {
1496         ShouldNotReachHere();
1497       }
1498       if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1499         i++;
1500       }
1501     }
1502 
1503     save_or_restore_arguments(masm, stack_slots, total_in_args,
1504                               arg_save_area, NULL, in_regs, in_sig_bt);
1505   }
1506 #endif
1507 }
1508 
1509 // Unpack an array argument into a pointer to the body and the length
1510 // if the array is non-null, otherwise pass 0 for both.
1511 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1512   Register tmp_reg = rax;
1513   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1514          "possible collision");
1515   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1516          "possible collision");
1517 
1518   __ block_comment("unpack_array_argument {");
1519 
1520   // Pass the length, ptr pair
1521   Label is_null, done;
1522   VMRegPair tmp;
1523   tmp.set_ptr(tmp_reg->as_VMReg());
1524   if (reg.first()->is_stack()) {
1525     // Load the arg up from the stack
1526     move_ptr(masm, reg, tmp);
1527     reg = tmp;
1528   }
1529   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1530   __ jccb(Assembler::equal, is_null);
1531   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1532   move_ptr(masm, tmp, body_arg);
1533   // load the length relative to the body.
1534   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1535                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1536   move32_64(masm, tmp, length_arg);
1537   __ jmpb(done);
1538   __ bind(is_null);
1539   // Pass zeros
1540   __ xorptr(tmp_reg, tmp_reg);
1541   move_ptr(masm, tmp, body_arg);
1542   move32_64(masm, tmp, length_arg);
1543   __ bind(done);
1544 
1545   __ block_comment("} unpack_array_argument");
1546 }
1547 
1548 
1549 // Different signatures may require very different orders for the move
1550 // to avoid clobbering other arguments.  There's no simple way to
1551 // order them safely.  Compute a safe order for issuing stores and
1552 // break any cycles in those stores.  This code is fairly general but
1553 // it's not necessary on the other platforms so we keep it in the
1554 // platform dependent code instead of moving it into a shared file.
1555 // (See bugs 7013347 & 7145024.)
1556 // Note that this code is specific to LP64.
1557 class ComputeMoveOrder: public StackObj {
1558   class MoveOperation: public ResourceObj {
1559     friend class ComputeMoveOrder;
1560    private:
1561     VMRegPair        _src;
1562     VMRegPair        _dst;
1563     int              _src_index;
1564     int              _dst_index;
1565     bool             _processed;
1566     MoveOperation*  _next;
1567     MoveOperation*  _prev;
1568 
1569     static int get_id(VMRegPair r) {
1570       return r.first()->value();
1571     }
1572 
1573    public:
1574     MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1575       _src(src)
1576     , _src_index(src_index)
1577     , _dst(dst)
1578     , _dst_index(dst_index)
1579     , _next(NULL)
1580     , _prev(NULL)
1581     , _processed(false) {
1582     }
1583 
1584     VMRegPair src() const              { return _src; }
1585     int src_id() const                 { return get_id(src()); }
1586     int src_index() const              { return _src_index; }
1587     VMRegPair dst() const              { return _dst; }
1588     void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
1589     int dst_index() const              { return _dst_index; }
1590     int dst_id() const                 { return get_id(dst()); }
1591     MoveOperation* next() const       { return _next; }
1592     MoveOperation* prev() const       { return _prev; }
1593     void set_processed()               { _processed = true; }
1594     bool is_processed() const          { return _processed; }
1595 
1596     // insert
1597     void break_cycle(VMRegPair temp_register) {
1598       // create a new store following the last store
1599       // to move from the temp_register to the original
1600       MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
1601 
1602       // break the cycle of links and insert new_store at the end
1603       // break the reverse link.
1604       MoveOperation* p = prev();
1605       assert(p->next() == this, "must be");
1606       _prev = NULL;
1607       p->_next = new_store;
1608       new_store->_prev = p;
1609 
1610       // change the original store to save it's value in the temp.
1611       set_dst(-1, temp_register);
1612     }
1613 
1614     void link(GrowableArray<MoveOperation*>& killer) {
1615       // link this store in front the store that it depends on
1616       MoveOperation* n = killer.at_grow(src_id(), NULL);
1617       if (n != NULL) {
1618         assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
1619         _next = n;
1620         n->_prev = this;
1621       }
1622     }
1623   };
1624 
1625  private:
1626   GrowableArray<MoveOperation*> edges;
1627 
1628  public:
1629   ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1630                     BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
1631     // Move operations where the dest is the stack can all be
1632     // scheduled first since they can't interfere with the other moves.
1633     for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1634       if (in_sig_bt[i] == T_ARRAY) {
1635         c_arg--;
1636         if (out_regs[c_arg].first()->is_stack() &&
1637             out_regs[c_arg + 1].first()->is_stack()) {
1638           arg_order.push(i);
1639           arg_order.push(c_arg);
1640         } else {
1641           if (out_regs[c_arg].first()->is_stack() ||
1642               in_regs[i].first() == out_regs[c_arg].first()) {
1643             add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
1644           } else {
1645             add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1646           }
1647         }
1648       } else if (in_sig_bt[i] == T_VOID) {
1649         arg_order.push(i);
1650         arg_order.push(c_arg);
1651       } else {
1652         if (out_regs[c_arg].first()->is_stack() ||
1653             in_regs[i].first() == out_regs[c_arg].first()) {
1654           arg_order.push(i);
1655           arg_order.push(c_arg);
1656         } else {
1657           add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1658         }
1659       }
1660     }
1661     // Break any cycles in the register moves and emit the in the
1662     // proper order.
1663     GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
1664     for (int i = 0; i < stores->length(); i++) {
1665       arg_order.push(stores->at(i)->src_index());
1666       arg_order.push(stores->at(i)->dst_index());
1667     }
1668  }
1669 
1670   // Collected all the move operations
1671   void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
1672     if (src.first() == dst.first()) return;
1673     edges.append(new MoveOperation(src_index, src, dst_index, dst));
1674   }
1675 
1676   // Walk the edges breaking cycles between moves.  The result list
1677   // can be walked in order to produce the proper set of loads
1678   GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
1679     // Record which moves kill which values
1680     GrowableArray<MoveOperation*> killer;
1681     for (int i = 0; i < edges.length(); i++) {
1682       MoveOperation* s = edges.at(i);
1683       assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
1684       killer.at_put_grow(s->dst_id(), s, NULL);
1685     }
1686     assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
1687            "make sure temp isn't in the registers that are killed");
1688 
1689     // create links between loads and stores
1690     for (int i = 0; i < edges.length(); i++) {
1691       edges.at(i)->link(killer);
1692     }
1693 
1694     // at this point, all the move operations are chained together
1695     // in a doubly linked list.  Processing it backwards finds
1696     // the beginning of the chain, forwards finds the end.  If there's
1697     // a cycle it can be broken at any point,  so pick an edge and walk
1698     // backward until the list ends or we end where we started.
1699     GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
1700     for (int e = 0; e < edges.length(); e++) {
1701       MoveOperation* s = edges.at(e);
1702       if (!s->is_processed()) {
1703         MoveOperation* start = s;
1704         // search for the beginning of the chain or cycle
1705         while (start->prev() != NULL && start->prev() != s) {
1706           start = start->prev();
1707         }
1708         if (start->prev() == s) {
1709           start->break_cycle(temp_register);
1710         }
1711         // walk the chain forward inserting to store list
1712         while (start != NULL) {
1713           stores->append(start);
1714           start->set_processed();
1715           start = start->next();
1716         }
1717       }
1718     }
1719     return stores;
1720   }
1721 };
1722 
1723 static void verify_oop_args(MacroAssembler* masm,
1724                             const methodHandle& method,
1725                             const BasicType* sig_bt,
1726                             const VMRegPair* regs) {
1727   Register temp_reg = rbx;  // not part of any compiled calling seq
1728   if (VerifyOops) {
1729     for (int i = 0; i < method->size_of_parameters(); i++) {
1730       if (sig_bt[i] == T_OBJECT ||
1731           sig_bt[i] == T_ARRAY) {
1732         VMReg r = regs[i].first();
1733         assert(r->is_valid(), "bad oop arg");
1734         if (r->is_stack()) {
1735           __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1736           __ verify_oop(temp_reg);
1737         } else {
1738           __ verify_oop(r->as_Register());
1739         }
1740       }
1741     }
1742   }
1743 }
1744 
1745 static void gen_special_dispatch(MacroAssembler* masm,
1746                                  const methodHandle& method,
1747                                  const BasicType* sig_bt,
1748                                  const VMRegPair* regs) {
1749   verify_oop_args(masm, method, sig_bt, regs);
1750   vmIntrinsics::ID iid = method->intrinsic_id();
1751 
1752   // Now write the args into the outgoing interpreter space
1753   bool     has_receiver   = false;
1754   Register receiver_reg   = noreg;
1755   int      member_arg_pos = -1;
1756   Register member_reg     = noreg;
1757   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1758   if (ref_kind != 0) {
1759     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1760     member_reg = rbx;  // known to be free at this point
1761     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1762   } else if (iid == vmIntrinsics::_invokeBasic) {
1763     has_receiver = true;
1764   } else {
1765     fatal("unexpected intrinsic id %d", iid);
1766   }
1767 
1768   if (member_reg != noreg) {
1769     // Load the member_arg into register, if necessary.
1770     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1771     VMReg r = regs[member_arg_pos].first();
1772     if (r->is_stack()) {
1773       __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1774     } else {
1775       // no data motion is needed
1776       member_reg = r->as_Register();
1777     }
1778   }
1779 
1780   if (has_receiver) {
1781     // Make sure the receiver is loaded into a register.
1782     assert(method->size_of_parameters() > 0, "oob");
1783     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1784     VMReg r = regs[0].first();
1785     assert(r->is_valid(), "bad receiver arg");
1786     if (r->is_stack()) {
1787       // Porting note:  This assumes that compiled calling conventions always
1788       // pass the receiver oop in a register.  If this is not true on some
1789       // platform, pick a temp and load the receiver from stack.
1790       fatal("receiver always in a register");
1791       receiver_reg = j_rarg0;  // known to be free at this point
1792       __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1793     } else {
1794       // no data motion is needed
1795       receiver_reg = r->as_Register();
1796     }
1797   }
1798 
1799   // Figure out which address we are really jumping to:
1800   MethodHandles::generate_method_handle_dispatch(masm, iid,
1801                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1802 }
1803 
1804 // ---------------------------------------------------------------------------
1805 // Generate a native wrapper for a given method.  The method takes arguments
1806 // in the Java compiled code convention, marshals them to the native
1807 // convention (handlizes oops, etc), transitions to native, makes the call,
1808 // returns to java state (possibly blocking), unhandlizes any result and
1809 // returns.
1810 //
1811 // Critical native functions are a shorthand for the use of
1812 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1813 // functions.  The wrapper is expected to unpack the arguments before
1814 // passing them to the callee and perform checks before and after the
1815 // native call to ensure that they GCLocker
1816 // lock_critical/unlock_critical semantics are followed.  Some other
1817 // parts of JNI setup are skipped like the tear down of the JNI handle
1818 // block and the check for pending exceptions it's impossible for them
1819 // to be thrown.
1820 //
1821 // They are roughly structured like this:
1822 //    if (GCLocker::needs_gc())
1823 //      SharedRuntime::block_for_jni_critical();
1824 //    tranistion to thread_in_native
1825 //    unpack arrray arguments and call native entry point
1826 //    check for safepoint in progress
1827 //    check if any thread suspend flags are set
1828 //      call into JVM and possible unlock the JNI critical
1829 //      if a GC was suppressed while in the critical native.
1830 //    transition back to thread_in_Java
1831 //    return to caller
1832 //
1833 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1834                                                 const methodHandle& method,
1835                                                 int compile_id,
1836                                                 BasicType* in_sig_bt,
1837                                                 VMRegPair* in_regs,
1838                                                 BasicType ret_type) {
1839   if (method->is_method_handle_intrinsic()) {
1840     vmIntrinsics::ID iid = method->intrinsic_id();
1841     intptr_t start = (intptr_t)__ pc();
1842     int vep_offset = ((intptr_t)__ pc()) - start;
1843     gen_special_dispatch(masm,
1844                          method,
1845                          in_sig_bt,
1846                          in_regs);
1847     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1848     __ flush();
1849     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1850     return nmethod::new_native_nmethod(method,
1851                                        compile_id,
1852                                        masm->code(),
1853                                        vep_offset,
1854                                        frame_complete,
1855                                        stack_slots / VMRegImpl::slots_per_word,
1856                                        in_ByteSize(-1),
1857                                        in_ByteSize(-1),
1858                                        (OopMapSet*)NULL);
1859   }
1860   bool is_critical_native = true;
1861   address native_func = method->critical_native_function();
1862   if (native_func == NULL) {
1863     native_func = method->native_function();
1864     is_critical_native = false;
1865   }
1866   assert(native_func != NULL, "must have function");
1867 
1868   // An OopMap for lock (and class if static)
1869   OopMapSet *oop_maps = new OopMapSet();
1870   intptr_t start = (intptr_t)__ pc();
1871 
1872   // We have received a description of where all the java arg are located
1873   // on entry to the wrapper. We need to convert these args to where
1874   // the jni function will expect them. To figure out where they go
1875   // we convert the java signature to a C signature by inserting
1876   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1877 
1878   const int total_in_args = method->size_of_parameters();
1879   int total_c_args = total_in_args;
1880   if (!is_critical_native) {
1881     total_c_args += 1;
1882     if (method->is_static()) {
1883       total_c_args++;
1884     }
1885   } else {
1886     for (int i = 0; i < total_in_args; i++) {
1887       if (in_sig_bt[i] == T_ARRAY) {
1888         total_c_args++;
1889       }
1890     }
1891   }
1892 
1893   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1894   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1895   BasicType* in_elem_bt = NULL;
1896 
1897   int argc = 0;
1898   if (!is_critical_native) {
1899     out_sig_bt[argc++] = T_ADDRESS;
1900     if (method->is_static()) {
1901       out_sig_bt[argc++] = T_OBJECT;
1902     }
1903 
1904     for (int i = 0; i < total_in_args ; i++ ) {
1905       out_sig_bt[argc++] = in_sig_bt[i];
1906     }
1907   } else {
1908     Thread* THREAD = Thread::current();
1909     in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1910     SignatureStream ss(method->signature());
1911     for (int i = 0; i < total_in_args ; i++ ) {
1912       if (in_sig_bt[i] == T_ARRAY) {
1913         // Arrays are passed as int, elem* pair
1914         out_sig_bt[argc++] = T_INT;
1915         out_sig_bt[argc++] = T_ADDRESS;
1916         Symbol* atype = ss.as_symbol(CHECK_NULL);
1917         const char* at = atype->as_C_string();
1918         if (strlen(at) == 2) {
1919           assert(at[0] == '[', "must be");
1920           switch (at[1]) {
1921             case 'B': in_elem_bt[i]  = T_BYTE; break;
1922             case 'C': in_elem_bt[i]  = T_CHAR; break;
1923             case 'D': in_elem_bt[i]  = T_DOUBLE; break;
1924             case 'F': in_elem_bt[i]  = T_FLOAT; break;
1925             case 'I': in_elem_bt[i]  = T_INT; break;
1926             case 'J': in_elem_bt[i]  = T_LONG; break;
1927             case 'S': in_elem_bt[i]  = T_SHORT; break;
1928             case 'Z': in_elem_bt[i]  = T_BOOLEAN; break;
1929             default: ShouldNotReachHere();
1930           }
1931         }
1932       } else {
1933         out_sig_bt[argc++] = in_sig_bt[i];
1934         in_elem_bt[i] = T_VOID;
1935       }
1936       if (in_sig_bt[i] != T_VOID) {
1937         assert(in_sig_bt[i] == ss.type(), "must match");
1938         ss.next();
1939       }
1940     }
1941   }
1942 
1943   // Now figure out where the args must be stored and how much stack space
1944   // they require.
1945   int out_arg_slots;
1946   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1947 
1948   // Compute framesize for the wrapper.  We need to handlize all oops in
1949   // incoming registers
1950 
1951   // Calculate the total number of stack slots we will need.
1952 
1953   // First count the abi requirement plus all of the outgoing args
1954   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1955 
1956   // Now the space for the inbound oop handle area
1957   int total_save_slots = 6 * VMRegImpl::slots_per_word;  // 6 arguments passed in registers
1958   if (is_critical_native) {
1959     // Critical natives may have to call out so they need a save area
1960     // for register arguments.
1961     int double_slots = 0;
1962     int single_slots = 0;
1963     for ( int i = 0; i < total_in_args; i++) {
1964       if (in_regs[i].first()->is_Register()) {
1965         const Register reg = in_regs[i].first()->as_Register();
1966         switch (in_sig_bt[i]) {
1967           case T_BOOLEAN:
1968           case T_BYTE:
1969           case T_SHORT:
1970           case T_CHAR:
1971           case T_INT:  single_slots++; break;
1972           case T_ARRAY:  // specific to LP64 (7145024)
1973           case T_LONG: double_slots++; break;
1974           default:  ShouldNotReachHere();
1975         }
1976       } else if (in_regs[i].first()->is_XMMRegister()) {
1977         switch (in_sig_bt[i]) {
1978           case T_FLOAT:  single_slots++; break;
1979           case T_DOUBLE: double_slots++; break;
1980           default:  ShouldNotReachHere();
1981         }
1982       } else if (in_regs[i].first()->is_FloatRegister()) {
1983         ShouldNotReachHere();
1984       }
1985     }
1986     total_save_slots = double_slots * 2 + single_slots;
1987     // align the save area
1988     if (double_slots != 0) {
1989       stack_slots = align_up(stack_slots, 2);
1990     }
1991   }
1992 
1993   int oop_handle_offset = stack_slots;
1994   stack_slots += total_save_slots;
1995 
1996   // Now any space we need for handlizing a klass if static method
1997 
1998   int klass_slot_offset = 0;
1999   int klass_offset = -1;
2000   int lock_slot_offset = 0;
2001   bool is_static = false;
2002 
2003   if (method->is_static()) {
2004     klass_slot_offset = stack_slots;
2005     stack_slots += VMRegImpl::slots_per_word;
2006     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
2007     is_static = true;
2008   }
2009 
2010   // Plus a lock if needed
2011 
2012   if (method->is_synchronized()) {
2013     lock_slot_offset = stack_slots;
2014     stack_slots += VMRegImpl::slots_per_word;
2015   }
2016 
2017   // Now a place (+2) to save return values or temp during shuffling
2018   // + 4 for return address (which we own) and saved rbp
2019   stack_slots += 6;
2020 
2021   // Ok The space we have allocated will look like:
2022   //
2023   //
2024   // FP-> |                     |
2025   //      |---------------------|
2026   //      | 2 slots for moves   |
2027   //      |---------------------|
2028   //      | lock box (if sync)  |
2029   //      |---------------------| <- lock_slot_offset
2030   //      | klass (if static)   |
2031   //      |---------------------| <- klass_slot_offset
2032   //      | oopHandle area      |
2033   //      |---------------------| <- oop_handle_offset (6 java arg registers)
2034   //      | outbound memory     |
2035   //      | based arguments     |
2036   //      |                     |
2037   //      |---------------------|
2038   //      |                     |
2039   // SP-> | out_preserved_slots |
2040   //
2041   //
2042 
2043 
2044   // Now compute actual number of stack words we need rounding to make
2045   // stack properly aligned.
2046   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
2047 
2048   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2049 
2050   // First thing make an ic check to see if we should even be here
2051 
2052   // We are free to use all registers as temps without saving them and
2053   // restoring them except rbp. rbp is the only callee save register
2054   // as far as the interpreter and the compiler(s) are concerned.
2055 
2056 
2057   const Register ic_reg = rax;
2058   const Register receiver = j_rarg0;
2059 
2060   Label hit;
2061   Label exception_pending;
2062 
2063   assert_different_registers(ic_reg, receiver, rscratch1);
2064   __ verify_oop(receiver);
2065   __ load_klass(rscratch1, receiver);
2066   __ cmpq(ic_reg, rscratch1);
2067   __ jcc(Assembler::equal, hit);
2068 
2069   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2070 
2071   // Verified entry point must be aligned
2072   __ align(8);
2073 
2074   __ bind(hit);
2075 
2076   int vep_offset = ((intptr_t)__ pc()) - start;
2077 
2078 #ifdef COMPILER1
2079   // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
2080   if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
2081     inline_check_hashcode_from_object_header(masm, method, j_rarg0 /*obj_reg*/, rax /*result*/);
2082   }
2083 #endif // COMPILER1
2084 
2085   // The instruction at the verified entry point must be 5 bytes or longer
2086   // because it can be patched on the fly by make_non_entrant. The stack bang
2087   // instruction fits that requirement.
2088 
2089   // Generate stack overflow check
2090 
2091   if (UseStackBanging) {
2092     __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
2093   } else {
2094     // need a 5 byte instruction to allow MT safe patching to non-entrant
2095     __ fat_nop();
2096   }
2097 
2098   // Generate a new frame for the wrapper.
2099   __ enter();
2100   // -2 because return address is already present and so is saved rbp
2101   __ subptr(rsp, stack_size - 2*wordSize);
2102 
2103   // Frame is now completed as far as size and linkage.
2104   int frame_complete = ((intptr_t)__ pc()) - start;
2105 
2106     if (UseRTMLocking) {
2107       // Abort RTM transaction before calling JNI
2108       // because critical section will be large and will be
2109       // aborted anyway. Also nmethod could be deoptimized.
2110       __ xabort(0);
2111     }
2112 
2113 #ifdef ASSERT
2114     {
2115       Label L;
2116       __ mov(rax, rsp);
2117       __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
2118       __ cmpptr(rax, rsp);
2119       __ jcc(Assembler::equal, L);
2120       __ stop("improperly aligned stack");
2121       __ bind(L);
2122     }
2123 #endif /* ASSERT */
2124 
2125 
2126   // We use r14 as the oop handle for the receiver/klass
2127   // It is callee save so it survives the call to native
2128 
2129   const Register oop_handle_reg = r14;
2130 
2131   if (is_critical_native) {
2132     check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
2133                                        oop_handle_offset, oop_maps, in_regs, in_sig_bt);
2134   }
2135 
2136   //
2137   // We immediately shuffle the arguments so that any vm call we have to
2138   // make from here on out (sync slow path, jvmti, etc.) we will have
2139   // captured the oops from our caller and have a valid oopMap for
2140   // them.
2141 
2142   // -----------------
2143   // The Grand Shuffle
2144 
2145   // The Java calling convention is either equal (linux) or denser (win64) than the
2146   // c calling convention. However the because of the jni_env argument the c calling
2147   // convention always has at least one more (and two for static) arguments than Java.
2148   // Therefore if we move the args from java -> c backwards then we will never have
2149   // a register->register conflict and we don't have to build a dependency graph
2150   // and figure out how to break any cycles.
2151   //
2152 
2153   // Record esp-based slot for receiver on stack for non-static methods
2154   int receiver_offset = -1;
2155 
2156   // This is a trick. We double the stack slots so we can claim
2157   // the oops in the caller's frame. Since we are sure to have
2158   // more args than the caller doubling is enough to make
2159   // sure we can capture all the incoming oop args from the
2160   // caller.
2161   //
2162   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2163 
2164   // Mark location of rbp (someday)
2165   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2166 
2167   // Use eax, ebx as temporaries during any memory-memory moves we have to do
2168   // All inbound args are referenced based on rbp and all outbound args via rsp.
2169 
2170 
2171 #ifdef ASSERT
2172   bool reg_destroyed[RegisterImpl::number_of_registers];
2173   bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2174   for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2175     reg_destroyed[r] = false;
2176   }
2177   for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2178     freg_destroyed[f] = false;
2179   }
2180 
2181 #endif /* ASSERT */
2182 
2183   // This may iterate in two different directions depending on the
2184   // kind of native it is.  The reason is that for regular JNI natives
2185   // the incoming and outgoing registers are offset upwards and for
2186   // critical natives they are offset down.
2187   GrowableArray<int> arg_order(2 * total_in_args);
2188   VMRegPair tmp_vmreg;
2189   tmp_vmreg.set2(rbx->as_VMReg());
2190 
2191   if (!is_critical_native) {
2192     for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2193       arg_order.push(i);
2194       arg_order.push(c_arg);
2195     }
2196   } else {
2197     // Compute a valid move order, using tmp_vmreg to break any cycles
2198     ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2199   }
2200 
2201   int temploc = -1;
2202   for (int ai = 0; ai < arg_order.length(); ai += 2) {
2203     int i = arg_order.at(ai);
2204     int c_arg = arg_order.at(ai + 1);
2205     __ block_comment(err_msg("move %d -> %d", i, c_arg));
2206     if (c_arg == -1) {
2207       assert(is_critical_native, "should only be required for critical natives");
2208       // This arg needs to be moved to a temporary
2209       __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2210       in_regs[i] = tmp_vmreg;
2211       temploc = i;
2212       continue;
2213     } else if (i == -1) {
2214       assert(is_critical_native, "should only be required for critical natives");
2215       // Read from the temporary location
2216       assert(temploc != -1, "must be valid");
2217       i = temploc;
2218       temploc = -1;
2219     }
2220 #ifdef ASSERT
2221     if (in_regs[i].first()->is_Register()) {
2222       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2223     } else if (in_regs[i].first()->is_XMMRegister()) {
2224       assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2225     }
2226     if (out_regs[c_arg].first()->is_Register()) {
2227       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2228     } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2229       freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2230     }
2231 #endif /* ASSERT */
2232     switch (in_sig_bt[i]) {
2233       case T_ARRAY:
2234         if (is_critical_native) {
2235           unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2236           c_arg++;
2237 #ifdef ASSERT
2238           if (out_regs[c_arg].first()->is_Register()) {
2239             reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2240           } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2241             freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2242           }
2243 #endif
2244           break;
2245         }
2246       case T_OBJECT:
2247         assert(!is_critical_native, "no oop arguments");
2248         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2249                     ((i == 0) && (!is_static)),
2250                     &receiver_offset);
2251         break;
2252       case T_VOID:
2253         break;
2254 
2255       case T_FLOAT:
2256         float_move(masm, in_regs[i], out_regs[c_arg]);
2257           break;
2258 
2259       case T_DOUBLE:
2260         assert( i + 1 < total_in_args &&
2261                 in_sig_bt[i + 1] == T_VOID &&
2262                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2263         double_move(masm, in_regs[i], out_regs[c_arg]);
2264         break;
2265 
2266       case T_LONG :
2267         long_move(masm, in_regs[i], out_regs[c_arg]);
2268         break;
2269 
2270       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2271 
2272       default:
2273         move32_64(masm, in_regs[i], out_regs[c_arg]);
2274     }
2275   }
2276 
2277   int c_arg;
2278 
2279   // Pre-load a static method's oop into r14.  Used both by locking code and
2280   // the normal JNI call code.
2281   if (!is_critical_native) {
2282     // point c_arg at the first arg that is already loaded in case we
2283     // need to spill before we call out
2284     c_arg = total_c_args - total_in_args;
2285 
2286     if (method->is_static()) {
2287 
2288       //  load oop into a register
2289       __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2290 
2291       // Now handlize the static class mirror it's known not-null.
2292       __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2293       map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2294 
2295       // Now get the handle
2296       __ lea(oop_handle_reg, Address(rsp, klass_offset));
2297       // store the klass handle as second argument
2298       __ movptr(c_rarg1, oop_handle_reg);
2299       // and protect the arg if we must spill
2300       c_arg--;
2301     }
2302   } else {
2303     // For JNI critical methods we need to save all registers in save_args.
2304     c_arg = 0;
2305   }
2306 
2307   // Change state to native (we save the return address in the thread, since it might not
2308   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2309   // points into the right code segment. It does not have to be the correct return pc.
2310   // We use the same pc/oopMap repeatedly when we call out
2311 
2312   intptr_t the_pc = (intptr_t) __ pc();
2313   oop_maps->add_gc_map(the_pc - start, map);
2314 
2315   __ set_last_Java_frame(rsp, noreg, (address)the_pc);
2316 
2317 
2318   // We have all of the arguments setup at this point. We must not touch any register
2319   // argument registers at this point (what if we save/restore them there are no oop?
2320 
2321   {
2322     SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2323     // protect the args we've loaded
2324     save_args(masm, total_c_args, c_arg, out_regs);
2325     __ mov_metadata(c_rarg1, method());
2326     __ call_VM_leaf(
2327       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2328       r15_thread, c_rarg1);
2329     restore_args(masm, total_c_args, c_arg, out_regs);
2330   }
2331 
2332   // RedefineClasses() tracing support for obsolete method entry
2333   if (log_is_enabled(Trace, redefine, class, obsolete)) {
2334     // protect the args we've loaded
2335     save_args(masm, total_c_args, c_arg, out_regs);
2336     __ mov_metadata(c_rarg1, method());
2337     __ call_VM_leaf(
2338       CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2339       r15_thread, c_rarg1);
2340     restore_args(masm, total_c_args, c_arg, out_regs);
2341   }
2342 
2343   // Lock a synchronized method
2344 
2345   // Register definitions used by locking and unlocking
2346 
2347   const Register swap_reg = rax;  // Must use rax for cmpxchg instruction
2348   const Register obj_reg  = rbx;  // Will contain the oop
2349   const Register lock_reg = r13;  // Address of compiler lock object (BasicLock)
2350   const Register old_hdr  = r13;  // value of old header at unlock time
2351 
2352   Label slow_path_lock;
2353   Label lock_done;
2354 
2355   if (method->is_synchronized()) {
2356     assert(!is_critical_native, "unhandled");
2357 
2358 
2359     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2360 
2361     // Get the handle (the 2nd argument)
2362     __ mov(oop_handle_reg, c_rarg1);
2363 
2364     // Get address of the box
2365 
2366     __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2367 
2368     // Load the oop from the handle
2369     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2370 
2371     if (UseBiasedLocking) {
2372       __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
2373     }
2374 
2375     // Load immediate 1 into swap_reg %rax
2376     __ movl(swap_reg, 1);
2377 
2378     // Load (object->mark() | 1) into swap_reg %rax
2379     __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2380 
2381     // Save (object->mark() | 1) into BasicLock's displaced header
2382     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2383 
2384     if (os::is_MP()) {
2385       __ lock();
2386     }
2387 
2388     // src -> dest iff dest == rax else rax <- dest
2389     __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2390     __ jcc(Assembler::equal, lock_done);
2391 
2392     // Hmm should this move to the slow path code area???
2393 
2394     // Test if the oopMark is an obvious stack pointer, i.e.,
2395     //  1) (mark & 3) == 0, and
2396     //  2) rsp <= mark < mark + os::pagesize()
2397     // These 3 tests can be done by evaluating the following
2398     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2399     // assuming both stack pointer and pagesize have their
2400     // least significant 2 bits clear.
2401     // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
2402 
2403     __ subptr(swap_reg, rsp);
2404     __ andptr(swap_reg, 3 - os::vm_page_size());
2405 
2406     // Save the test result, for recursive case, the result is zero
2407     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2408     __ jcc(Assembler::notEqual, slow_path_lock);
2409 
2410     // Slow path will re-enter here
2411 
2412     __ bind(lock_done);
2413   }
2414 
2415 
2416   // Finally just about ready to make the JNI call
2417 
2418 
2419   // get JNIEnv* which is first argument to native
2420   if (!is_critical_native) {
2421     __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
2422   }
2423 
2424   // Now set thread in native
2425   __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
2426 
2427   __ call(RuntimeAddress(native_func));
2428 
2429   // Verify or restore cpu control state after JNI call
2430   __ restore_cpu_control_state_after_jni();
2431 
2432   // Unpack native results.
2433   switch (ret_type) {
2434   case T_BOOLEAN: __ c2bool(rax);            break;
2435   case T_CHAR   : __ movzwl(rax, rax);      break;
2436   case T_BYTE   : __ sign_extend_byte (rax); break;
2437   case T_SHORT  : __ sign_extend_short(rax); break;
2438   case T_INT    : /* nothing to do */        break;
2439   case T_DOUBLE :
2440   case T_FLOAT  :
2441     // Result is in xmm0 we'll save as needed
2442     break;
2443   case T_ARRAY:                 // Really a handle
2444   case T_OBJECT:                // Really a handle
2445       break; // can't de-handlize until after safepoint check
2446   case T_VOID: break;
2447   case T_LONG: break;
2448   default       : ShouldNotReachHere();
2449   }
2450 
2451   // Switch thread to "native transition" state before reading the synchronization state.
2452   // This additional state is necessary because reading and testing the synchronization
2453   // state is not atomic w.r.t. GC, as this scenario demonstrates:
2454   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2455   //     VM thread changes sync state to synchronizing and suspends threads for GC.
2456   //     Thread A is resumed to finish this native method, but doesn't block here since it
2457   //     didn't see any synchronization is progress, and escapes.
2458   __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2459 
2460   if(os::is_MP()) {
2461     if (UseMembar) {
2462       // Force this write out before the read below
2463       __ membar(Assembler::Membar_mask_bits(
2464            Assembler::LoadLoad | Assembler::LoadStore |
2465            Assembler::StoreLoad | Assembler::StoreStore));
2466     } else {
2467       // Write serialization page so VM thread can do a pseudo remote membar.
2468       // We use the current thread pointer to calculate a thread specific
2469       // offset to write to within the page. This minimizes bus traffic
2470       // due to cache line collision.
2471       __ serialize_memory(r15_thread, rcx);
2472     }
2473   }
2474 
2475   Label after_transition;
2476 
2477   // check for safepoint operation in progress and/or pending suspend requests
2478   {
2479     Label Continue;
2480     Label slow_path;
2481 
2482     __ safepoint_poll(slow_path, r15_thread, rscratch1);
2483 
2484     __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
2485     __ jcc(Assembler::equal, Continue);
2486     __ bind(slow_path);
2487 
2488     // Don't use call_VM as it will see a possible pending exception and forward it
2489     // and never return here preventing us from clearing _last_native_pc down below.
2490     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2491     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2492     // by hand.
2493     //
2494     __ vzeroupper();
2495     save_native_result(masm, ret_type, stack_slots);
2496     __ mov(c_rarg0, r15_thread);
2497     __ mov(r12, rsp); // remember sp
2498     __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2499     __ andptr(rsp, -16); // align stack as required by ABI
2500     if (!is_critical_native) {
2501       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2502     } else {
2503       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
2504     }
2505     __ mov(rsp, r12); // restore sp
2506     __ reinit_heapbase();
2507     // Restore any method result value
2508     restore_native_result(masm, ret_type, stack_slots);
2509 
2510     if (is_critical_native) {
2511       // The call above performed the transition to thread_in_Java so
2512       // skip the transition logic below.
2513       __ jmpb(after_transition);
2514     }
2515 
2516     __ bind(Continue);
2517   }
2518 
2519   // change thread state
2520   __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
2521   __ bind(after_transition);
2522 
2523   Label reguard;
2524   Label reguard_done;
2525   __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2526   __ jcc(Assembler::equal, reguard);
2527   __ bind(reguard_done);
2528 
2529   // native result if any is live
2530 
2531   // Unlock
2532   Label unlock_done;
2533   Label slow_path_unlock;
2534   if (method->is_synchronized()) {
2535 
2536     // Get locked oop from the handle we passed to jni
2537     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2538 
2539     Label done;
2540 
2541     if (UseBiasedLocking) {
2542       __ biased_locking_exit(obj_reg, old_hdr, done);
2543     }
2544 
2545     // Simple recursive lock?
2546 
2547     __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
2548     __ jcc(Assembler::equal, done);
2549 
2550     // Must save rax if if it is live now because cmpxchg must use it
2551     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2552       save_native_result(masm, ret_type, stack_slots);
2553     }
2554 
2555 
2556     // get address of the stack lock
2557     __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2558     //  get old displaced header
2559     __ movptr(old_hdr, Address(rax, 0));
2560 
2561     // Atomic swap old header if oop still contains the stack lock
2562     if (os::is_MP()) {
2563       __ lock();
2564     }
2565     __ cmpxchgptr(old_hdr, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2566     __ jcc(Assembler::notEqual, slow_path_unlock);
2567 
2568     // slow path re-enters here
2569     __ bind(unlock_done);
2570     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2571       restore_native_result(masm, ret_type, stack_slots);
2572     }
2573 
2574     __ bind(done);
2575 
2576   }
2577   {
2578     SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2579     save_native_result(masm, ret_type, stack_slots);
2580     __ mov_metadata(c_rarg1, method());
2581     __ call_VM_leaf(
2582          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2583          r15_thread, c_rarg1);
2584     restore_native_result(masm, ret_type, stack_slots);
2585   }
2586 
2587   __ reset_last_Java_frame(false);
2588 
2589   // Unbox oop result, e.g. JNIHandles::resolve value.
2590   if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2591     __ resolve_jobject(rax /* value */,
2592                        r15_thread /* thread */,
2593                        rcx /* tmp */);
2594   }
2595 
2596   if (CheckJNICalls) {
2597     // clear_pending_jni_exception_check
2598     __ movptr(Address(r15_thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2599   }
2600 
2601   if (!is_critical_native) {
2602     // reset handle block
2603     __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
2604     __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
2605   }
2606 
2607   // pop our frame
2608 
2609   __ leave();
2610 
2611   if (!is_critical_native) {
2612     // Any exception pending?
2613     __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2614     __ jcc(Assembler::notEqual, exception_pending);
2615   }
2616 
2617   // Return
2618 
2619   __ ret(0);
2620 
2621   // Unexpected paths are out of line and go here
2622 
2623   if (!is_critical_native) {
2624     // forward the exception
2625     __ bind(exception_pending);
2626 
2627     // and forward the exception
2628     __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2629   }
2630 
2631   // Slow path locking & unlocking
2632   if (method->is_synchronized()) {
2633 
2634     // BEGIN Slow path lock
2635     __ bind(slow_path_lock);
2636 
2637     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2638     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2639 
2640     // protect the args we've loaded
2641     save_args(masm, total_c_args, c_arg, out_regs);
2642 
2643     __ mov(c_rarg0, obj_reg);
2644     __ mov(c_rarg1, lock_reg);
2645     __ mov(c_rarg2, r15_thread);
2646 
2647     // Not a leaf but we have last_Java_frame setup as we want
2648     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2649     restore_args(masm, total_c_args, c_arg, out_regs);
2650 
2651 #ifdef ASSERT
2652     { Label L;
2653     __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2654     __ jcc(Assembler::equal, L);
2655     __ stop("no pending exception allowed on exit from monitorenter");
2656     __ bind(L);
2657     }
2658 #endif
2659     __ jmp(lock_done);
2660 
2661     // END Slow path lock
2662 
2663     // BEGIN Slow path unlock
2664     __ bind(slow_path_unlock);
2665 
2666     // If we haven't already saved the native result we must save it now as xmm registers
2667     // are still exposed.
2668     __ vzeroupper();
2669     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2670       save_native_result(masm, ret_type, stack_slots);
2671     }
2672 
2673     __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2674 
2675     __ mov(c_rarg0, obj_reg);
2676     __ mov(c_rarg2, r15_thread);
2677     __ mov(r12, rsp); // remember sp
2678     __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2679     __ andptr(rsp, -16); // align stack as required by ABI
2680 
2681     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2682     // NOTE that obj_reg == rbx currently
2683     __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
2684     __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2685 
2686     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2687     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2688     __ mov(rsp, r12); // restore sp
2689     __ reinit_heapbase();
2690 #ifdef ASSERT
2691     {
2692       Label L;
2693       __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2694       __ jcc(Assembler::equal, L);
2695       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2696       __ bind(L);
2697     }
2698 #endif /* ASSERT */
2699 
2700     __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
2701 
2702     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2703       restore_native_result(masm, ret_type, stack_slots);
2704     }
2705     __ jmp(unlock_done);
2706 
2707     // END Slow path unlock
2708 
2709   } // synchronized
2710 
2711   // SLOW PATH Reguard the stack if needed
2712 
2713   __ bind(reguard);
2714   __ vzeroupper();
2715   save_native_result(masm, ret_type, stack_slots);
2716   __ mov(r12, rsp); // remember sp
2717   __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2718   __ andptr(rsp, -16); // align stack as required by ABI
2719   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2720   __ mov(rsp, r12); // restore sp
2721   __ reinit_heapbase();
2722   restore_native_result(masm, ret_type, stack_slots);
2723   // and continue
2724   __ jmp(reguard_done);
2725 
2726 
2727 
2728   __ flush();
2729 
2730   nmethod *nm = nmethod::new_native_nmethod(method,
2731                                             compile_id,
2732                                             masm->code(),
2733                                             vep_offset,
2734                                             frame_complete,
2735                                             stack_slots / VMRegImpl::slots_per_word,
2736                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2737                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2738                                             oop_maps);
2739 
2740   if (is_critical_native) {
2741     nm->set_lazy_critical_native(true);
2742   }
2743 
2744   return nm;
2745 
2746 }
2747 
2748 // this function returns the adjust size (in number of words) to a c2i adapter
2749 // activation for use during deoptimization
2750 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2751   return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2752 }
2753 
2754 
2755 uint SharedRuntime::out_preserve_stack_slots() {
2756   return 0;
2757 }
2758 
2759 //------------------------------generate_deopt_blob----------------------------
2760 void SharedRuntime::generate_deopt_blob() {
2761   // Allocate space for the code
2762   ResourceMark rm;
2763   // Setup code generation tools
2764   int pad = 0;
2765 #if INCLUDE_JVMCI
2766   if (EnableJVMCI || UseAOT) {
2767     pad += 512; // Increase the buffer size when compiling for JVMCI
2768   }
2769 #endif
2770   CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2771   MacroAssembler* masm = new MacroAssembler(&buffer);
2772   int frame_size_in_words;
2773   OopMap* map = NULL;
2774   OopMapSet *oop_maps = new OopMapSet();
2775 
2776   // -------------
2777   // This code enters when returning to a de-optimized nmethod.  A return
2778   // address has been pushed on the the stack, and return values are in
2779   // registers.
2780   // If we are doing a normal deopt then we were called from the patched
2781   // nmethod from the point we returned to the nmethod. So the return
2782   // address on the stack is wrong by NativeCall::instruction_size
2783   // We will adjust the value so it looks like we have the original return
2784   // address on the stack (like when we eagerly deoptimized).
2785   // In the case of an exception pending when deoptimizing, we enter
2786   // with a return address on the stack that points after the call we patched
2787   // into the exception handler. We have the following register state from,
2788   // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2789   //    rax: exception oop
2790   //    rbx: exception handler
2791   //    rdx: throwing pc
2792   // So in this case we simply jam rdx into the useless return address and
2793   // the stack looks just like we want.
2794   //
2795   // At this point we need to de-opt.  We save the argument return
2796   // registers.  We call the first C routine, fetch_unroll_info().  This
2797   // routine captures the return values and returns a structure which
2798   // describes the current frame size and the sizes of all replacement frames.
2799   // The current frame is compiled code and may contain many inlined
2800   // functions, each with their own JVM state.  We pop the current frame, then
2801   // push all the new frames.  Then we call the C routine unpack_frames() to
2802   // populate these frames.  Finally unpack_frames() returns us the new target
2803   // address.  Notice that callee-save registers are BLOWN here; they have
2804   // already been captured in the vframeArray at the time the return PC was
2805   // patched.
2806   address start = __ pc();
2807   Label cont;
2808 
2809   // Prolog for non exception case!
2810 
2811   // Save everything in sight.
2812   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2813 
2814   // Normal deoptimization.  Save exec mode for unpack_frames.
2815   __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
2816   __ jmp(cont);
2817 
2818   int reexecute_offset = __ pc() - start;
2819 #if INCLUDE_JVMCI && !defined(COMPILER1)
2820   if (EnableJVMCI && UseJVMCICompiler) {
2821     // JVMCI does not use this kind of deoptimization
2822     __ should_not_reach_here();
2823   }
2824 #endif
2825 
2826   // Reexecute case
2827   // return address is the pc describes what bci to do re-execute at
2828 
2829   // No need to update map as each call to save_live_registers will produce identical oopmap
2830   (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2831 
2832   __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
2833   __ jmp(cont);
2834 
2835 #if INCLUDE_JVMCI
2836   Label after_fetch_unroll_info_call;
2837   int implicit_exception_uncommon_trap_offset = 0;
2838   int uncommon_trap_offset = 0;
2839 
2840   if (EnableJVMCI || UseAOT) {
2841     implicit_exception_uncommon_trap_offset = __ pc() - start;
2842 
2843     __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2844     __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())), (int32_t)NULL_WORD);
2845 
2846     uncommon_trap_offset = __ pc() - start;
2847 
2848     // Save everything in sight.
2849     RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2850     // fetch_unroll_info needs to call last_java_frame()
2851     __ set_last_Java_frame(noreg, noreg, NULL);
2852 
2853     __ movl(c_rarg1, Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())));
2854     __ movl(Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())), -1);
2855 
2856     __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute);
2857     __ mov(c_rarg0, r15_thread);
2858     __ movl(c_rarg2, r14); // exec mode
2859     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2860     oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2861 
2862     __ reset_last_Java_frame(false);
2863 
2864     __ jmp(after_fetch_unroll_info_call);
2865   } // EnableJVMCI
2866 #endif // INCLUDE_JVMCI
2867 
2868   int exception_offset = __ pc() - start;
2869 
2870   // Prolog for exception case
2871 
2872   // all registers are dead at this entry point, except for rax, and
2873   // rdx which contain the exception oop and exception pc
2874   // respectively.  Set them in TLS and fall thru to the
2875   // unpack_with_exception_in_tls entry point.
2876 
2877   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
2878   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
2879 
2880   int exception_in_tls_offset = __ pc() - start;
2881 
2882   // new implementation because exception oop is now passed in JavaThread
2883 
2884   // Prolog for exception case
2885   // All registers must be preserved because they might be used by LinearScan
2886   // Exceptiop oop and throwing PC are passed in JavaThread
2887   // tos: stack at point of call to method that threw the exception (i.e. only
2888   // args are on the stack, no return address)
2889 
2890   // make room on stack for the return address
2891   // It will be patched later with the throwing pc. The correct value is not
2892   // available now because loading it from memory would destroy registers.
2893   __ push(0);
2894 
2895   // Save everything in sight.
2896   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2897 
2898   // Now it is safe to overwrite any register
2899 
2900   // Deopt during an exception.  Save exec mode for unpack_frames.
2901   __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
2902 
2903   // load throwing pc from JavaThread and patch it as the return address
2904   // of the current frame. Then clear the field in JavaThread
2905 
2906   __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2907   __ movptr(Address(rbp, wordSize), rdx);
2908   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2909 
2910 #ifdef ASSERT
2911   // verify that there is really an exception oop in JavaThread
2912   __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2913   __ verify_oop(rax);
2914 
2915   // verify that there is no pending exception
2916   Label no_pending_exception;
2917   __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
2918   __ testptr(rax, rax);
2919   __ jcc(Assembler::zero, no_pending_exception);
2920   __ stop("must not have pending exception here");
2921   __ bind(no_pending_exception);
2922 #endif
2923 
2924   __ bind(cont);
2925 
2926   // Call C code.  Need thread and this frame, but NOT official VM entry
2927   // crud.  We cannot block on this call, no GC can happen.
2928   //
2929   // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2930 
2931   // fetch_unroll_info needs to call last_java_frame().
2932 
2933   __ set_last_Java_frame(noreg, noreg, NULL);
2934 #ifdef ASSERT
2935   { Label L;
2936     __ cmpptr(Address(r15_thread,
2937                     JavaThread::last_Java_fp_offset()),
2938             (int32_t)0);
2939     __ jcc(Assembler::equal, L);
2940     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2941     __ bind(L);
2942   }
2943 #endif // ASSERT
2944   __ mov(c_rarg0, r15_thread);
2945   __ movl(c_rarg1, r14); // exec_mode
2946   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2947 
2948   // Need to have an oopmap that tells fetch_unroll_info where to
2949   // find any register it might need.
2950   oop_maps->add_gc_map(__ pc() - start, map);
2951 
2952   __ reset_last_Java_frame(false);
2953 
2954 #if INCLUDE_JVMCI
2955   if (EnableJVMCI || UseAOT) {
2956     __ bind(after_fetch_unroll_info_call);
2957   }
2958 #endif
2959 
2960   // Load UnrollBlock* into rdi
2961   __ mov(rdi, rax);
2962 
2963   __ movl(r14, Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2964    Label noException;
2965   __ cmpl(r14, Deoptimization::Unpack_exception);   // Was exception pending?
2966   __ jcc(Assembler::notEqual, noException);
2967   __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2968   // QQQ this is useless it was NULL above
2969   __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2970   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
2971   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2972 
2973   __ verify_oop(rax);
2974 
2975   // Overwrite the result registers with the exception results.
2976   __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2977   // I think this is useless
2978   __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
2979 
2980   __ bind(noException);
2981 
2982   // Only register save data is on the stack.
2983   // Now restore the result registers.  Everything else is either dead
2984   // or captured in the vframeArray.
2985   RegisterSaver::restore_result_registers(masm);
2986 
2987   // All of the register save area has been popped of the stack. Only the
2988   // return address remains.
2989 
2990   // Pop all the frames we must move/replace.
2991   //
2992   // Frame picture (youngest to oldest)
2993   // 1: self-frame (no frame link)
2994   // 2: deopting frame  (no frame link)
2995   // 3: caller of deopting frame (could be compiled/interpreted).
2996   //
2997   // Note: by leaving the return address of self-frame on the stack
2998   // and using the size of frame 2 to adjust the stack
2999   // when we are done the return to frame 3 will still be on the stack.
3000 
3001   // Pop deoptimized frame
3002   __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3003   __ addptr(rsp, rcx);
3004 
3005   // rsp should be pointing at the return address to the caller (3)
3006 
3007   // Pick up the initial fp we should save
3008   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3009   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3010 
3011 #ifdef ASSERT
3012   // Compilers generate code that bang the stack by as much as the
3013   // interpreter would need. So this stack banging should never
3014   // trigger a fault. Verify that it does not on non product builds.
3015   if (UseStackBanging) {
3016     __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3017     __ bang_stack_size(rbx, rcx);
3018   }
3019 #endif
3020 
3021   // Load address of array of frame pcs into rcx
3022   __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3023 
3024   // Trash the old pc
3025   __ addptr(rsp, wordSize);
3026 
3027   // Load address of array of frame sizes into rsi
3028   __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3029 
3030   // Load counter into rdx
3031   __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3032 
3033   // Now adjust the caller's stack to make up for the extra locals
3034   // but record the original sp so that we can save it in the skeletal interpreter
3035   // frame and the stack walking of interpreter_sender will get the unextended sp
3036   // value and not the "real" sp value.
3037 
3038   const Register sender_sp = r8;
3039 
3040   __ mov(sender_sp, rsp);
3041   __ movl(rbx, Address(rdi,
3042                        Deoptimization::UnrollBlock::
3043                        caller_adjustment_offset_in_bytes()));
3044   __ subptr(rsp, rbx);
3045 
3046   // Push interpreter frames in a loop
3047   Label loop;
3048   __ bind(loop);
3049   __ movptr(rbx, Address(rsi, 0));      // Load frame size
3050   __ subptr(rbx, 2*wordSize);           // We'll push pc and ebp by hand
3051   __ pushptr(Address(rcx, 0));          // Save return address
3052   __ enter();                           // Save old & set new ebp
3053   __ subptr(rsp, rbx);                  // Prolog
3054   // This value is corrected by layout_activation_impl
3055   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3056   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
3057   __ mov(sender_sp, rsp);               // Pass sender_sp to next frame
3058   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
3059   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
3060   __ decrementl(rdx);                   // Decrement counter
3061   __ jcc(Assembler::notZero, loop);
3062   __ pushptr(Address(rcx, 0));          // Save final return address
3063 
3064   // Re-push self-frame
3065   __ enter();                           // Save old & set new ebp
3066 
3067   // Allocate a full sized register save area.
3068   // Return address and rbp are in place, so we allocate two less words.
3069   __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
3070 
3071   // Restore frame locals after moving the frame
3072   __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
3073   __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3074 
3075   // Call C code.  Need thread but NOT official VM entry
3076   // crud.  We cannot block on this call, no GC can happen.  Call should
3077   // restore return values to their stack-slots with the new SP.
3078   //
3079   // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
3080 
3081   // Use rbp because the frames look interpreted now
3082   // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3083   // Don't need the precise return PC here, just precise enough to point into this code blob.
3084   address the_pc = __ pc();
3085   __ set_last_Java_frame(noreg, rbp, the_pc);
3086 
3087   __ andptr(rsp, -(StackAlignmentInBytes));  // Fix stack alignment as required by ABI
3088   __ mov(c_rarg0, r15_thread);
3089   __ movl(c_rarg1, r14); // second arg: exec_mode
3090   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3091   // Revert SP alignment after call since we're going to do some SP relative addressing below
3092   __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
3093 
3094   // Set an oopmap for the call site
3095   // Use the same PC we used for the last java frame
3096   oop_maps->add_gc_map(the_pc - start,
3097                        new OopMap( frame_size_in_words, 0 ));
3098 
3099   // Clear fp AND pc
3100   __ reset_last_Java_frame(true);
3101 
3102   // Collect return values
3103   __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
3104   __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
3105   // I think this is useless (throwing pc?)
3106   __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
3107 
3108   // Pop self-frame.
3109   __ leave();                           // Epilog
3110 
3111   // Jump to interpreter
3112   __ ret(0);
3113 
3114   // Make sure all code is generated
3115   masm->flush();
3116 
3117   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3118   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3119 #if INCLUDE_JVMCI
3120   if (EnableJVMCI || UseAOT) {
3121     _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
3122     _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
3123   }
3124 #endif
3125 }
3126 
3127 #ifdef COMPILER2
3128 //------------------------------generate_uncommon_trap_blob--------------------
3129 void SharedRuntime::generate_uncommon_trap_blob() {
3130   // Allocate space for the code
3131   ResourceMark rm;
3132   // Setup code generation tools
3133   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3134   MacroAssembler* masm = new MacroAssembler(&buffer);
3135 
3136   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3137 
3138   address start = __ pc();
3139 
3140   if (UseRTMLocking) {
3141     // Abort RTM transaction before possible nmethod deoptimization.
3142     __ xabort(0);
3143   }
3144 
3145   // Push self-frame.  We get here with a return address on the
3146   // stack, so rsp is 8-byte aligned until we allocate our frame.
3147   __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
3148 
3149   // No callee saved registers. rbp is assumed implicitly saved
3150   __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3151 
3152   // compiler left unloaded_class_index in j_rarg0 move to where the
3153   // runtime expects it.
3154   __ movl(c_rarg1, j_rarg0);
3155 
3156   __ set_last_Java_frame(noreg, noreg, NULL);
3157 
3158   // Call C code.  Need thread but NOT official VM entry
3159   // crud.  We cannot block on this call, no GC can happen.  Call should
3160   // capture callee-saved registers as well as return values.
3161   // Thread is in rdi already.
3162   //
3163   // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
3164 
3165   __ mov(c_rarg0, r15_thread);
3166   __ movl(c_rarg2, Deoptimization::Unpack_uncommon_trap);
3167   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3168 
3169   // Set an oopmap for the call site
3170   OopMapSet* oop_maps = new OopMapSet();
3171   OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
3172 
3173   // location of rbp is known implicitly by the frame sender code
3174 
3175   oop_maps->add_gc_map(__ pc() - start, map);
3176 
3177   __ reset_last_Java_frame(false);
3178 
3179   // Load UnrollBlock* into rdi
3180   __ mov(rdi, rax);
3181 
3182 #ifdef ASSERT
3183   { Label L;
3184     __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
3185             (int32_t)Deoptimization::Unpack_uncommon_trap);
3186     __ jcc(Assembler::equal, L);
3187     __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
3188     __ bind(L);
3189   }
3190 #endif
3191 
3192   // Pop all the frames we must move/replace.
3193   //
3194   // Frame picture (youngest to oldest)
3195   // 1: self-frame (no frame link)
3196   // 2: deopting frame  (no frame link)
3197   // 3: caller of deopting frame (could be compiled/interpreted).
3198 
3199   // Pop self-frame.  We have no frame, and must rely only on rax and rsp.
3200   __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
3201 
3202   // Pop deoptimized frame (int)
3203   __ movl(rcx, Address(rdi,
3204                        Deoptimization::UnrollBlock::
3205                        size_of_deoptimized_frame_offset_in_bytes()));
3206   __ addptr(rsp, rcx);
3207 
3208   // rsp should be pointing at the return address to the caller (3)
3209 
3210   // Pick up the initial fp we should save
3211   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3212   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3213 
3214 #ifdef ASSERT
3215   // Compilers generate code that bang the stack by as much as the
3216   // interpreter would need. So this stack banging should never
3217   // trigger a fault. Verify that it does not on non product builds.
3218   if (UseStackBanging) {
3219     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3220     __ bang_stack_size(rbx, rcx);
3221   }
3222 #endif
3223 
3224   // Load address of array of frame pcs into rcx (address*)
3225   __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3226 
3227   // Trash the return pc
3228   __ addptr(rsp, wordSize);
3229 
3230   // Load address of array of frame sizes into rsi (intptr_t*)
3231   __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
3232 
3233   // Counter
3234   __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
3235 
3236   // Now adjust the caller's stack to make up for the extra locals but
3237   // record the original sp so that we can save it in the skeletal
3238   // interpreter frame and the stack walking of interpreter_sender
3239   // will get the unextended sp value and not the "real" sp value.
3240 
3241   const Register sender_sp = r8;
3242 
3243   __ mov(sender_sp, rsp);
3244   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
3245   __ subptr(rsp, rbx);
3246 
3247   // Push interpreter frames in a loop
3248   Label loop;
3249   __ bind(loop);
3250   __ movptr(rbx, Address(rsi, 0)); // Load frame size
3251   __ subptr(rbx, 2 * wordSize);    // We'll push pc and rbp by hand
3252   __ pushptr(Address(rcx, 0));     // Save return address
3253   __ enter();                      // Save old & set new rbp
3254   __ subptr(rsp, rbx);             // Prolog
3255   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
3256             sender_sp);            // Make it walkable
3257   // This value is corrected by layout_activation_impl
3258   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3259   __ mov(sender_sp, rsp);          // Pass sender_sp to next frame
3260   __ addptr(rsi, wordSize);        // Bump array pointer (sizes)
3261   __ addptr(rcx, wordSize);        // Bump array pointer (pcs)
3262   __ decrementl(rdx);              // Decrement counter
3263   __ jcc(Assembler::notZero, loop);
3264   __ pushptr(Address(rcx, 0));     // Save final return address
3265 
3266   // Re-push self-frame
3267   __ enter();                 // Save old & set new rbp
3268   __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
3269                               // Prolog
3270 
3271   // Use rbp because the frames look interpreted now
3272   // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3273   // Don't need the precise return PC here, just precise enough to point into this code blob.
3274   address the_pc = __ pc();
3275   __ set_last_Java_frame(noreg, rbp, the_pc);
3276 
3277   // Call C code.  Need thread but NOT official VM entry
3278   // crud.  We cannot block on this call, no GC can happen.  Call should
3279   // restore return values to their stack-slots with the new SP.
3280   // Thread is in rdi already.
3281   //
3282   // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3283 
3284   __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
3285   __ mov(c_rarg0, r15_thread);
3286   __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3287   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3288 
3289   // Set an oopmap for the call site
3290   // Use the same PC we used for the last java frame
3291   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3292 
3293   // Clear fp AND pc
3294   __ reset_last_Java_frame(true);
3295 
3296   // Pop self-frame.
3297   __ leave();                 // Epilog
3298 
3299   // Jump to interpreter
3300   __ ret(0);
3301 
3302   // Make sure all code is generated
3303   masm->flush();
3304 
3305   _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
3306                                                  SimpleRuntimeFrame::framesize >> 1);
3307 }
3308 #endif // COMPILER2
3309 
3310 
3311 //------------------------------generate_handler_blob------
3312 //
3313 // Generate a special Compile2Runtime blob that saves all registers,
3314 // and setup oopmap.
3315 //
3316 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3317   assert(StubRoutines::forward_exception_entry() != NULL,
3318          "must be generated before");
3319 
3320   ResourceMark rm;
3321   OopMapSet *oop_maps = new OopMapSet();
3322   OopMap* map;
3323 
3324   // Allocate space for the code.  Setup code generation tools.
3325   CodeBuffer buffer("handler_blob", 2048, 1024);
3326   MacroAssembler* masm = new MacroAssembler(&buffer);
3327 
3328   address start   = __ pc();
3329   address call_pc = NULL;
3330   int frame_size_in_words;
3331   bool cause_return = (poll_type == POLL_AT_RETURN);
3332   bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3333 
3334   if (UseRTMLocking) {
3335     // Abort RTM transaction before calling runtime
3336     // because critical section will be large and will be
3337     // aborted anyway. Also nmethod could be deoptimized.
3338     __ xabort(0);
3339   }
3340 
3341   // Make room for return address (or push it again)
3342   if (!cause_return) {
3343     __ push(rbx);
3344   }
3345 
3346   // Save registers, fpu state, and flags
3347   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
3348 
3349   // The following is basically a call_VM.  However, we need the precise
3350   // address of the call in order to generate an oopmap. Hence, we do all the
3351   // work outselves.
3352 
3353   __ set_last_Java_frame(noreg, noreg, NULL);
3354 
3355   // The return address must always be correct so that frame constructor never
3356   // sees an invalid pc.
3357 
3358   if (!cause_return) {
3359     // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
3360     // Additionally, rbx is a callee saved register and we can look at it later to determine
3361     // if someone changed the return address for us!
3362     __ movptr(rbx, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3363     __ movptr(Address(rbp, wordSize), rbx);
3364   }
3365 
3366   // Do the call
3367   __ mov(c_rarg0, r15_thread);
3368   __ call(RuntimeAddress(call_ptr));
3369 
3370   // Set an oopmap for the call site.  This oopmap will map all
3371   // oop-registers and debug-info registers as callee-saved.  This
3372   // will allow deoptimization at this safepoint to find all possible
3373   // debug-info recordings, as well as let GC find all oops.
3374 
3375   oop_maps->add_gc_map( __ pc() - start, map);
3376 
3377   Label noException;
3378 
3379   __ reset_last_Java_frame(false);
3380 
3381   __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3382   __ jcc(Assembler::equal, noException);
3383 
3384   // Exception pending
3385 
3386   RegisterSaver::restore_live_registers(masm, save_vectors);
3387 
3388   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3389 
3390   // No exception case
3391   __ bind(noException);
3392 
3393   Label no_adjust, bail, no_prefix, not_special;
3394   if (SafepointMechanism::uses_thread_local_poll() && !cause_return) {
3395     // If our stashed return pc was modified by the runtime we avoid touching it
3396     __ cmpptr(rbx, Address(rbp, wordSize));
3397     __ jccb(Assembler::notEqual, no_adjust);
3398 
3399     // Skip over the poll instruction.
3400     // See NativeInstruction::is_safepoint_poll()
3401     // Possible encodings:
3402     //      85 00       test   %eax,(%rax)
3403     //      85 01       test   %eax,(%rcx)
3404     //      85 02       test   %eax,(%rdx)
3405     //      85 03       test   %eax,(%rbx)
3406     //      85 06       test   %eax,(%rsi)
3407     //      85 07       test   %eax,(%rdi)
3408     //
3409     //   41 85 00       test   %eax,(%r8)
3410     //   41 85 01       test   %eax,(%r9)
3411     //   41 85 02       test   %eax,(%r10)
3412     //   41 85 03       test   %eax,(%r11)
3413     //   41 85 06       test   %eax,(%r14)
3414     //   41 85 07       test   %eax,(%r15)
3415     //
3416     //      85 04 24    test   %eax,(%rsp)
3417     //   41 85 04 24    test   %eax,(%r12)
3418     //      85 45 00    test   %eax,0x0(%rbp)
3419     //   41 85 45 00    test   %eax,0x0(%r13)
3420 
3421     __ cmpb(Address(rbx, 0), NativeTstRegMem::instruction_rex_b_prefix);
3422     __ jcc(Assembler::notEqual, no_prefix);
3423     __ addptr(rbx, 1);
3424     __ bind(no_prefix);
3425 #ifdef ASSERT
3426     __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
3427 #endif
3428     // r12/r13/rsp/rbp base encoding takes 3 bytes with the following register values:
3429     // r12/rsp 0x04
3430     // r13/rbp 0x05
3431     __ movzbq(rcx, Address(rbx, 1));
3432     __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
3433     __ subptr(rcx, 4);    // looking for 0x00 .. 0x01
3434     __ cmpptr(rcx, 1);
3435     __ jcc(Assembler::above, not_special);
3436     __ addptr(rbx, 1);
3437     __ bind(not_special);
3438 #ifdef ASSERT
3439     // Verify the correct encoding of the poll we're about to skip.
3440     __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
3441     __ jcc(Assembler::notEqual, bail);
3442     // Mask out the modrm bits
3443     __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
3444     // rax encodes to 0, so if the bits are nonzero it's incorrect
3445     __ jcc(Assembler::notZero, bail);
3446 #endif
3447     // Adjust return pc forward to step over the safepoint poll instruction
3448     __ addptr(rbx, 2);
3449     __ movptr(Address(rbp, wordSize), rbx);
3450   }
3451 
3452   __ bind(no_adjust);
3453   // Normal exit, restore registers and exit.
3454   RegisterSaver::restore_live_registers(masm, save_vectors);
3455   __ ret(0);
3456 
3457 #ifdef ASSERT
3458   __ bind(bail);
3459   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
3460 #endif
3461 
3462   // Make sure all code is generated
3463   masm->flush();
3464 
3465   // Fill-out other meta info
3466   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3467 }
3468 
3469 //
3470 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3471 //
3472 // Generate a stub that calls into vm to find out the proper destination
3473 // of a java call. All the argument registers are live at this point
3474 // but since this is generic code we don't know what they are and the caller
3475 // must do any gc of the args.
3476 //
3477 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3478   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3479 
3480   // allocate space for the code
3481   ResourceMark rm;
3482 
3483   CodeBuffer buffer(name, 1000, 512);
3484   MacroAssembler* masm                = new MacroAssembler(&buffer);
3485 
3486   int frame_size_in_words;
3487 
3488   OopMapSet *oop_maps = new OopMapSet();
3489   OopMap* map = NULL;
3490 
3491   int start = __ offset();
3492 
3493   map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3494 
3495   int frame_complete = __ offset();
3496 
3497   __ set_last_Java_frame(noreg, noreg, NULL);
3498 
3499   __ mov(c_rarg0, r15_thread);
3500 
3501   __ call(RuntimeAddress(destination));
3502 
3503 
3504   // Set an oopmap for the call site.
3505   // We need this not only for callee-saved registers, but also for volatile
3506   // registers that the compiler might be keeping live across a safepoint.
3507 
3508   oop_maps->add_gc_map( __ offset() - start, map);
3509 
3510   // rax contains the address we are going to jump to assuming no exception got installed
3511 
3512   // clear last_Java_sp
3513   __ reset_last_Java_frame(false);
3514   // check for pending exceptions
3515   Label pending;
3516   __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3517   __ jcc(Assembler::notEqual, pending);
3518 
3519   // get the returned Method*
3520   __ get_vm_result_2(rbx, r15_thread);
3521   __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3522 
3523   __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3524 
3525   RegisterSaver::restore_live_registers(masm);
3526 
3527   // We are back the the original state on entry and ready to go.
3528 
3529   __ jmp(rax);
3530 
3531   // Pending exception after the safepoint
3532 
3533   __ bind(pending);
3534 
3535   RegisterSaver::restore_live_registers(masm);
3536 
3537   // exception pending => remove activation and forward to exception handler
3538 
3539   __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3540 
3541   __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3542   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3543 
3544   // -------------
3545   // make sure all code is generated
3546   masm->flush();
3547 
3548   // return the  blob
3549   // frame_size_words or bytes??
3550   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3551 }
3552 
3553 
3554 //------------------------------Montgomery multiplication------------------------
3555 //
3556 
3557 #ifndef _WINDOWS
3558 
3559 #define ASM_SUBTRACT
3560 
3561 #ifdef ASM_SUBTRACT
3562 // Subtract 0:b from carry:a.  Return carry.
3563 static unsigned long
3564 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3565   long i = 0, cnt = len;
3566   unsigned long tmp;
3567   asm volatile("clc; "
3568                "0: ; "
3569                "mov (%[b], %[i], 8), %[tmp]; "
3570                "sbb %[tmp], (%[a], %[i], 8); "
3571                "inc %[i]; dec %[cnt]; "
3572                "jne 0b; "
3573                "mov %[carry], %[tmp]; sbb $0, %[tmp]; "
3574                : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp)
3575                : [a]"r"(a), [b]"r"(b), [carry]"r"(carry)
3576                : "memory");
3577   return tmp;
3578 }
3579 #else // ASM_SUBTRACT
3580 typedef int __attribute__((mode(TI))) int128;
3581 
3582 // Subtract 0:b from carry:a.  Return carry.
3583 static unsigned long
3584 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) {
3585   int128 tmp = 0;
3586   int i;
3587   for (i = 0; i < len; i++) {
3588     tmp += a[i];
3589     tmp -= b[i];
3590     a[i] = tmp;
3591     tmp >>= 64;
3592     assert(-1 <= tmp && tmp <= 0, "invariant");
3593   }
3594   return tmp + carry;
3595 }
3596 #endif // ! ASM_SUBTRACT
3597 
3598 // Multiply (unsigned) Long A by Long B, accumulating the double-
3599 // length result into the accumulator formed of T0, T1, and T2.
3600 #define MACC(A, B, T0, T1, T2)                                  \
3601 do {                                                            \
3602   unsigned long hi, lo;                                         \
3603   __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4"   \
3604            : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2)  \
3605            : "r"(A), "a"(B) : "cc");                            \
3606  } while(0)
3607 
3608 // As above, but add twice the double-length result into the
3609 // accumulator.
3610 #define MACC2(A, B, T0, T1, T2)                                 \
3611 do {                                                            \
3612   unsigned long hi, lo;                                         \
3613   __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4; " \
3614            "add %%rax, %2; adc %%rdx, %3; adc $0, %4"           \
3615            : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2)  \
3616            : "r"(A), "a"(B) : "cc");                            \
3617  } while(0)
3618 
3619 // Fast Montgomery multiplication.  The derivation of the algorithm is
3620 // in  A Cryptographic Library for the Motorola DSP56000,
3621 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237.
3622 
3623 static void __attribute__((noinline))
3624 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3625                     unsigned long m[], unsigned long inv, int len) {
3626   unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3627   int i;
3628 
3629   assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3630 
3631   for (i = 0; i < len; i++) {
3632     int j;
3633     for (j = 0; j < i; j++) {
3634       MACC(a[j], b[i-j], t0, t1, t2);
3635       MACC(m[j], n[i-j], t0, t1, t2);
3636     }
3637     MACC(a[i], b[0], t0, t1, t2);
3638     m[i] = t0 * inv;
3639     MACC(m[i], n[0], t0, t1, t2);
3640 
3641     assert(t0 == 0, "broken Montgomery multiply");
3642 
3643     t0 = t1; t1 = t2; t2 = 0;
3644   }
3645 
3646   for (i = len; i < 2*len; i++) {
3647     int j;
3648     for (j = i-len+1; j < len; j++) {
3649       MACC(a[j], b[i-j], t0, t1, t2);
3650       MACC(m[j], n[i-j], t0, t1, t2);
3651     }
3652     m[i-len] = t0;
3653     t0 = t1; t1 = t2; t2 = 0;
3654   }
3655 
3656   while (t0)
3657     t0 = sub(m, n, t0, len);
3658 }
3659 
3660 // Fast Montgomery squaring.  This uses asymptotically 25% fewer
3661 // multiplies so it should be up to 25% faster than Montgomery
3662 // multiplication.  However, its loop control is more complex and it
3663 // may actually run slower on some machines.
3664 
3665 static void __attribute__((noinline))
3666 montgomery_square(unsigned long a[], unsigned long n[],
3667                   unsigned long m[], unsigned long inv, int len) {
3668   unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3669   int i;
3670 
3671   assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3672 
3673   for (i = 0; i < len; i++) {
3674     int j;
3675     int end = (i+1)/2;
3676     for (j = 0; j < end; j++) {
3677       MACC2(a[j], a[i-j], t0, t1, t2);
3678       MACC(m[j], n[i-j], t0, t1, t2);
3679     }
3680     if ((i & 1) == 0) {
3681       MACC(a[j], a[j], t0, t1, t2);
3682     }
3683     for (; j < i; j++) {
3684       MACC(m[j], n[i-j], t0, t1, t2);
3685     }
3686     m[i] = t0 * inv;
3687     MACC(m[i], n[0], t0, t1, t2);
3688 
3689     assert(t0 == 0, "broken Montgomery square");
3690 
3691     t0 = t1; t1 = t2; t2 = 0;
3692   }
3693 
3694   for (i = len; i < 2*len; i++) {
3695     int start = i-len+1;
3696     int end = start + (len - start)/2;
3697     int j;
3698     for (j = start; j < end; j++) {
3699       MACC2(a[j], a[i-j], t0, t1, t2);
3700       MACC(m[j], n[i-j], t0, t1, t2);
3701     }
3702     if ((i & 1) == 0) {
3703       MACC(a[j], a[j], t0, t1, t2);
3704     }
3705     for (; j < len; j++) {
3706       MACC(m[j], n[i-j], t0, t1, t2);
3707     }
3708     m[i-len] = t0;
3709     t0 = t1; t1 = t2; t2 = 0;
3710   }
3711 
3712   while (t0)
3713     t0 = sub(m, n, t0, len);
3714 }
3715 
3716 // Swap words in a longword.
3717 static unsigned long swap(unsigned long x) {
3718   return (x << 32) | (x >> 32);
3719 }
3720 
3721 // Copy len longwords from s to d, word-swapping as we go.  The
3722 // destination array is reversed.
3723 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
3724   d += len;
3725   while(len-- > 0) {
3726     d--;
3727     *d = swap(*s);
3728     s++;
3729   }
3730 }
3731 
3732 // The threshold at which squaring is advantageous was determined
3733 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
3734 #define MONTGOMERY_SQUARING_THRESHOLD 64
3735 
3736 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
3737                                         jint len, jlong inv,
3738                                         jint *m_ints) {
3739   assert(len % 2 == 0, "array length in montgomery_multiply must be even");
3740   int longwords = len/2;
3741 
3742   // Make very sure we don't use so much space that the stack might
3743   // overflow.  512 jints corresponds to an 16384-bit integer and
3744   // will use here a total of 8k bytes of stack space.
3745   int total_allocation = longwords * sizeof (unsigned long) * 4;
3746   guarantee(total_allocation <= 8192, "must be");
3747   unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3748 
3749   // Local scratch arrays
3750   unsigned long
3751     *a = scratch + 0 * longwords,
3752     *b = scratch + 1 * longwords,
3753     *n = scratch + 2 * longwords,
3754     *m = scratch + 3 * longwords;
3755 
3756   reverse_words((unsigned long *)a_ints, a, longwords);
3757   reverse_words((unsigned long *)b_ints, b, longwords);
3758   reverse_words((unsigned long *)n_ints, n, longwords);
3759 
3760   ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
3761 
3762   reverse_words(m, (unsigned long *)m_ints, longwords);
3763 }
3764 
3765 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
3766                                       jint len, jlong inv,
3767                                       jint *m_ints) {
3768   assert(len % 2 == 0, "array length in montgomery_square must be even");
3769   int longwords = len/2;
3770 
3771   // Make very sure we don't use so much space that the stack might
3772   // overflow.  512 jints corresponds to an 16384-bit integer and
3773   // will use here a total of 6k bytes of stack space.
3774   int total_allocation = longwords * sizeof (unsigned long) * 3;
3775   guarantee(total_allocation <= 8192, "must be");
3776   unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3777 
3778   // Local scratch arrays
3779   unsigned long
3780     *a = scratch + 0 * longwords,
3781     *n = scratch + 1 * longwords,
3782     *m = scratch + 2 * longwords;
3783 
3784   reverse_words((unsigned long *)a_ints, a, longwords);
3785   reverse_words((unsigned long *)n_ints, n, longwords);
3786 
3787   if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
3788     ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
3789   } else {
3790     ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
3791   }
3792 
3793   reverse_words(m, (unsigned long *)m_ints, longwords);
3794 }
3795 
3796 #endif // WINDOWS
3797 
3798 #ifdef COMPILER2
3799 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3800 //
3801 //------------------------------generate_exception_blob---------------------------
3802 // creates exception blob at the end
3803 // Using exception blob, this code is jumped from a compiled method.
3804 // (see emit_exception_handler in x86_64.ad file)
3805 //
3806 // Given an exception pc at a call we call into the runtime for the
3807 // handler in this method. This handler might merely restore state
3808 // (i.e. callee save registers) unwind the frame and jump to the
3809 // exception handler for the nmethod if there is no Java level handler
3810 // for the nmethod.
3811 //
3812 // This code is entered with a jmp.
3813 //
3814 // Arguments:
3815 //   rax: exception oop
3816 //   rdx: exception pc
3817 //
3818 // Results:
3819 //   rax: exception oop
3820 //   rdx: exception pc in caller or ???
3821 //   destination: exception handler of caller
3822 //
3823 // Note: the exception pc MUST be at a call (precise debug information)
3824 //       Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
3825 //
3826 
3827 void OptoRuntime::generate_exception_blob() {
3828   assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
3829   assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
3830   assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
3831 
3832   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3833 
3834   // Allocate space for the code
3835   ResourceMark rm;
3836   // Setup code generation tools
3837   CodeBuffer buffer("exception_blob", 2048, 1024);
3838   MacroAssembler* masm = new MacroAssembler(&buffer);
3839 
3840 
3841   address start = __ pc();
3842 
3843   // Exception pc is 'return address' for stack walker
3844   __ push(rdx);
3845   __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
3846 
3847   // Save callee-saved registers.  See x86_64.ad.
3848 
3849   // rbp is an implicitly saved callee saved register (i.e., the calling
3850   // convention will save/restore it in the prolog/epilog). Other than that
3851   // there are no callee save registers now that adapter frames are gone.
3852 
3853   __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3854 
3855   // Store exception in Thread object. We cannot pass any arguments to the
3856   // handle_exception call, since we do not want to make any assumption
3857   // about the size of the frame where the exception happened in.
3858   // c_rarg0 is either rdi (Linux) or rcx (Windows).
3859   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
3860   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3861 
3862   // This call does all the hard work.  It checks if an exception handler
3863   // exists in the method.
3864   // If so, it returns the handler address.
3865   // If not, it prepares for stack-unwinding, restoring the callee-save
3866   // registers of the frame being removed.
3867   //
3868   // address OptoRuntime::handle_exception_C(JavaThread* thread)
3869 
3870   // At a method handle call, the stack may not be properly aligned
3871   // when returning with an exception.
3872   address the_pc = __ pc();
3873   __ set_last_Java_frame(noreg, noreg, the_pc);
3874   __ mov(c_rarg0, r15_thread);
3875   __ andptr(rsp, -(StackAlignmentInBytes));    // Align stack
3876   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3877 
3878   // Set an oopmap for the call site.  This oopmap will only be used if we
3879   // are unwinding the stack.  Hence, all locations will be dead.
3880   // Callee-saved registers will be the same as the frame above (i.e.,
3881   // handle_exception_stub), since they were restored when we got the
3882   // exception.
3883 
3884   OopMapSet* oop_maps = new OopMapSet();
3885 
3886   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3887 
3888   __ reset_last_Java_frame(false);
3889 
3890   // Restore callee-saved registers
3891 
3892   // rbp is an implicitly saved callee-saved register (i.e., the calling
3893   // convention will save restore it in prolog/epilog) Other than that
3894   // there are no callee save registers now that adapter frames are gone.
3895 
3896   __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
3897 
3898   __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
3899   __ pop(rdx);                  // No need for exception pc anymore
3900 
3901   // rax: exception handler
3902 
3903   // We have a handler in rax (could be deopt blob).
3904   __ mov(r8, rax);
3905 
3906   // Get the exception oop
3907   __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3908   // Get the exception pc in case we are deoptimized
3909   __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3910 #ifdef ASSERT
3911   __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
3912   __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
3913 #endif
3914   // Clear the exception oop so GC no longer processes it as a root.
3915   __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
3916 
3917   // rax: exception oop
3918   // r8:  exception handler
3919   // rdx: exception pc
3920   // Jump to handler
3921 
3922   __ jmp(r8);
3923 
3924   // Make sure all code is generated
3925   masm->flush();
3926 
3927   // Set exception blob
3928   _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3929 }
3930 #endif // COMPILER2
--- EOF ---