45 // numregs in chaitin ==> proper degree in chaitin
46
47 //-------------Non-zero bit search methods used by RegMask---------------------
48 // Find lowest 1, or return 32 if empty
49 int find_lowest_bit( uint32_t mask );
50 // Find highest 1, or return 32 if empty
51 int find_hihghest_bit( uint32_t mask );
52
53 //------------------------------RegMask----------------------------------------
54 // The ADL file describes how to print the machine-specific registers, as well
55 // as any notion of register classes. We provide a register mask, which is
56 // just a collection of Register numbers.
57
58 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
59 // RM_SIZE is the size of a register mask in words.
60 // FORALL_BODY replicates a BODY macro once per word in the register mask.
61 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
62 // However, it means the ADLC can redefine the unroll macro and all loops
63 // over register masks will be unrolled by the correct amount.
64
65 class RegMask VALUE_OBJ_CLASS_SPEC {
66 union {
67 double _dummy_force_double_alignment[RM_SIZE>>1];
68 // Array of Register Mask bits. This array is large enough to cover
69 // all the machine registers and all parameters that need to be passed
70 // on the stack (stack registers) up to some interesting limit. Methods
71 // that need more parameters will NOT be compiled. On Intel, the limit
72 // is something like 90+ parameters.
73 int _A[RM_SIZE];
74 };
75
76 enum {
77 _WordBits = BitsPerInt,
78 _LogWordBits = LogBitsPerInt,
79 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef
80 };
81
82 public:
83 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
84
85 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
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45 // numregs in chaitin ==> proper degree in chaitin
46
47 //-------------Non-zero bit search methods used by RegMask---------------------
48 // Find lowest 1, or return 32 if empty
49 int find_lowest_bit( uint32_t mask );
50 // Find highest 1, or return 32 if empty
51 int find_hihghest_bit( uint32_t mask );
52
53 //------------------------------RegMask----------------------------------------
54 // The ADL file describes how to print the machine-specific registers, as well
55 // as any notion of register classes. We provide a register mask, which is
56 // just a collection of Register numbers.
57
58 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
59 // RM_SIZE is the size of a register mask in words.
60 // FORALL_BODY replicates a BODY macro once per word in the register mask.
61 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
62 // However, it means the ADLC can redefine the unroll macro and all loops
63 // over register masks will be unrolled by the correct amount.
64
65 class RegMask {
66 union {
67 double _dummy_force_double_alignment[RM_SIZE>>1];
68 // Array of Register Mask bits. This array is large enough to cover
69 // all the machine registers and all parameters that need to be passed
70 // on the stack (stack registers) up to some interesting limit. Methods
71 // that need more parameters will NOT be compiled. On Intel, the limit
72 // is something like 90+ parameters.
73 int _A[RM_SIZE];
74 };
75
76 enum {
77 _WordBits = BitsPerInt,
78 _LogWordBits = LogBitsPerInt,
79 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef
80 };
81
82 public:
83 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
84
85 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
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