1 /*
   2  * Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
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  23  */
  24 
  25 #ifndef SHARE_VM_CODE_VMREG_HPP
  26 #define SHARE_VM_CODE_VMREG_HPP
  27 
  28 #include "asm/register.hpp"
  29 #include "utilities/globalDefinitions.hpp"
  30 #include "utilities/macros.hpp"
  31 #include "utilities/ostream.hpp"
  32 #ifdef COMPILER2
  33 #include "opto/adlcVMDeps.hpp"
  34 #endif
  35 
  36 //------------------------------VMReg------------------------------------------
  37 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots.
  38 // Register numbers below VMRegImpl::stack0 are the same for both.  Register
  39 // numbers above stack0 are either warped (in the compiler) or unwarped
  40 // (in the VM).  Unwarped numbers represent stack indices, offsets from
  41 // the current stack pointer.  Warped numbers are required during compilation
  42 // when we do not yet know how big the frame will be.
  43 
  44 class VMRegImpl;
  45 typedef VMRegImpl* VMReg;
  46 
  47 class VMRegImpl {
  48 // friend class OopMap;
  49 friend class VMStructs;
  50 friend class OptoReg;
  51 // friend class Location;
  52 private:
  53   enum {
  54     BAD_REG = -1
  55   };
  56 
  57 
  58 
  59   static VMReg stack0;
  60   // Names for registers
  61   static const char *regName[];
  62   static const int register_count;
  63 
  64 
  65 public:
  66 
  67   static VMReg  as_VMReg(int val, bool bad_ok = false) { assert(val > BAD_REG || bad_ok, "invalid"); return (VMReg) (intptr_t) val; }
  68 
  69   const char*  name() {
  70     if (is_reg()) {
  71       return regName[value()];
  72     } else if (!is_valid()) {
  73       return "BAD";
  74     } else {
  75       // shouldn't really be called with stack
  76       return "STACKED REG";
  77     }
  78   }
  79   static VMReg Bad() { return (VMReg) (intptr_t) BAD_REG; }
  80   bool is_valid() const { return ((intptr_t) this) != BAD_REG; }
  81   bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; }
  82   bool is_reg()   const { return is_valid() && !is_stack(); }
  83 
  84   // A concrete register is a value that returns true for is_reg() and is
  85   // also a register you could use in the assembler. On machines with
  86   // 64bit registers only one half of the VMReg (and OptoReg) is considered
  87   // concrete.
  88   //  bool is_concrete();
  89 
  90   // VMRegs are 4 bytes wide on all platforms
  91   static const int stack_slot_size;
  92   static const int slots_per_word;
  93 
  94 
  95   // This really ought to check that the register is "real" in the sense that
  96   // we don't try and get the VMReg number of a physical register that doesn't
  97   // have an expressible part. That would be pd specific code
  98   VMReg next() {
  99     assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be");
 100     return (VMReg)(intptr_t)(value() + 1);
 101   }
 102   VMReg next(int i) {
 103     assert((is_reg() && value() < stack0->value() - i) || is_stack(), "must be");
 104     return (VMReg)(intptr_t)(value() + i);
 105   }
 106   VMReg prev() {
 107     assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be");
 108     return (VMReg)(intptr_t)(value() - 1);
 109   }
 110 
 111 
 112   intptr_t value() const         {return (intptr_t) this; }
 113 
 114   void print_on(outputStream* st) const;
 115   void print() const { print_on(tty); }
 116 
 117   // bias a stack slot.
 118   // Typically used to adjust a virtual frame slots by amounts that are offset by
 119   // amounts that are part of the native abi. The VMReg must be a stack slot
 120   // and the result must be also.
 121 
 122   VMReg bias(int offset) {
 123     assert(is_stack(), "must be");
 124     // VMReg res = VMRegImpl::as_VMReg(value() + offset);
 125     VMReg res = stack2reg(reg2stack() + offset);
 126     assert(res->is_stack(), "must be");
 127     return res;
 128   }
 129 
 130   // Convert register numbers to stack slots and vice versa
 131   static VMReg stack2reg( int idx ) {
 132     return (VMReg) (intptr_t) (stack0->value() + idx);
 133   }
 134 
 135   uintptr_t reg2stack() {
 136     assert( is_stack(), "Not a stack-based register" );
 137     return value() - stack0->value();
 138   }
 139 
 140   static void set_regName();
 141 
 142 #include CPU_HEADER(vmreg)
 143 
 144 };
 145 
 146 //---------------------------VMRegPair-------------------------------------------
 147 // Pairs of 32-bit registers for arguments.
 148 // SharedRuntime::java_calling_convention will overwrite the structs with
 149 // the calling convention's registers.  VMRegImpl::Bad is returned for any
 150 // unused 32-bit register.  This happens for the unused high half of Int
 151 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build
 152 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high
 153 // 32-bits of O0/O1 are set to VMRegImpl::Bad).  Longs in one register & doubles
 154 // always return a high and a low register, as do 64-bit pointers.
 155 //
 156 class VMRegPair {
 157 private:
 158   VMReg _second;
 159   VMReg _first;
 160 public:
 161   void set_bad (                   ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); }
 162   void set1    (         VMReg v  ) { _second=VMRegImpl::Bad(); _first=v; }
 163   void set2    (         VMReg v  ) { _second=v->next();  _first=v; }
 164   void set_pair( VMReg second, VMReg first    ) { _second= second;    _first= first; }
 165   void set_ptr ( VMReg ptr ) {
 166 #ifdef _LP64
 167     _second = ptr->next();
 168 #else
 169     _second = VMRegImpl::Bad();
 170 #endif
 171     _first = ptr;
 172   }
 173   // Return true if single register, even if the pair is really just adjacent stack slots
 174   bool is_single_reg() const {
 175     return (_first->is_valid()) && (_first->value() + 1 == _second->value());
 176   }
 177 
 178   // Return true if single stack based "register" where the slot alignment matches input alignment
 179   bool is_adjacent_on_stack(int alignment) const {
 180     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
 181   }
 182 
 183   // Return true if single stack based "register" where the slot alignment matches input alignment
 184   bool is_adjacent_aligned_on_stack(int alignment) const {
 185     return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0));
 186   }
 187 
 188   // Return true if single register but adjacent stack slots do not count
 189   bool is_single_phys_reg() const {
 190     return (_first->is_reg() && (_first->value() + 1 == _second->value()));
 191   }
 192 
 193   VMReg second() const { return _second; }
 194   VMReg first()  const { return _first; }
 195   VMRegPair(VMReg s, VMReg f) {  _second = s; _first = f; }
 196   VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; }
 197   VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); }
 198 };
 199 
 200 #endif // SHARE_VM_CODE_VMREG_HPP