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src/hotspot/os_cpu/linux_arm/orderAccess_linux_arm.hpp

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*** 20,39 **** * or visit www.oracle.com if you need additional information or have any * questions. * */ ! #ifndef OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_INLINE_HPP ! #define OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_INLINE_HPP #include "runtime/orderAccess.hpp" #include "runtime/os.hpp" #include "vm_version_arm.hpp" // Implementation of class OrderAccess. // - we define the high level barriers below and use the general ! // implementation in orderAccess.inline.hpp, with customizations // on AARCH64 via the specialized_* template functions // Memory Ordering on ARM is weak. // // Implement all 4 memory ordering barriers by DMB, since it is a --- 20,39 ---- * or visit www.oracle.com if you need additional information or have any * questions. * */ ! #ifndef OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_HPP ! #define OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_HPP #include "runtime/orderAccess.hpp" #include "runtime/os.hpp" #include "vm_version_arm.hpp" // Implementation of class OrderAccess. // - we define the high level barriers below and use the general ! // implementation in orderAccess.hpp, with customizations // on AARCH64 via the specialized_* template functions // Memory Ordering on ARM is weak. // // Implement all 4 memory ordering barriers by DMB, since it is a
*** 242,247 **** } }; #endif // AARCH64 ! #endif // OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_INLINE_HPP --- 242,247 ---- } }; #endif // AARCH64 ! #endif // OS_CPU_LINUX_ARM_VM_ORDERACCESS_LINUX_ARM_HPP
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