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src/share/vm/opto/output.cpp

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rev 8979 : [mq]: vmerr_static


2594 // wrong DEF.  This doesn't verify live-ranges that span blocks.
2595 
2596 // Check for edge existence.  Used to avoid adding redundant precedence edges.
2597 static bool edge_from_to( Node *from, Node *to ) {
2598   for( uint i=0; i<from->len(); i++ )
2599     if( from->in(i) == to )
2600       return true;
2601   return false;
2602 }
2603 
2604 #ifdef ASSERT
2605 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2606   // Check for bad kills
2607   if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2608     Node *prior_use = _reg_node[def];
2609     if( prior_use && !edge_from_to(prior_use,n) ) {
2610       tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2611       n->dump();
2612       tty->print_cr("...");
2613       prior_use->dump();
2614       assert(edge_from_to(prior_use,n),msg);
2615     }
2616     _reg_node.map(def,NULL); // Kill live USEs
2617   }
2618 }
2619 
2620 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2621 
2622   // Zap to something reasonable for the verify code
2623   _reg_node.clear();
2624 
2625   // Walk over the block backwards.  Check to make sure each DEF doesn't
2626   // kill a live value (other than the one it's supposed to).  Add each
2627   // USE to the live set.
2628   for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) {
2629     Node *n = b->get_node(i);
2630     int n_op = n->Opcode();
2631     if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2632       // Fat-proj kills a slew of registers
2633       RegMask rm = n->out_RegMask();// Make local copy
2634       while( rm.is_NotEmpty() ) {
2635         OptoReg::Name kill = rm.find_first_elem();
2636         rm.Remove(kill);
2637         verify_do_def( n, kill, msg );
2638       }
2639     } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2640       // Get DEF'd registers the normal way
2641       verify_do_def( n, _regalloc->get_reg_first(n), msg );
2642       verify_do_def( n, _regalloc->get_reg_second(n), msg );
2643     }
2644 
2645     // Now make all USEs live
2646     for( uint i=1; i<n->req(); i++ ) {
2647       Node *def = n->in(i);
2648       assert(def != 0, "input edge required");
2649       OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2650       OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2651       if( OptoReg::is_valid(reg_lo) ) {
2652         assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg);
2653         _reg_node.map(reg_lo,n);
2654       }
2655       if( OptoReg::is_valid(reg_hi) ) {
2656         assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg);
2657         _reg_node.map(reg_hi,n);
2658       }
2659     }
2660 
2661   }
2662 
2663   // Zap to something reasonable for the Antidependence code
2664   _reg_node.clear();
2665 }
2666 #endif
2667 
2668 // Conditionally add precedence edges.  Avoid putting edges on Projs.
2669 static void add_prec_edge_from_to( Node *from, Node *to ) {
2670   if( from->is_Proj() ) {       // Put precedence edge on Proj's input
2671     assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2672     from = from->in(0);
2673   }
2674   if( from != to &&             // No cycles (for things like LD L0,[L0+4] )
2675       !edge_from_to( from, to ) ) // Avoid duplicate edge
2676     from->add_prec(to);




2594 // wrong DEF.  This doesn't verify live-ranges that span blocks.
2595 
2596 // Check for edge existence.  Used to avoid adding redundant precedence edges.
2597 static bool edge_from_to( Node *from, Node *to ) {
2598   for( uint i=0; i<from->len(); i++ )
2599     if( from->in(i) == to )
2600       return true;
2601   return false;
2602 }
2603 
2604 #ifdef ASSERT
2605 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2606   // Check for bad kills
2607   if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2608     Node *prior_use = _reg_node[def];
2609     if( prior_use && !edge_from_to(prior_use,n) ) {
2610       tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2611       n->dump();
2612       tty->print_cr("...");
2613       prior_use->dump();
2614       assert(edge_from_to(prior_use,n), "%s", msg);
2615     }
2616     _reg_node.map(def,NULL); // Kill live USEs
2617   }
2618 }
2619 
2620 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2621 
2622   // Zap to something reasonable for the verify code
2623   _reg_node.clear();
2624 
2625   // Walk over the block backwards.  Check to make sure each DEF doesn't
2626   // kill a live value (other than the one it's supposed to).  Add each
2627   // USE to the live set.
2628   for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) {
2629     Node *n = b->get_node(i);
2630     int n_op = n->Opcode();
2631     if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2632       // Fat-proj kills a slew of registers
2633       RegMask rm = n->out_RegMask();// Make local copy
2634       while( rm.is_NotEmpty() ) {
2635         OptoReg::Name kill = rm.find_first_elem();
2636         rm.Remove(kill);
2637         verify_do_def( n, kill, msg );
2638       }
2639     } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2640       // Get DEF'd registers the normal way
2641       verify_do_def( n, _regalloc->get_reg_first(n), msg );
2642       verify_do_def( n, _regalloc->get_reg_second(n), msg );
2643     }
2644 
2645     // Now make all USEs live
2646     for( uint i=1; i<n->req(); i++ ) {
2647       Node *def = n->in(i);
2648       assert(def != 0, "input edge required");
2649       OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2650       OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2651       if( OptoReg::is_valid(reg_lo) ) {
2652         assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), "%s", msg);
2653         _reg_node.map(reg_lo,n);
2654       }
2655       if( OptoReg::is_valid(reg_hi) ) {
2656         assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), "%s", msg);
2657         _reg_node.map(reg_hi,n);
2658       }
2659     }
2660 
2661   }
2662 
2663   // Zap to something reasonable for the Antidependence code
2664   _reg_node.clear();
2665 }
2666 #endif
2667 
2668 // Conditionally add precedence edges.  Avoid putting edges on Projs.
2669 static void add_prec_edge_from_to( Node *from, Node *to ) {
2670   if( from->is_Proj() ) {       // Put precedence edge on Proj's input
2671     assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2672     from = from->in(0);
2673   }
2674   if( from != to &&             // No cycles (for things like LD L0,[L0+4] )
2675       !edge_from_to( from, to ) ) // Avoid duplicate edge
2676     from->add_prec(to);


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