1 /*
2 * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
3 * Copyright 2012, 2015 SAP AG. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "frame_ppc.hpp"
32 #include "interpreter/interpreter.hpp"
33 #include "interpreter/interp_masm.hpp"
34 #include "oops/compiledICHolder.hpp"
35 #include "prims/jvmtiRedefineClassesTrace.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/vframeArray.hpp"
38 #include "vmreg_ppc.inline.hpp"
39 #ifdef COMPILER1
40 #include "c1/c1_Runtime1.hpp"
41 #endif
42 #ifdef COMPILER2
43 #include "adfiles/ad_ppc_64.hpp"
44 #include "opto/runtime.hpp"
45 #endif
46
47 #define __ masm->
48
49 #ifdef PRODUCT
50 #define BLOCK_COMMENT(str) // nothing
51 #else
52 #define BLOCK_COMMENT(str) __ block_comment(str)
53 #endif
54
55 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
56
57
58 class RegisterSaver {
59 // Used for saving volatile registers.
60 public:
61
62 // Support different return pc locations.
63 enum ReturnPCLocation {
64 return_pc_is_lr,
65 return_pc_is_r4,
66 return_pc_is_thread_saved_exception_pc
67 };
68
69 static OopMap* push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
70 int* out_frame_size_in_bytes,
71 bool generate_oop_map,
72 int return_pc_adjustment,
73 ReturnPCLocation return_pc_location);
74 static void restore_live_registers_and_pop_frame(MacroAssembler* masm,
75 int frame_size_in_bytes,
76 bool restore_ctr);
77
78 static void push_frame_and_save_argument_registers(MacroAssembler* masm,
79 Register r_temp,
80 int frame_size,
81 int total_args,
82 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
83 static void restore_argument_registers_and_pop_frame(MacroAssembler*masm,
84 int frame_size,
85 int total_args,
86 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
87
88 // During deoptimization only the result registers need to be restored
89 // all the other values have already been extracted.
90 static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes);
91
92 // Constants and data structures:
93
94 typedef enum {
95 int_reg = 0,
96 float_reg = 1,
97 special_reg = 2
98 } RegisterType;
99
100 typedef enum {
101 reg_size = 8,
102 half_reg_size = reg_size / 2,
103 } RegisterConstants;
104
105 typedef struct {
106 RegisterType reg_type;
107 int reg_num;
108 VMReg vmreg;
109 } LiveRegType;
110 };
111
112
113 #define RegisterSaver_LiveSpecialReg(regname) \
114 { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }
115
116 #define RegisterSaver_LiveIntReg(regname) \
117 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() }
118
119 #define RegisterSaver_LiveFloatReg(regname) \
120 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() }
121
122 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
123 // Live registers which get spilled to the stack. Register
124 // positions in this array correspond directly to the stack layout.
125
126 //
127 // live special registers:
128 //
129 RegisterSaver_LiveSpecialReg(SR_CTR),
130 //
131 // live float registers:
132 //
133 RegisterSaver_LiveFloatReg( F0 ),
134 RegisterSaver_LiveFloatReg( F1 ),
135 RegisterSaver_LiveFloatReg( F2 ),
136 RegisterSaver_LiveFloatReg( F3 ),
137 RegisterSaver_LiveFloatReg( F4 ),
138 RegisterSaver_LiveFloatReg( F5 ),
139 RegisterSaver_LiveFloatReg( F6 ),
140 RegisterSaver_LiveFloatReg( F7 ),
141 RegisterSaver_LiveFloatReg( F8 ),
142 RegisterSaver_LiveFloatReg( F9 ),
143 RegisterSaver_LiveFloatReg( F10 ),
144 RegisterSaver_LiveFloatReg( F11 ),
145 RegisterSaver_LiveFloatReg( F12 ),
146 RegisterSaver_LiveFloatReg( F13 ),
147 RegisterSaver_LiveFloatReg( F14 ),
148 RegisterSaver_LiveFloatReg( F15 ),
149 RegisterSaver_LiveFloatReg( F16 ),
150 RegisterSaver_LiveFloatReg( F17 ),
151 RegisterSaver_LiveFloatReg( F18 ),
152 RegisterSaver_LiveFloatReg( F19 ),
153 RegisterSaver_LiveFloatReg( F20 ),
154 RegisterSaver_LiveFloatReg( F21 ),
155 RegisterSaver_LiveFloatReg( F22 ),
156 RegisterSaver_LiveFloatReg( F23 ),
157 RegisterSaver_LiveFloatReg( F24 ),
158 RegisterSaver_LiveFloatReg( F25 ),
159 RegisterSaver_LiveFloatReg( F26 ),
160 RegisterSaver_LiveFloatReg( F27 ),
161 RegisterSaver_LiveFloatReg( F28 ),
162 RegisterSaver_LiveFloatReg( F29 ),
163 RegisterSaver_LiveFloatReg( F30 ),
164 RegisterSaver_LiveFloatReg( F31 ),
165 //
166 // live integer registers:
167 //
168 RegisterSaver_LiveIntReg( R0 ),
169 //RegisterSaver_LiveIntReg( R1 ), // stack pointer
170 RegisterSaver_LiveIntReg( R2 ),
171 RegisterSaver_LiveIntReg( R3 ),
172 RegisterSaver_LiveIntReg( R4 ),
173 RegisterSaver_LiveIntReg( R5 ),
174 RegisterSaver_LiveIntReg( R6 ),
175 RegisterSaver_LiveIntReg( R7 ),
176 RegisterSaver_LiveIntReg( R8 ),
177 RegisterSaver_LiveIntReg( R9 ),
178 RegisterSaver_LiveIntReg( R10 ),
179 RegisterSaver_LiveIntReg( R11 ),
180 RegisterSaver_LiveIntReg( R12 ),
181 //RegisterSaver_LiveIntReg( R13 ), // system thread id
182 RegisterSaver_LiveIntReg( R14 ),
183 RegisterSaver_LiveIntReg( R15 ),
184 RegisterSaver_LiveIntReg( R16 ),
185 RegisterSaver_LiveIntReg( R17 ),
186 RegisterSaver_LiveIntReg( R18 ),
187 RegisterSaver_LiveIntReg( R19 ),
188 RegisterSaver_LiveIntReg( R20 ),
189 RegisterSaver_LiveIntReg( R21 ),
190 RegisterSaver_LiveIntReg( R22 ),
191 RegisterSaver_LiveIntReg( R23 ),
192 RegisterSaver_LiveIntReg( R24 ),
193 RegisterSaver_LiveIntReg( R25 ),
194 RegisterSaver_LiveIntReg( R26 ),
195 RegisterSaver_LiveIntReg( R27 ),
196 RegisterSaver_LiveIntReg( R28 ),
197 RegisterSaver_LiveIntReg( R29 ),
198 RegisterSaver_LiveIntReg( R30 ),
199 RegisterSaver_LiveIntReg( R31 ), // must be the last register (see save/restore functions below)
200 };
201
202 OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
203 int* out_frame_size_in_bytes,
204 bool generate_oop_map,
205 int return_pc_adjustment,
206 ReturnPCLocation return_pc_location) {
207 // Push an abi_reg_args-frame and store all registers which may be live.
208 // If requested, create an OopMap: Record volatile registers as
209 // callee-save values in an OopMap so their save locations will be
210 // propagated to the RegisterMap of the caller frame during
211 // StackFrameStream construction (needed for deoptimization; see
212 // compiledVFrame::create_stack_value).
213 // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.
214
215 int i;
216 int offset;
217
218 // calcualte frame size
219 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
220 sizeof(RegisterSaver::LiveRegType);
221 const int register_save_size = regstosave_num * reg_size;
222 const int frame_size_in_bytes = round_to(register_save_size, frame::alignment_in_bytes)
223 + frame::abi_reg_args_size;
224 *out_frame_size_in_bytes = frame_size_in_bytes;
225 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
226 const int register_save_offset = frame_size_in_bytes - register_save_size;
227
228 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
229 OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL;
230
231 BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");
232
233 // Save r31 in the last slot of the not yet pushed frame so that we
234 // can use it as scratch reg.
235 __ std(R31, -reg_size, R1_SP);
236 assert(-reg_size == register_save_offset - frame_size_in_bytes + ((regstosave_num-1)*reg_size),
237 "consistency check");
238
239 // save the flags
240 // Do the save_LR_CR by hand and adjust the return pc if requested.
241 __ mfcr(R31);
242 __ std(R31, _abi(cr), R1_SP);
243 switch (return_pc_location) {
244 case return_pc_is_lr: __ mflr(R31); break;
245 case return_pc_is_r4: __ mr(R31, R4); break;
246 case return_pc_is_thread_saved_exception_pc:
247 __ ld(R31, thread_(saved_exception_pc)); break;
248 default: ShouldNotReachHere();
249 }
250 if (return_pc_adjustment != 0) {
251 __ addi(R31, R31, return_pc_adjustment);
252 }
253 __ std(R31, _abi(lr), R1_SP);
254
255 // push a new frame
256 __ push_frame(frame_size_in_bytes, R31);
257
258 // save all registers (ints and floats)
259 offset = register_save_offset;
260 for (int i = 0; i < regstosave_num; i++) {
261 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
262 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
263
264 switch (reg_type) {
265 case RegisterSaver::int_reg: {
266 if (reg_num != 31) { // We spilled R31 right at the beginning.
267 __ std(as_Register(reg_num), offset, R1_SP);
268 }
269 break;
270 }
271 case RegisterSaver::float_reg: {
272 __ stfd(as_FloatRegister(reg_num), offset, R1_SP);
273 break;
274 }
275 case RegisterSaver::special_reg: {
276 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
277 __ mfctr(R31);
278 __ std(R31, offset, R1_SP);
279 } else {
280 Unimplemented();
281 }
282 break;
283 }
284 default:
285 ShouldNotReachHere();
286 }
287
288 if (generate_oop_map) {
289 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
290 RegisterSaver_LiveRegs[i].vmreg);
291 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),
292 RegisterSaver_LiveRegs[i].vmreg->next());
293 }
294 offset += reg_size;
295 }
296
297 BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");
298
299 // And we're done.
300 return map;
301 }
302
303
304 // Pop the current frame and restore all the registers that we
305 // saved.
306 void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
307 int frame_size_in_bytes,
308 bool restore_ctr) {
309 int i;
310 int offset;
311 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
312 sizeof(RegisterSaver::LiveRegType);
313 const int register_save_size = regstosave_num * reg_size;
314 const int register_save_offset = frame_size_in_bytes - register_save_size;
315
316 BLOCK_COMMENT("restore_live_registers_and_pop_frame {");
317
318 // restore all registers (ints and floats)
319 offset = register_save_offset;
320 for (int i = 0; i < regstosave_num; i++) {
321 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
322 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
323
324 switch (reg_type) {
325 case RegisterSaver::int_reg: {
326 if (reg_num != 31) // R31 restored at the end, it's the tmp reg!
327 __ ld(as_Register(reg_num), offset, R1_SP);
328 break;
329 }
330 case RegisterSaver::float_reg: {
331 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
332 break;
333 }
334 case RegisterSaver::special_reg: {
335 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
336 if (restore_ctr) { // Nothing to do here if ctr already contains the next address.
337 __ ld(R31, offset, R1_SP);
338 __ mtctr(R31);
339 }
340 } else {
341 Unimplemented();
342 }
343 break;
344 }
345 default:
346 ShouldNotReachHere();
347 }
348 offset += reg_size;
349 }
350
351 // pop the frame
352 __ pop_frame();
353
354 // restore the flags
355 __ restore_LR_CR(R31);
356
357 // restore scratch register's value
358 __ ld(R31, -reg_size, R1_SP);
359
360 BLOCK_COMMENT("} restore_live_registers_and_pop_frame");
361 }
362
363 void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp,
364 int frame_size,int total_args, const VMRegPair *regs,
365 const VMRegPair *regs2) {
366 __ push_frame(frame_size, r_temp);
367 int st_off = frame_size - wordSize;
368 for (int i = 0; i < total_args; i++) {
369 VMReg r_1 = regs[i].first();
370 VMReg r_2 = regs[i].second();
371 if (!r_1->is_valid()) {
372 assert(!r_2->is_valid(), "");
373 continue;
374 }
375 if (r_1->is_Register()) {
376 Register r = r_1->as_Register();
377 __ std(r, st_off, R1_SP);
378 st_off -= wordSize;
379 } else if (r_1->is_FloatRegister()) {
380 FloatRegister f = r_1->as_FloatRegister();
381 __ stfd(f, st_off, R1_SP);
382 st_off -= wordSize;
383 }
384 }
385 if (regs2 != NULL) {
386 for (int i = 0; i < total_args; i++) {
387 VMReg r_1 = regs2[i].first();
388 VMReg r_2 = regs2[i].second();
389 if (!r_1->is_valid()) {
390 assert(!r_2->is_valid(), "");
391 continue;
392 }
393 if (r_1->is_Register()) {
394 Register r = r_1->as_Register();
395 __ std(r, st_off, R1_SP);
396 st_off -= wordSize;
397 } else if (r_1->is_FloatRegister()) {
398 FloatRegister f = r_1->as_FloatRegister();
399 __ stfd(f, st_off, R1_SP);
400 st_off -= wordSize;
401 }
402 }
403 }
404 }
405
406 void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size,
407 int total_args, const VMRegPair *regs,
408 const VMRegPair *regs2) {
409 int st_off = frame_size - wordSize;
410 for (int i = 0; i < total_args; i++) {
411 VMReg r_1 = regs[i].first();
412 VMReg r_2 = regs[i].second();
413 if (r_1->is_Register()) {
414 Register r = r_1->as_Register();
415 __ ld(r, st_off, R1_SP);
416 st_off -= wordSize;
417 } else if (r_1->is_FloatRegister()) {
418 FloatRegister f = r_1->as_FloatRegister();
419 __ lfd(f, st_off, R1_SP);
420 st_off -= wordSize;
421 }
422 }
423 if (regs2 != NULL)
424 for (int i = 0; i < total_args; i++) {
425 VMReg r_1 = regs2[i].first();
426 VMReg r_2 = regs2[i].second();
427 if (r_1->is_Register()) {
428 Register r = r_1->as_Register();
429 __ ld(r, st_off, R1_SP);
430 st_off -= wordSize;
431 } else if (r_1->is_FloatRegister()) {
432 FloatRegister f = r_1->as_FloatRegister();
433 __ lfd(f, st_off, R1_SP);
434 st_off -= wordSize;
435 }
436 }
437 __ pop_frame();
438 }
439
440 // Restore the registers that might be holding a result.
441 void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {
442 int i;
443 int offset;
444 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
445 sizeof(RegisterSaver::LiveRegType);
446 const int register_save_size = regstosave_num * reg_size;
447 const int register_save_offset = frame_size_in_bytes - register_save_size;
448
449 // restore all result registers (ints and floats)
450 offset = register_save_offset;
451 for (int i = 0; i < regstosave_num; i++) {
452 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
453 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
454 switch (reg_type) {
455 case RegisterSaver::int_reg: {
456 if (as_Register(reg_num)==R3_RET) // int result_reg
457 __ ld(as_Register(reg_num), offset, R1_SP);
458 break;
459 }
460 case RegisterSaver::float_reg: {
461 if (as_FloatRegister(reg_num)==F1_RET) // float result_reg
462 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
463 break;
464 }
465 case RegisterSaver::special_reg: {
466 // Special registers don't hold a result.
467 break;
468 }
469 default:
470 ShouldNotReachHere();
471 }
472 offset += reg_size;
473 }
474 }
475
476 // Is vector's size (in bytes) bigger than a size saved by default?
477 bool SharedRuntime::is_wide_vector(int size) {
478 // Note, MaxVectorSize == 8 on PPC64.
479 assert(size <= 8, "%d bytes vectors are not supported", size);
480 return size > 8;
481 }
482 #ifdef COMPILER2
483 static int reg2slot(VMReg r) {
484 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();
485 }
486
487 static int reg2offset(VMReg r) {
488 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
489 }
490 #endif
491
492 // ---------------------------------------------------------------------------
493 // Read the array of BasicTypes from a signature, and compute where the
494 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
495 // quantities. Values less than VMRegImpl::stack0 are registers, those above
496 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
497 // as framesizes are fixed.
498 // VMRegImpl::stack0 refers to the first slot 0(sp).
499 // and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register
500 // up to RegisterImpl::number_of_registers) are the 64-bit
501 // integer registers.
502
503 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
504 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
505 // units regardless of build. Of course for i486 there is no 64 bit build
506
507 // The Java calling convention is a "shifted" version of the C ABI.
508 // By skipping the first C ABI register we can call non-static jni methods
509 // with small numbers of arguments without having to shuffle the arguments
510 // at all. Since we control the java ABI we ought to at least get some
511 // advantage out of it.
512
513 const VMReg java_iarg_reg[8] = {
514 R3->as_VMReg(),
515 R4->as_VMReg(),
516 R5->as_VMReg(),
517 R6->as_VMReg(),
518 R7->as_VMReg(),
519 R8->as_VMReg(),
520 R9->as_VMReg(),
521 R10->as_VMReg()
522 };
523
524 const VMReg java_farg_reg[13] = {
525 F1->as_VMReg(),
526 F2->as_VMReg(),
527 F3->as_VMReg(),
528 F4->as_VMReg(),
529 F5->as_VMReg(),
530 F6->as_VMReg(),
531 F7->as_VMReg(),
532 F8->as_VMReg(),
533 F9->as_VMReg(),
534 F10->as_VMReg(),
535 F11->as_VMReg(),
536 F12->as_VMReg(),
537 F13->as_VMReg()
538 };
539
540 const int num_java_iarg_registers = sizeof(java_iarg_reg) / sizeof(java_iarg_reg[0]);
541 const int num_java_farg_registers = sizeof(java_farg_reg) / sizeof(java_farg_reg[0]);
542
543 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
544 VMRegPair *regs,
545 int total_args_passed,
546 int is_outgoing) {
547 // C2c calling conventions for compiled-compiled calls.
548 // Put 8 ints/longs into registers _AND_ 13 float/doubles into
549 // registers _AND_ put the rest on the stack.
550
551 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats
552 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
553
554 int i;
555 VMReg reg;
556 int stk = 0;
557 int ireg = 0;
558 int freg = 0;
559
560 // We put the first 8 arguments into registers and the rest on the
561 // stack, float arguments are already in their argument registers
562 // due to c2c calling conventions (see calling_convention).
563 for (int i = 0; i < total_args_passed; ++i) {
564 switch(sig_bt[i]) {
565 case T_BOOLEAN:
566 case T_CHAR:
567 case T_BYTE:
568 case T_SHORT:
569 case T_INT:
570 if (ireg < num_java_iarg_registers) {
571 // Put int/ptr in register
572 reg = java_iarg_reg[ireg];
573 ++ireg;
574 } else {
575 // Put int/ptr on stack.
576 reg = VMRegImpl::stack2reg(stk);
577 stk += inc_stk_for_intfloat;
578 }
579 regs[i].set1(reg);
580 break;
581 case T_LONG:
582 assert(sig_bt[i+1] == T_VOID, "expecting half");
583 if (ireg < num_java_iarg_registers) {
584 // Put long in register.
585 reg = java_iarg_reg[ireg];
586 ++ireg;
587 } else {
588 // Put long on stack. They must be aligned to 2 slots.
589 if (stk & 0x1) ++stk;
590 reg = VMRegImpl::stack2reg(stk);
591 stk += inc_stk_for_longdouble;
592 }
593 regs[i].set2(reg);
594 break;
595 case T_OBJECT:
596 case T_ARRAY:
597 case T_ADDRESS:
598 if (ireg < num_java_iarg_registers) {
599 // Put ptr in register.
600 reg = java_iarg_reg[ireg];
601 ++ireg;
602 } else {
603 // Put ptr on stack. Objects must be aligned to 2 slots too,
604 // because "64-bit pointers record oop-ishness on 2 aligned
605 // adjacent registers." (see OopFlow::build_oop_map).
606 if (stk & 0x1) ++stk;
607 reg = VMRegImpl::stack2reg(stk);
608 stk += inc_stk_for_longdouble;
609 }
610 regs[i].set2(reg);
611 break;
612 case T_FLOAT:
613 if (freg < num_java_farg_registers) {
614 // Put float in register.
615 reg = java_farg_reg[freg];
616 ++freg;
617 } else {
618 // Put float on stack.
619 reg = VMRegImpl::stack2reg(stk);
620 stk += inc_stk_for_intfloat;
621 }
622 regs[i].set1(reg);
623 break;
624 case T_DOUBLE:
625 assert(sig_bt[i+1] == T_VOID, "expecting half");
626 if (freg < num_java_farg_registers) {
627 // Put double in register.
628 reg = java_farg_reg[freg];
629 ++freg;
630 } else {
631 // Put double on stack. They must be aligned to 2 slots.
632 if (stk & 0x1) ++stk;
633 reg = VMRegImpl::stack2reg(stk);
634 stk += inc_stk_for_longdouble;
635 }
636 regs[i].set2(reg);
637 break;
638 case T_VOID:
639 // Do not count halves.
640 regs[i].set_bad();
641 break;
642 default:
643 ShouldNotReachHere();
644 }
645 }
646 return round_to(stk, 2);
647 }
648
649 #ifdef COMPILER2
650 // Calling convention for calling C code.
651 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
652 VMRegPair *regs,
653 VMRegPair *regs2,
654 int total_args_passed) {
655 // Calling conventions for C runtime calls and calls to JNI native methods.
656 //
657 // PPC64 convention: Hoist the first 8 int/ptr/long's in the first 8
658 // int regs, leaving int regs undefined if the arg is flt/dbl. Hoist
659 // the first 13 flt/dbl's in the first 13 fp regs but additionally
660 // copy flt/dbl to the stack if they are beyond the 8th argument.
661
662 const VMReg iarg_reg[8] = {
663 R3->as_VMReg(),
664 R4->as_VMReg(),
665 R5->as_VMReg(),
666 R6->as_VMReg(),
667 R7->as_VMReg(),
668 R8->as_VMReg(),
669 R9->as_VMReg(),
670 R10->as_VMReg()
671 };
672
673 const VMReg farg_reg[13] = {
674 F1->as_VMReg(),
675 F2->as_VMReg(),
676 F3->as_VMReg(),
677 F4->as_VMReg(),
678 F5->as_VMReg(),
679 F6->as_VMReg(),
680 F7->as_VMReg(),
681 F8->as_VMReg(),
682 F9->as_VMReg(),
683 F10->as_VMReg(),
684 F11->as_VMReg(),
685 F12->as_VMReg(),
686 F13->as_VMReg()
687 };
688
689 // Check calling conventions consistency.
690 assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
691 sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
692 "consistency");
693
694 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
695 // 2 such slots, like 64 bit values do.
696 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
697 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
698
699 int i;
700 VMReg reg;
701 // Leave room for C-compatible ABI_REG_ARGS.
702 int stk = (frame::abi_reg_args_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
703 int arg = 0;
704 int freg = 0;
705
706 // Avoid passing C arguments in the wrong stack slots.
707 #if defined(ABI_ELFv2)
708 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 96,
709 "passing C arguments in wrong stack slots");
710 #else
711 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112,
712 "passing C arguments in wrong stack slots");
713 #endif
714 // We fill-out regs AND regs2 if an argument must be passed in a
715 // register AND in a stack slot. If regs2 is NULL in such a
716 // situation, we bail-out with a fatal error.
717 for (int i = 0; i < total_args_passed; ++i, ++arg) {
718 // Initialize regs2 to BAD.
719 if (regs2 != NULL) regs2[i].set_bad();
720
721 switch(sig_bt[i]) {
722
723 //
724 // If arguments 0-7 are integers, they are passed in integer registers.
725 // Argument i is placed in iarg_reg[i].
726 //
727 case T_BOOLEAN:
728 case T_CHAR:
729 case T_BYTE:
730 case T_SHORT:
731 case T_INT:
732 // We must cast ints to longs and use full 64 bit stack slots
733 // here. Thus fall through, handle as long.
734 case T_LONG:
735 case T_OBJECT:
736 case T_ARRAY:
737 case T_ADDRESS:
738 case T_METADATA:
739 // Oops are already boxed if required (JNI).
740 if (arg < Argument::n_int_register_parameters_c) {
741 reg = iarg_reg[arg];
742 } else {
743 reg = VMRegImpl::stack2reg(stk);
744 stk += inc_stk_for_longdouble;
745 }
746 regs[i].set2(reg);
747 break;
748
749 //
750 // Floats are treated differently from int regs: The first 13 float arguments
751 // are passed in registers (not the float args among the first 13 args).
752 // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
753 // in farg_reg[j] if argument i is the j-th float argument of this call.
754 //
755 case T_FLOAT:
756 if (freg < Argument::n_float_register_parameters_c) {
757 // Put float in register ...
758 reg = farg_reg[freg];
759 ++freg;
760
761 // Argument i for i > 8 is placed on the stack even if it's
762 // placed in a register (if it's a float arg). Aix disassembly
763 // shows that xlC places these float args on the stack AND in
764 // a register. This is not documented, but we follow this
765 // convention, too.
766 if (arg >= Argument::n_regs_not_on_stack_c) {
767 // ... and on the stack.
768 guarantee(regs2 != NULL, "must pass float in register and stack slot");
769 VMReg reg2 = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
770 regs2[i].set1(reg2);
771 stk += inc_stk_for_intfloat;
772 }
773
774 } else {
775 // Put float on stack.
776 reg = VMRegImpl::stack2reg(stk LINUX_ONLY(+1));
777 stk += inc_stk_for_intfloat;
778 }
779 regs[i].set1(reg);
780 break;
781 case T_DOUBLE:
782 assert(sig_bt[i+1] == T_VOID, "expecting half");
783 if (freg < Argument::n_float_register_parameters_c) {
784 // Put double in register ...
785 reg = farg_reg[freg];
786 ++freg;
787
788 // Argument i for i > 8 is placed on the stack even if it's
789 // placed in a register (if it's a double arg). Aix disassembly
790 // shows that xlC places these float args on the stack AND in
791 // a register. This is not documented, but we follow this
792 // convention, too.
793 if (arg >= Argument::n_regs_not_on_stack_c) {
794 // ... and on the stack.
795 guarantee(regs2 != NULL, "must pass float in register and stack slot");
796 VMReg reg2 = VMRegImpl::stack2reg(stk);
797 regs2[i].set2(reg2);
798 stk += inc_stk_for_longdouble;
799 }
800 } else {
801 // Put double on stack.
802 reg = VMRegImpl::stack2reg(stk);
803 stk += inc_stk_for_longdouble;
804 }
805 regs[i].set2(reg);
806 break;
807
808 case T_VOID:
809 // Do not count halves.
810 regs[i].set_bad();
811 --arg;
812 break;
813 default:
814 ShouldNotReachHere();
815 }
816 }
817
818 return round_to(stk, 2);
819 }
820 #endif // COMPILER2
821
822 static address gen_c2i_adapter(MacroAssembler *masm,
823 int total_args_passed,
824 int comp_args_on_stack,
825 const BasicType *sig_bt,
826 const VMRegPair *regs,
827 Label& call_interpreter,
828 const Register& ientry) {
829
830 address c2i_entrypoint;
831
832 const Register sender_SP = R21_sender_SP; // == R21_tmp1
833 const Register code = R22_tmp2;
834 //const Register ientry = R23_tmp3;
835 const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 };
836 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
837 int value_regs_index = 0;
838
839 const Register return_pc = R27_tmp7;
840 const Register tmp = R28_tmp8;
841
842 assert_different_registers(sender_SP, code, ientry, return_pc, tmp);
843
844 // Adapter needs TOP_IJAVA_FRAME_ABI.
845 const int adapter_size = frame::top_ijava_frame_abi_size +
846 round_to(total_args_passed * wordSize, frame::alignment_in_bytes);
847
848 // regular (verified) c2i entry point
849 c2i_entrypoint = __ pc();
850
851 // Does compiled code exists? If yes, patch the caller's callsite.
852 __ ld(code, method_(code));
853 __ cmpdi(CCR0, code, 0);
854 __ ld(ientry, method_(interpreter_entry)); // preloaded
855 __ beq(CCR0, call_interpreter);
856
857
858 // Patch caller's callsite, method_(code) was not NULL which means that
859 // compiled code exists.
860 __ mflr(return_pc);
861 __ std(return_pc, _abi(lr), R1_SP);
862 RegisterSaver::push_frame_and_save_argument_registers(masm, tmp, adapter_size, total_args_passed, regs);
863
864 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), R19_method, return_pc);
865
866 RegisterSaver::restore_argument_registers_and_pop_frame(masm, adapter_size, total_args_passed, regs);
867 __ ld(return_pc, _abi(lr), R1_SP);
868 __ ld(ientry, method_(interpreter_entry)); // preloaded
869 __ mtlr(return_pc);
870
871
872 // Call the interpreter.
873 __ BIND(call_interpreter);
874 __ mtctr(ientry);
875
876 // Get a copy of the current SP for loading caller's arguments.
877 __ mr(sender_SP, R1_SP);
878
879 // Add space for the adapter.
880 __ resize_frame(-adapter_size, R12_scratch2);
881
882 int st_off = adapter_size - wordSize;
883
884 // Write the args into the outgoing interpreter space.
885 for (int i = 0; i < total_args_passed; i++) {
886 VMReg r_1 = regs[i].first();
887 VMReg r_2 = regs[i].second();
888 if (!r_1->is_valid()) {
889 assert(!r_2->is_valid(), "");
890 continue;
891 }
892 if (r_1->is_stack()) {
893 Register tmp_reg = value_regs[value_regs_index];
894 value_regs_index = (value_regs_index + 1) % num_value_regs;
895 // The calling convention produces OptoRegs that ignore the out
896 // preserve area (JIT's ABI). We must account for it here.
897 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
898 if (!r_2->is_valid()) {
899 __ lwz(tmp_reg, ld_off, sender_SP);
900 } else {
901 __ ld(tmp_reg, ld_off, sender_SP);
902 }
903 // Pretend stack targets were loaded into tmp_reg.
904 r_1 = tmp_reg->as_VMReg();
905 }
906
907 if (r_1->is_Register()) {
908 Register r = r_1->as_Register();
909 if (!r_2->is_valid()) {
910 __ stw(r, st_off, R1_SP);
911 st_off-=wordSize;
912 } else {
913 // Longs are given 2 64-bit slots in the interpreter, but the
914 // data is passed in only 1 slot.
915 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
916 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
917 st_off-=wordSize;
918 }
919 __ std(r, st_off, R1_SP);
920 st_off-=wordSize;
921 }
922 } else {
923 assert(r_1->is_FloatRegister(), "");
924 FloatRegister f = r_1->as_FloatRegister();
925 if (!r_2->is_valid()) {
926 __ stfs(f, st_off, R1_SP);
927 st_off-=wordSize;
928 } else {
929 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
930 // data is passed in only 1 slot.
931 // One of these should get known junk...
932 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
933 st_off-=wordSize;
934 __ stfd(f, st_off, R1_SP);
935 st_off-=wordSize;
936 }
937 }
938 }
939
940 // Jump to the interpreter just as if interpreter was doing it.
941
942 #ifdef CC_INTERP
943 const Register tos = R17_tos;
944 #else
945 const Register tos = R15_esp;
946 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
947 #endif
948
949 // load TOS
950 __ addi(tos, R1_SP, st_off);
951
952 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
953 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
954 __ bctr();
955
956 return c2i_entrypoint;
957 }
958
959 static void gen_i2c_adapter(MacroAssembler *masm,
960 int total_args_passed,
961 int comp_args_on_stack,
962 const BasicType *sig_bt,
963 const VMRegPair *regs) {
964
965 // Load method's entry-point from method.
966 __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
967 __ mtctr(R12_scratch2);
968
969 // We will only enter here from an interpreted frame and never from after
970 // passing thru a c2i. Azul allowed this but we do not. If we lose the
971 // race and use a c2i we will remain interpreted for the race loser(s).
972 // This removes all sorts of headaches on the x86 side and also eliminates
973 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
974
975 // Note: r13 contains the senderSP on entry. We must preserve it since
976 // we may do a i2c -> c2i transition if we lose a race where compiled
977 // code goes non-entrant while we get args ready.
978 // In addition we use r13 to locate all the interpreter args as
979 // we must align the stack to 16 bytes on an i2c entry else we
980 // lose alignment we expect in all compiled code and register
981 // save code can segv when fxsave instructions find improperly
982 // aligned stack pointer.
983
984 #ifdef CC_INTERP
985 const Register ld_ptr = R17_tos;
986 #else
987 const Register ld_ptr = R15_esp;
988 #endif
989
990 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
991 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
992 int value_regs_index = 0;
993
994 int ld_offset = total_args_passed*wordSize;
995
996 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
997 // in registers, we will occasionally have no stack args.
998 int comp_words_on_stack = 0;
999 if (comp_args_on_stack) {
1000 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1001 // registers are below. By subtracting stack0, we either get a negative
1002 // number (all values in registers) or the maximum stack slot accessed.
1003
1004 // Convert 4-byte c2 stack slots to words.
1005 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1006 // Round up to miminum stack alignment, in wordSize.
1007 comp_words_on_stack = round_to(comp_words_on_stack, 2);
1008 __ resize_frame(-comp_words_on_stack * wordSize, R11_scratch1);
1009 }
1010
1011 // Now generate the shuffle code. Pick up all register args and move the
1012 // rest through register value=Z_R12.
1013 BLOCK_COMMENT("Shuffle arguments");
1014 for (int i = 0; i < total_args_passed; i++) {
1015 if (sig_bt[i] == T_VOID) {
1016 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
1017 continue;
1018 }
1019
1020 // Pick up 0, 1 or 2 words from ld_ptr.
1021 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
1022 "scrambled load targets?");
1023 VMReg r_1 = regs[i].first();
1024 VMReg r_2 = regs[i].second();
1025 if (!r_1->is_valid()) {
1026 assert(!r_2->is_valid(), "");
1027 continue;
1028 }
1029 if (r_1->is_FloatRegister()) {
1030 if (!r_2->is_valid()) {
1031 __ lfs(r_1->as_FloatRegister(), ld_offset, ld_ptr);
1032 ld_offset-=wordSize;
1033 } else {
1034 // Skip the unused interpreter slot.
1035 __ lfd(r_1->as_FloatRegister(), ld_offset-wordSize, ld_ptr);
1036 ld_offset-=2*wordSize;
1037 }
1038 } else {
1039 Register r;
1040 if (r_1->is_stack()) {
1041 // Must do a memory to memory move thru "value".
1042 r = value_regs[value_regs_index];
1043 value_regs_index = (value_regs_index + 1) % num_value_regs;
1044 } else {
1045 r = r_1->as_Register();
1046 }
1047 if (!r_2->is_valid()) {
1048 // Not sure we need to do this but it shouldn't hurt.
1049 if (sig_bt[i] == T_OBJECT || sig_bt[i] == T_ADDRESS || sig_bt[i] == T_ARRAY) {
1050 __ ld(r, ld_offset, ld_ptr);
1051 ld_offset-=wordSize;
1052 } else {
1053 __ lwz(r, ld_offset, ld_ptr);
1054 ld_offset-=wordSize;
1055 }
1056 } else {
1057 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
1058 // data is passed in only 1 slot.
1059 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
1060 ld_offset-=wordSize;
1061 }
1062 __ ld(r, ld_offset, ld_ptr);
1063 ld_offset-=wordSize;
1064 }
1065
1066 if (r_1->is_stack()) {
1067 // Now store value where the compiler expects it
1068 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size;
1069
1070 if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN ||
1071 sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) {
1072 __ stw(r, st_off, R1_SP);
1073 } else {
1074 __ std(r, st_off, R1_SP);
1075 }
1076 }
1077 }
1078 }
1079
1080 BLOCK_COMMENT("Store method");
1081 // Store method into thread->callee_target.
1082 // We might end up in handle_wrong_method if the callee is
1083 // deoptimized as we race thru here. If that happens we don't want
1084 // to take a safepoint because the caller frame will look
1085 // interpreted and arguments are now "compiled" so it is much better
1086 // to make this transition invisible to the stack walking
1087 // code. Unfortunately if we try and find the callee by normal means
1088 // a safepoint is possible. So we stash the desired callee in the
1089 // thread and the vm will find there should this case occur.
1090 __ std(R19_method, thread_(callee_target));
1091
1092 // Jump to the compiled code just as if compiled code was doing it.
1093 __ bctr();
1094 }
1095
1096 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1097 int total_args_passed,
1098 int comp_args_on_stack,
1099 const BasicType *sig_bt,
1100 const VMRegPair *regs,
1101 AdapterFingerPrint* fingerprint) {
1102 address i2c_entry;
1103 address c2i_unverified_entry;
1104 address c2i_entry;
1105
1106
1107 // entry: i2c
1108
1109 __ align(CodeEntryAlignment);
1110 i2c_entry = __ pc();
1111 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
1112
1113
1114 // entry: c2i unverified
1115
1116 __ align(CodeEntryAlignment);
1117 BLOCK_COMMENT("c2i unverified entry");
1118 c2i_unverified_entry = __ pc();
1119
1120 // inline_cache contains a compiledICHolder
1121 const Register ic = R19_method;
1122 const Register ic_klass = R11_scratch1;
1123 const Register receiver_klass = R12_scratch2;
1124 const Register code = R21_tmp1;
1125 const Register ientry = R23_tmp3;
1126
1127 assert_different_registers(ic, ic_klass, receiver_klass, R3_ARG1, code, ientry);
1128 assert(R11_scratch1 == R11, "need prologue scratch register");
1129
1130 Label call_interpreter;
1131
1132 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()),
1133 "klass offset should reach into any page");
1134 // Check for NULL argument if we don't have implicit null checks.
1135 if (!ImplicitNullChecks || !os::zero_page_read_protected()) {
1136 if (TrapBasedNullChecks) {
1137 __ trap_null_check(R3_ARG1);
1138 } else {
1139 Label valid;
1140 __ cmpdi(CCR0, R3_ARG1, 0);
1141 __ bne_predict_taken(CCR0, valid);
1142 // We have a null argument, branch to ic_miss_stub.
1143 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1144 relocInfo::runtime_call_type);
1145 __ BIND(valid);
1146 }
1147 }
1148 // Assume argument is not NULL, load klass from receiver.
1149 __ load_klass(receiver_klass, R3_ARG1);
1150
1151 __ ld(ic_klass, CompiledICHolder::holder_klass_offset(), ic);
1152
1153 if (TrapBasedICMissChecks) {
1154 __ trap_ic_miss_check(receiver_klass, ic_klass);
1155 } else {
1156 Label valid;
1157 __ cmpd(CCR0, receiver_klass, ic_klass);
1158 __ beq_predict_taken(CCR0, valid);
1159 // We have an unexpected klass, branch to ic_miss_stub.
1160 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1161 relocInfo::runtime_call_type);
1162 __ BIND(valid);
1163 }
1164
1165 // Argument is valid and klass is as expected, continue.
1166
1167 // Extract method from inline cache, verified entry point needs it.
1168 __ ld(R19_method, CompiledICHolder::holder_method_offset(), ic);
1169 assert(R19_method == ic, "the inline cache register is dead here");
1170
1171 __ ld(code, method_(code));
1172 __ cmpdi(CCR0, code, 0);
1173 __ ld(ientry, method_(interpreter_entry)); // preloaded
1174 __ beq_predict_taken(CCR0, call_interpreter);
1175
1176 // Branch to ic_miss_stub.
1177 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1178
1179 // entry: c2i
1180
1181 c2i_entry = gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
1182
1183 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
1184 }
1185
1186 #ifdef COMPILER2
1187 // An oop arg. Must pass a handle not the oop itself.
1188 static void object_move(MacroAssembler* masm,
1189 int frame_size_in_slots,
1190 OopMap* oop_map, int oop_handle_offset,
1191 bool is_receiver, int* receiver_offset,
1192 VMRegPair src, VMRegPair dst,
1193 Register r_caller_sp, Register r_temp_1, Register r_temp_2) {
1194 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)),
1195 "receiver has already been moved");
1196
1197 // We must pass a handle. First figure out the location we use as a handle.
1198
1199 if (src.first()->is_stack()) {
1200 // stack to stack or reg
1201
1202 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1203 Label skip;
1204 const int oop_slot_in_callers_frame = reg2slot(src.first());
1205
1206 guarantee(!is_receiver, "expecting receiver in register");
1207 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot_in_callers_frame + frame_size_in_slots));
1208
1209 __ addi(r_handle, r_caller_sp, reg2offset(src.first()));
1210 __ ld( r_temp_2, reg2offset(src.first()), r_caller_sp);
1211 __ cmpdi(CCR0, r_temp_2, 0);
1212 __ bne(CCR0, skip);
1213 // Use a NULL handle if oop is NULL.
1214 __ li(r_handle, 0);
1215 __ bind(skip);
1216
1217 if (dst.first()->is_stack()) {
1218 // stack to stack
1219 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1220 } else {
1221 // stack to reg
1222 // Nothing to do, r_handle is already the dst register.
1223 }
1224 } else {
1225 // reg to stack or reg
1226 const Register r_oop = src.first()->as_Register();
1227 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1228 const int oop_slot = (r_oop->encoding()-R3_ARG1->encoding()) * VMRegImpl::slots_per_word
1229 + oop_handle_offset; // in slots
1230 const int oop_offset = oop_slot * VMRegImpl::stack_slot_size;
1231 Label skip;
1232
1233 if (is_receiver) {
1234 *receiver_offset = oop_offset;
1235 }
1236 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot));
1237
1238 __ std( r_oop, oop_offset, R1_SP);
1239 __ addi(r_handle, R1_SP, oop_offset);
1240
1241 __ cmpdi(CCR0, r_oop, 0);
1242 __ bne(CCR0, skip);
1243 // Use a NULL handle if oop is NULL.
1244 __ li(r_handle, 0);
1245 __ bind(skip);
1246
1247 if (dst.first()->is_stack()) {
1248 // reg to stack
1249 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1250 } else {
1251 // reg to reg
1252 // Nothing to do, r_handle is already the dst register.
1253 }
1254 }
1255 }
1256
1257 static void int_move(MacroAssembler*masm,
1258 VMRegPair src, VMRegPair dst,
1259 Register r_caller_sp, Register r_temp) {
1260 assert(src.first()->is_valid(), "incoming must be int");
1261 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1262
1263 if (src.first()->is_stack()) {
1264 if (dst.first()->is_stack()) {
1265 // stack to stack
1266 __ lwa(r_temp, reg2offset(src.first()), r_caller_sp);
1267 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1268 } else {
1269 // stack to reg
1270 __ lwa(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1271 }
1272 } else if (dst.first()->is_stack()) {
1273 // reg to stack
1274 __ extsw(r_temp, src.first()->as_Register());
1275 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1276 } else {
1277 // reg to reg
1278 __ extsw(dst.first()->as_Register(), src.first()->as_Register());
1279 }
1280 }
1281
1282 static void long_move(MacroAssembler*masm,
1283 VMRegPair src, VMRegPair dst,
1284 Register r_caller_sp, Register r_temp) {
1285 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long");
1286 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1287
1288 if (src.first()->is_stack()) {
1289 if (dst.first()->is_stack()) {
1290 // stack to stack
1291 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1292 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1293 } else {
1294 // stack to reg
1295 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1296 }
1297 } else if (dst.first()->is_stack()) {
1298 // reg to stack
1299 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1300 } else {
1301 // reg to reg
1302 if (dst.first()->as_Register() != src.first()->as_Register())
1303 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1304 }
1305 }
1306
1307 static void float_move(MacroAssembler*masm,
1308 VMRegPair src, VMRegPair dst,
1309 Register r_caller_sp, Register r_temp) {
1310 assert(src.first()->is_valid() && !src.second()->is_valid(), "incoming must be float");
1311 assert(dst.first()->is_valid() && !dst.second()->is_valid(), "outgoing must be float");
1312
1313 if (src.first()->is_stack()) {
1314 if (dst.first()->is_stack()) {
1315 // stack to stack
1316 __ lwz(r_temp, reg2offset(src.first()), r_caller_sp);
1317 __ stw(r_temp, reg2offset(dst.first()), R1_SP);
1318 } else {
1319 // stack to reg
1320 __ lfs(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1321 }
1322 } else if (dst.first()->is_stack()) {
1323 // reg to stack
1324 __ stfs(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1325 } else {
1326 // reg to reg
1327 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1328 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1329 }
1330 }
1331
1332 static void double_move(MacroAssembler*masm,
1333 VMRegPair src, VMRegPair dst,
1334 Register r_caller_sp, Register r_temp) {
1335 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be double");
1336 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be double");
1337
1338 if (src.first()->is_stack()) {
1339 if (dst.first()->is_stack()) {
1340 // stack to stack
1341 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1342 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1343 } else {
1344 // stack to reg
1345 __ lfd(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1346 }
1347 } else if (dst.first()->is_stack()) {
1348 // reg to stack
1349 __ stfd(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1350 } else {
1351 // reg to reg
1352 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1353 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1354 }
1355 }
1356
1357 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1358 switch (ret_type) {
1359 case T_BOOLEAN:
1360 case T_CHAR:
1361 case T_BYTE:
1362 case T_SHORT:
1363 case T_INT:
1364 __ stw (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1365 break;
1366 case T_ARRAY:
1367 case T_OBJECT:
1368 case T_LONG:
1369 __ std (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1370 break;
1371 case T_FLOAT:
1372 __ stfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1373 break;
1374 case T_DOUBLE:
1375 __ stfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1376 break;
1377 case T_VOID:
1378 break;
1379 default:
1380 ShouldNotReachHere();
1381 break;
1382 }
1383 }
1384
1385 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1386 switch (ret_type) {
1387 case T_BOOLEAN:
1388 case T_CHAR:
1389 case T_BYTE:
1390 case T_SHORT:
1391 case T_INT:
1392 __ lwz(R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1393 break;
1394 case T_ARRAY:
1395 case T_OBJECT:
1396 case T_LONG:
1397 __ ld (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1398 break;
1399 case T_FLOAT:
1400 __ lfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1401 break;
1402 case T_DOUBLE:
1403 __ lfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1404 break;
1405 case T_VOID:
1406 break;
1407 default:
1408 ShouldNotReachHere();
1409 break;
1410 }
1411 }
1412
1413 static void save_or_restore_arguments(MacroAssembler* masm,
1414 const int stack_slots,
1415 const int total_in_args,
1416 const int arg_save_area,
1417 OopMap* map,
1418 VMRegPair* in_regs,
1419 BasicType* in_sig_bt) {
1420 // If map is non-NULL then the code should store the values,
1421 // otherwise it should load them.
1422 int slot = arg_save_area;
1423 // Save down double word first.
1424 for (int i = 0; i < total_in_args; i++) {
1425 if (in_regs[i].first()->is_FloatRegister() && in_sig_bt[i] == T_DOUBLE) {
1426 int offset = slot * VMRegImpl::stack_slot_size;
1427 slot += VMRegImpl::slots_per_word;
1428 assert(slot <= stack_slots, "overflow (after DOUBLE stack slot)");
1429 if (map != NULL) {
1430 __ stfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1431 } else {
1432 __ lfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1433 }
1434 } else if (in_regs[i].first()->is_Register() &&
1435 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1436 int offset = slot * VMRegImpl::stack_slot_size;
1437 if (map != NULL) {
1438 __ std(in_regs[i].first()->as_Register(), offset, R1_SP);
1439 if (in_sig_bt[i] == T_ARRAY) {
1440 map->set_oop(VMRegImpl::stack2reg(slot));
1441 }
1442 } else {
1443 __ ld(in_regs[i].first()->as_Register(), offset, R1_SP);
1444 }
1445 slot += VMRegImpl::slots_per_word;
1446 assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
1447 }
1448 }
1449 // Save or restore single word registers.
1450 for (int i = 0; i < total_in_args; i++) {
1451 // PPC64: pass ints as longs: must only deal with floats here.
1452 if (in_regs[i].first()->is_FloatRegister()) {
1453 if (in_sig_bt[i] == T_FLOAT) {
1454 int offset = slot * VMRegImpl::stack_slot_size;
1455 slot++;
1456 assert(slot <= stack_slots, "overflow (after FLOAT stack slot)");
1457 if (map != NULL) {
1458 __ stfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1459 } else {
1460 __ lfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1461 }
1462 }
1463 } else if (in_regs[i].first()->is_stack()) {
1464 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1465 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1466 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1467 }
1468 }
1469 }
1470 }
1471
1472 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1473 // keeps a new JNI critical region from starting until a GC has been
1474 // forced. Save down any oops in registers and describe them in an
1475 // OopMap.
1476 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1477 const int stack_slots,
1478 const int total_in_args,
1479 const int arg_save_area,
1480 OopMapSet* oop_maps,
1481 VMRegPair* in_regs,
1482 BasicType* in_sig_bt,
1483 Register tmp_reg ) {
1484 __ block_comment("check GC_locker::needs_gc");
1485 Label cont;
1486 __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GC_locker::needs_gc_address());
1487 __ cmplwi(CCR0, tmp_reg, 0);
1488 __ beq(CCR0, cont);
1489
1490 // Save down any values that are live in registers and call into the
1491 // runtime to halt for a GC.
1492 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1493 save_or_restore_arguments(masm, stack_slots, total_in_args,
1494 arg_save_area, map, in_regs, in_sig_bt);
1495
1496 __ mr(R3_ARG1, R16_thread);
1497 __ set_last_Java_frame(R1_SP, noreg);
1498
1499 __ block_comment("block_for_jni_critical");
1500 address entry_point = CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical);
1501 #if defined(ABI_ELFv2)
1502 __ call_c(entry_point, relocInfo::runtime_call_type);
1503 #else
1504 __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::runtime_call_type);
1505 #endif
1506 address start = __ pc() - __ offset(),
1507 calls_return_pc = __ last_calls_return_pc();
1508 oop_maps->add_gc_map(calls_return_pc - start, map);
1509
1510 __ reset_last_Java_frame();
1511
1512 // Reload all the register arguments.
1513 save_or_restore_arguments(masm, stack_slots, total_in_args,
1514 arg_save_area, NULL, in_regs, in_sig_bt);
1515
1516 __ BIND(cont);
1517
1518 #ifdef ASSERT
1519 if (StressCriticalJNINatives) {
1520 // Stress register saving.
1521 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1522 save_or_restore_arguments(masm, stack_slots, total_in_args,
1523 arg_save_area, map, in_regs, in_sig_bt);
1524 // Destroy argument registers.
1525 for (int i = 0; i < total_in_args; i++) {
1526 if (in_regs[i].first()->is_Register()) {
1527 const Register reg = in_regs[i].first()->as_Register();
1528 __ neg(reg, reg);
1529 } else if (in_regs[i].first()->is_FloatRegister()) {
1530 __ fneg(in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister());
1531 }
1532 }
1533
1534 save_or_restore_arguments(masm, stack_slots, total_in_args,
1535 arg_save_area, NULL, in_regs, in_sig_bt);
1536 }
1537 #endif
1538 }
1539
1540 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst, Register r_caller_sp, Register r_temp) {
1541 if (src.first()->is_stack()) {
1542 if (dst.first()->is_stack()) {
1543 // stack to stack
1544 __ ld(r_temp, reg2offset(src.first()), r_caller_sp);
1545 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1546 } else {
1547 // stack to reg
1548 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1549 }
1550 } else if (dst.first()->is_stack()) {
1551 // reg to stack
1552 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1553 } else {
1554 if (dst.first() != src.first()) {
1555 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1556 }
1557 }
1558 }
1559
1560 // Unpack an array argument into a pointer to the body and the length
1561 // if the array is non-null, otherwise pass 0 for both.
1562 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type,
1563 VMRegPair body_arg, VMRegPair length_arg, Register r_caller_sp,
1564 Register tmp_reg, Register tmp2_reg) {
1565 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1566 "possible collision");
1567 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1568 "possible collision");
1569
1570 // Pass the length, ptr pair.
1571 Label set_out_args;
1572 VMRegPair tmp, tmp2;
1573 tmp.set_ptr(tmp_reg->as_VMReg());
1574 tmp2.set_ptr(tmp2_reg->as_VMReg());
1575 if (reg.first()->is_stack()) {
1576 // Load the arg up from the stack.
1577 move_ptr(masm, reg, tmp, r_caller_sp, /*unused*/ R0);
1578 reg = tmp;
1579 }
1580 __ li(tmp2_reg, 0); // Pass zeros if Array=null.
1581 if (tmp_reg != reg.first()->as_Register()) __ li(tmp_reg, 0);
1582 __ cmpdi(CCR0, reg.first()->as_Register(), 0);
1583 __ beq(CCR0, set_out_args);
1584 __ lwa(tmp2_reg, arrayOopDesc::length_offset_in_bytes(), reg.first()->as_Register());
1585 __ addi(tmp_reg, reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type));
1586 __ bind(set_out_args);
1587 move_ptr(masm, tmp, body_arg, r_caller_sp, /*unused*/ R0);
1588 move_ptr(masm, tmp2, length_arg, r_caller_sp, /*unused*/ R0); // Same as move32_64 on PPC64.
1589 }
1590
1591 static void verify_oop_args(MacroAssembler* masm,
1592 methodHandle method,
1593 const BasicType* sig_bt,
1594 const VMRegPair* regs) {
1595 Register temp_reg = R19_method; // not part of any compiled calling seq
1596 if (VerifyOops) {
1597 for (int i = 0; i < method->size_of_parameters(); i++) {
1598 if (sig_bt[i] == T_OBJECT ||
1599 sig_bt[i] == T_ARRAY) {
1600 VMReg r = regs[i].first();
1601 assert(r->is_valid(), "bad oop arg");
1602 if (r->is_stack()) {
1603 __ ld(temp_reg, reg2offset(r), R1_SP);
1604 __ verify_oop(temp_reg);
1605 } else {
1606 __ verify_oop(r->as_Register());
1607 }
1608 }
1609 }
1610 }
1611 }
1612
1613 static void gen_special_dispatch(MacroAssembler* masm,
1614 methodHandle method,
1615 const BasicType* sig_bt,
1616 const VMRegPair* regs) {
1617 verify_oop_args(masm, method, sig_bt, regs);
1618 vmIntrinsics::ID iid = method->intrinsic_id();
1619
1620 // Now write the args into the outgoing interpreter space
1621 bool has_receiver = false;
1622 Register receiver_reg = noreg;
1623 int member_arg_pos = -1;
1624 Register member_reg = noreg;
1625 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1626 if (ref_kind != 0) {
1627 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1628 member_reg = R19_method; // known to be free at this point
1629 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1630 } else if (iid == vmIntrinsics::_invokeBasic) {
1631 has_receiver = true;
1632 } else {
1633 fatal("unexpected intrinsic id %d", iid);
1634 }
1635
1636 if (member_reg != noreg) {
1637 // Load the member_arg into register, if necessary.
1638 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1639 VMReg r = regs[member_arg_pos].first();
1640 if (r->is_stack()) {
1641 __ ld(member_reg, reg2offset(r), R1_SP);
1642 } else {
1643 // no data motion is needed
1644 member_reg = r->as_Register();
1645 }
1646 }
1647
1648 if (has_receiver) {
1649 // Make sure the receiver is loaded into a register.
1650 assert(method->size_of_parameters() > 0, "oob");
1651 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1652 VMReg r = regs[0].first();
1653 assert(r->is_valid(), "bad receiver arg");
1654 if (r->is_stack()) {
1655 // Porting note: This assumes that compiled calling conventions always
1656 // pass the receiver oop in a register. If this is not true on some
1657 // platform, pick a temp and load the receiver from stack.
1658 fatal("receiver always in a register");
1659 receiver_reg = R11_scratch1; // TODO (hs24): is R11_scratch1 really free at this point?
1660 __ ld(receiver_reg, reg2offset(r), R1_SP);
1661 } else {
1662 // no data motion is needed
1663 receiver_reg = r->as_Register();
1664 }
1665 }
1666
1667 // Figure out which address we are really jumping to:
1668 MethodHandles::generate_method_handle_dispatch(masm, iid,
1669 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1670 }
1671
1672 #endif // COMPILER2
1673
1674 // ---------------------------------------------------------------------------
1675 // Generate a native wrapper for a given method. The method takes arguments
1676 // in the Java compiled code convention, marshals them to the native
1677 // convention (handlizes oops, etc), transitions to native, makes the call,
1678 // returns to java state (possibly blocking), unhandlizes any result and
1679 // returns.
1680 //
1681 // Critical native functions are a shorthand for the use of
1682 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1683 // functions. The wrapper is expected to unpack the arguments before
1684 // passing them to the callee and perform checks before and after the
1685 // native call to ensure that they GC_locker
1686 // lock_critical/unlock_critical semantics are followed. Some other
1687 // parts of JNI setup are skipped like the tear down of the JNI handle
1688 // block and the check for pending exceptions it's impossible for them
1689 // to be thrown.
1690 //
1691 // They are roughly structured like this:
1692 // if (GC_locker::needs_gc())
1693 // SharedRuntime::block_for_jni_critical();
1694 // tranistion to thread_in_native
1695 // unpack arrray arguments and call native entry point
1696 // check for safepoint in progress
1697 // check if any thread suspend flags are set
1698 // call into JVM and possible unlock the JNI critical
1699 // if a GC was suppressed while in the critical native.
1700 // transition back to thread_in_Java
1701 // return to caller
1702 //
1703 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1704 methodHandle method,
1705 int compile_id,
1706 BasicType *in_sig_bt,
1707 VMRegPair *in_regs,
1708 BasicType ret_type) {
1709 #ifdef COMPILER2
1710 if (method->is_method_handle_intrinsic()) {
1711 vmIntrinsics::ID iid = method->intrinsic_id();
1712 intptr_t start = (intptr_t)__ pc();
1713 int vep_offset = ((intptr_t)__ pc()) - start;
1714 gen_special_dispatch(masm,
1715 method,
1716 in_sig_bt,
1717 in_regs);
1718 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1719 __ flush();
1720 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1721 return nmethod::new_native_nmethod(method,
1722 compile_id,
1723 masm->code(),
1724 vep_offset,
1725 frame_complete,
1726 stack_slots / VMRegImpl::slots_per_word,
1727 in_ByteSize(-1),
1728 in_ByteSize(-1),
1729 (OopMapSet*)NULL);
1730 }
1731
1732 bool is_critical_native = true;
1733 address native_func = method->critical_native_function();
1734 if (native_func == NULL) {
1735 native_func = method->native_function();
1736 is_critical_native = false;
1737 }
1738 assert(native_func != NULL, "must have function");
1739
1740 // First, create signature for outgoing C call
1741 // --------------------------------------------------------------------------
1742
1743 int total_in_args = method->size_of_parameters();
1744 // We have received a description of where all the java args are located
1745 // on entry to the wrapper. We need to convert these args to where
1746 // the jni function will expect them. To figure out where they go
1747 // we convert the java signature to a C signature by inserting
1748 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1749
1750 // Calculate the total number of C arguments and create arrays for the
1751 // signature and the outgoing registers.
1752 // On ppc64, we have two arrays for the outgoing registers, because
1753 // some floating-point arguments must be passed in registers _and_
1754 // in stack locations.
1755 bool method_is_static = method->is_static();
1756 int total_c_args = total_in_args;
1757
1758 if (!is_critical_native) {
1759 int n_hidden_args = method_is_static ? 2 : 1;
1760 total_c_args += n_hidden_args;
1761 } else {
1762 // No JNIEnv*, no this*, but unpacked arrays (base+length).
1763 for (int i = 0; i < total_in_args; i++) {
1764 if (in_sig_bt[i] == T_ARRAY) {
1765 total_c_args++;
1766 }
1767 }
1768 }
1769
1770 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1771 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1772 VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1773 BasicType* in_elem_bt = NULL;
1774
1775 // Create the signature for the C call:
1776 // 1) add the JNIEnv*
1777 // 2) add the class if the method is static
1778 // 3) copy the rest of the incoming signature (shifted by the number of
1779 // hidden arguments).
1780
1781 int argc = 0;
1782 if (!is_critical_native) {
1783 out_sig_bt[argc++] = T_ADDRESS;
1784 if (method->is_static()) {
1785 out_sig_bt[argc++] = T_OBJECT;
1786 }
1787
1788 for (int i = 0; i < total_in_args ; i++ ) {
1789 out_sig_bt[argc++] = in_sig_bt[i];
1790 }
1791 } else {
1792 Thread* THREAD = Thread::current();
1793 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1794 SignatureStream ss(method->signature());
1795 int o = 0;
1796 for (int i = 0; i < total_in_args ; i++, o++) {
1797 if (in_sig_bt[i] == T_ARRAY) {
1798 // Arrays are passed as int, elem* pair
1799 Symbol* atype = ss.as_symbol(CHECK_NULL);
1800 const char* at = atype->as_C_string();
1801 if (strlen(at) == 2) {
1802 assert(at[0] == '[', "must be");
1803 switch (at[1]) {
1804 case 'B': in_elem_bt[o] = T_BYTE; break;
1805 case 'C': in_elem_bt[o] = T_CHAR; break;
1806 case 'D': in_elem_bt[o] = T_DOUBLE; break;
1807 case 'F': in_elem_bt[o] = T_FLOAT; break;
1808 case 'I': in_elem_bt[o] = T_INT; break;
1809 case 'J': in_elem_bt[o] = T_LONG; break;
1810 case 'S': in_elem_bt[o] = T_SHORT; break;
1811 case 'Z': in_elem_bt[o] = T_BOOLEAN; break;
1812 default: ShouldNotReachHere();
1813 }
1814 }
1815 } else {
1816 in_elem_bt[o] = T_VOID;
1817 }
1818 if (in_sig_bt[i] != T_VOID) {
1819 assert(in_sig_bt[i] == ss.type(), "must match");
1820 ss.next();
1821 }
1822 }
1823
1824 for (int i = 0; i < total_in_args ; i++ ) {
1825 if (in_sig_bt[i] == T_ARRAY) {
1826 // Arrays are passed as int, elem* pair.
1827 out_sig_bt[argc++] = T_INT;
1828 out_sig_bt[argc++] = T_ADDRESS;
1829 } else {
1830 out_sig_bt[argc++] = in_sig_bt[i];
1831 }
1832 }
1833 }
1834
1835
1836 // Compute the wrapper's frame size.
1837 // --------------------------------------------------------------------------
1838
1839 // Now figure out where the args must be stored and how much stack space
1840 // they require.
1841 //
1842 // Compute framesize for the wrapper. We need to handlize all oops in
1843 // incoming registers.
1844 //
1845 // Calculate the total number of stack slots we will need:
1846 // 1) abi requirements
1847 // 2) outgoing arguments
1848 // 3) space for inbound oop handle area
1849 // 4) space for handlizing a klass if static method
1850 // 5) space for a lock if synchronized method
1851 // 6) workspace for saving return values, int <-> float reg moves, etc.
1852 // 7) alignment
1853 //
1854 // Layout of the native wrapper frame:
1855 // (stack grows upwards, memory grows downwards)
1856 //
1857 // NW [ABI_REG_ARGS] <-- 1) R1_SP
1858 // [outgoing arguments] <-- 2) R1_SP + out_arg_slot_offset
1859 // [oopHandle area] <-- 3) R1_SP + oop_handle_offset (save area for critical natives)
1860 // klass <-- 4) R1_SP + klass_offset
1861 // lock <-- 5) R1_SP + lock_offset
1862 // [workspace] <-- 6) R1_SP + workspace_offset
1863 // [alignment] (optional) <-- 7)
1864 // caller [JIT_TOP_ABI_48] <-- r_callers_sp
1865 //
1866 // - *_slot_offset Indicates offset from SP in number of stack slots.
1867 // - *_offset Indicates offset from SP in bytes.
1868
1869 int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) // 1+2)
1870 + SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention.
1871
1872 // Now the space for the inbound oop handle area.
1873 int total_save_slots = num_java_iarg_registers * VMRegImpl::slots_per_word;
1874 if (is_critical_native) {
1875 // Critical natives may have to call out so they need a save area
1876 // for register arguments.
1877 int double_slots = 0;
1878 int single_slots = 0;
1879 for (int i = 0; i < total_in_args; i++) {
1880 if (in_regs[i].first()->is_Register()) {
1881 const Register reg = in_regs[i].first()->as_Register();
1882 switch (in_sig_bt[i]) {
1883 case T_BOOLEAN:
1884 case T_BYTE:
1885 case T_SHORT:
1886 case T_CHAR:
1887 case T_INT:
1888 // Fall through.
1889 case T_ARRAY:
1890 case T_LONG: double_slots++; break;
1891 default: ShouldNotReachHere();
1892 }
1893 } else if (in_regs[i].first()->is_FloatRegister()) {
1894 switch (in_sig_bt[i]) {
1895 case T_FLOAT: single_slots++; break;
1896 case T_DOUBLE: double_slots++; break;
1897 default: ShouldNotReachHere();
1898 }
1899 }
1900 }
1901 total_save_slots = double_slots * 2 + round_to(single_slots, 2); // round to even
1902 }
1903
1904 int oop_handle_slot_offset = stack_slots;
1905 stack_slots += total_save_slots; // 3)
1906
1907 int klass_slot_offset = 0;
1908 int klass_offset = -1;
1909 if (method_is_static && !is_critical_native) { // 4)
1910 klass_slot_offset = stack_slots;
1911 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1912 stack_slots += VMRegImpl::slots_per_word;
1913 }
1914
1915 int lock_slot_offset = 0;
1916 int lock_offset = -1;
1917 if (method->is_synchronized()) { // 5)
1918 lock_slot_offset = stack_slots;
1919 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size;
1920 stack_slots += VMRegImpl::slots_per_word;
1921 }
1922
1923 int workspace_slot_offset = stack_slots; // 6)
1924 stack_slots += 2;
1925
1926 // Now compute actual number of stack words we need.
1927 // Rounding to make stack properly aligned.
1928 stack_slots = round_to(stack_slots, // 7)
1929 frame::alignment_in_bytes / VMRegImpl::stack_slot_size);
1930 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size;
1931
1932
1933 // Now we can start generating code.
1934 // --------------------------------------------------------------------------
1935
1936 intptr_t start_pc = (intptr_t)__ pc();
1937 intptr_t vep_start_pc;
1938 intptr_t frame_done_pc;
1939 intptr_t oopmap_pc;
1940
1941 Label ic_miss;
1942 Label handle_pending_exception;
1943
1944 Register r_callers_sp = R21;
1945 Register r_temp_1 = R22;
1946 Register r_temp_2 = R23;
1947 Register r_temp_3 = R24;
1948 Register r_temp_4 = R25;
1949 Register r_temp_5 = R26;
1950 Register r_temp_6 = R27;
1951 Register r_return_pc = R28;
1952
1953 Register r_carg1_jnienv = noreg;
1954 Register r_carg2_classorobject = noreg;
1955 if (!is_critical_native) {
1956 r_carg1_jnienv = out_regs[0].first()->as_Register();
1957 r_carg2_classorobject = out_regs[1].first()->as_Register();
1958 }
1959
1960
1961 // Generate the Unverified Entry Point (UEP).
1962 // --------------------------------------------------------------------------
1963 assert(start_pc == (intptr_t)__ pc(), "uep must be at start");
1964
1965 // Check ic: object class == cached class?
1966 if (!method_is_static) {
1967 Register ic = as_Register(Matcher::inline_cache_reg_encode());
1968 Register receiver_klass = r_temp_1;
1969
1970 __ cmpdi(CCR0, R3_ARG1, 0);
1971 __ beq(CCR0, ic_miss);
1972 __ verify_oop(R3_ARG1);
1973 __ load_klass(receiver_klass, R3_ARG1);
1974
1975 __ cmpd(CCR0, receiver_klass, ic);
1976 __ bne(CCR0, ic_miss);
1977 }
1978
1979
1980 // Generate the Verified Entry Point (VEP).
1981 // --------------------------------------------------------------------------
1982 vep_start_pc = (intptr_t)__ pc();
1983
1984 __ save_LR_CR(r_temp_1);
1985 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame.
1986 __ mr(r_callers_sp, R1_SP); // Remember frame pointer.
1987 __ push_frame(frame_size_in_bytes, r_temp_1); // Push the c2n adapter's frame.
1988 frame_done_pc = (intptr_t)__ pc();
1989
1990 __ verify_thread();
1991
1992 // Native nmethod wrappers never take possesion of the oop arguments.
1993 // So the caller will gc the arguments.
1994 // The only thing we need an oopMap for is if the call is static.
1995 //
1996 // An OopMap for lock (and class if static), and one for the VM call itself.
1997 OopMapSet *oop_maps = new OopMapSet();
1998 OopMap *oop_map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1999
2000 if (is_critical_native) {
2001 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, oop_handle_slot_offset, oop_maps, in_regs, in_sig_bt, r_temp_1);
2002 }
2003
2004 // Move arguments from register/stack to register/stack.
2005 // --------------------------------------------------------------------------
2006 //
2007 // We immediately shuffle the arguments so that for any vm call we have
2008 // to make from here on out (sync slow path, jvmti, etc.) we will have
2009 // captured the oops from our caller and have a valid oopMap for them.
2010 //
2011 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
2012 // (derived from JavaThread* which is in R16_thread) and, if static,
2013 // the class mirror instead of a receiver. This pretty much guarantees that
2014 // register layout will not match. We ignore these extra arguments during
2015 // the shuffle. The shuffle is described by the two calling convention
2016 // vectors we have in our possession. We simply walk the java vector to
2017 // get the source locations and the c vector to get the destinations.
2018
2019 // Record sp-based slot for receiver on stack for non-static methods.
2020 int receiver_offset = -1;
2021
2022 // We move the arguments backward because the floating point registers
2023 // destination will always be to a register with a greater or equal
2024 // register number or the stack.
2025 // in is the index of the incoming Java arguments
2026 // out is the index of the outgoing C arguments
2027
2028 #ifdef ASSERT
2029 bool reg_destroyed[RegisterImpl::number_of_registers];
2030 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2031 for (int r = 0 ; r < RegisterImpl::number_of_registers ; r++) {
2032 reg_destroyed[r] = false;
2033 }
2034 for (int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++) {
2035 freg_destroyed[f] = false;
2036 }
2037 #endif // ASSERT
2038
2039 for (int in = total_in_args - 1, out = total_c_args - 1; in >= 0 ; in--, out--) {
2040
2041 #ifdef ASSERT
2042 if (in_regs[in].first()->is_Register()) {
2043 assert(!reg_destroyed[in_regs[in].first()->as_Register()->encoding()], "ack!");
2044 } else if (in_regs[in].first()->is_FloatRegister()) {
2045 assert(!freg_destroyed[in_regs[in].first()->as_FloatRegister()->encoding()], "ack!");
2046 }
2047 if (out_regs[out].first()->is_Register()) {
2048 reg_destroyed[out_regs[out].first()->as_Register()->encoding()] = true;
2049 } else if (out_regs[out].first()->is_FloatRegister()) {
2050 freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true;
2051 }
2052 if (out_regs2[out].first()->is_Register()) {
2053 reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true;
2054 } else if (out_regs2[out].first()->is_FloatRegister()) {
2055 freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true;
2056 }
2057 #endif // ASSERT
2058
2059 switch (in_sig_bt[in]) {
2060 case T_BOOLEAN:
2061 case T_CHAR:
2062 case T_BYTE:
2063 case T_SHORT:
2064 case T_INT:
2065 // Move int and do sign extension.
2066 int_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2067 break;
2068 case T_LONG:
2069 long_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2070 break;
2071 case T_ARRAY:
2072 if (is_critical_native) {
2073 int body_arg = out;
2074 out -= 1; // Point to length arg.
2075 unpack_array_argument(masm, in_regs[in], in_elem_bt[in], out_regs[body_arg], out_regs[out],
2076 r_callers_sp, r_temp_1, r_temp_2);
2077 break;
2078 }
2079 case T_OBJECT:
2080 assert(!is_critical_native, "no oop arguments");
2081 object_move(masm, stack_slots,
2082 oop_map, oop_handle_slot_offset,
2083 ((in == 0) && (!method_is_static)), &receiver_offset,
2084 in_regs[in], out_regs[out],
2085 r_callers_sp, r_temp_1, r_temp_2);
2086 break;
2087 case T_VOID:
2088 break;
2089 case T_FLOAT:
2090 float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2091 if (out_regs2[out].first()->is_valid()) {
2092 float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2093 }
2094 break;
2095 case T_DOUBLE:
2096 double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2097 if (out_regs2[out].first()->is_valid()) {
2098 double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2099 }
2100 break;
2101 case T_ADDRESS:
2102 fatal("found type (T_ADDRESS) in java args");
2103 break;
2104 default:
2105 ShouldNotReachHere();
2106 break;
2107 }
2108 }
2109
2110 // Pre-load a static method's oop into ARG2.
2111 // Used both by locking code and the normal JNI call code.
2112 if (method_is_static && !is_critical_native) {
2113 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()),
2114 r_carg2_classorobject);
2115
2116 // Now handlize the static class mirror in carg2. It's known not-null.
2117 __ std(r_carg2_classorobject, klass_offset, R1_SP);
2118 oop_map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2119 __ addi(r_carg2_classorobject, R1_SP, klass_offset);
2120 }
2121
2122 // Get JNIEnv* which is first argument to native.
2123 if (!is_critical_native) {
2124 __ addi(r_carg1_jnienv, R16_thread, in_bytes(JavaThread::jni_environment_offset()));
2125 }
2126
2127 // NOTE:
2128 //
2129 // We have all of the arguments setup at this point.
2130 // We MUST NOT touch any outgoing regs from this point on.
2131 // So if we must call out we must push a new frame.
2132
2133 // Get current pc for oopmap, and load it patchable relative to global toc.
2134 oopmap_pc = (intptr_t) __ pc();
2135 __ calculate_address_from_global_toc(r_return_pc, (address)oopmap_pc, true, true, true, true);
2136
2137 // We use the same pc/oopMap repeatedly when we call out.
2138 oop_maps->add_gc_map(oopmap_pc - start_pc, oop_map);
2139
2140 // r_return_pc now has the pc loaded that we will use when we finally call
2141 // to native.
2142
2143 // Make sure that thread is non-volatile; it crosses a bunch of VM calls below.
2144 assert(R16_thread->is_nonvolatile(), "thread must be in non-volatile register");
2145
2146 # if 0
2147 // DTrace method entry
2148 # endif
2149
2150 // Lock a synchronized method.
2151 // --------------------------------------------------------------------------
2152
2153 if (method->is_synchronized()) {
2154 assert(!is_critical_native, "unhandled");
2155 ConditionRegister r_flag = CCR1;
2156 Register r_oop = r_temp_4;
2157 const Register r_box = r_temp_5;
2158 Label done, locked;
2159
2160 // Load the oop for the object or class. r_carg2_classorobject contains
2161 // either the handlized oop from the incoming arguments or the handlized
2162 // class mirror (if the method is static).
2163 __ ld(r_oop, 0, r_carg2_classorobject);
2164
2165 // Get the lock box slot's address.
2166 __ addi(r_box, R1_SP, lock_offset);
2167
2168 # ifdef ASSERT
2169 if (UseBiasedLocking) {
2170 // Making the box point to itself will make it clear it went unused
2171 // but also be obviously invalid.
2172 __ std(r_box, 0, r_box);
2173 }
2174 # endif // ASSERT
2175
2176 // Try fastpath for locking.
2177 // fast_lock kills r_temp_1, r_temp_2, r_temp_3.
2178 __ compiler_fast_lock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2179 __ beq(r_flag, locked);
2180
2181 // None of the above fast optimizations worked so we have to get into the
2182 // slow case of monitor enter. Inline a special case of call_VM that
2183 // disallows any pending_exception.
2184
2185 // Save argument registers and leave room for C-compatible ABI_REG_ARGS.
2186 int frame_size = frame::abi_reg_args_size +
2187 round_to(total_c_args * wordSize, frame::alignment_in_bytes);
2188 __ mr(R11_scratch1, R1_SP);
2189 RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2);
2190
2191 // Do the call.
2192 __ set_last_Java_frame(R11_scratch1, r_return_pc);
2193 assert(r_return_pc->is_nonvolatile(), "expecting return pc to be in non-volatile register");
2194 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread);
2195 __ reset_last_Java_frame();
2196
2197 RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2);
2198
2199 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2200 "no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C", 0);
2201
2202 __ bind(locked);
2203 }
2204
2205
2206 // Publish thread state
2207 // --------------------------------------------------------------------------
2208
2209 // Use that pc we placed in r_return_pc a while back as the current frame anchor.
2210 __ set_last_Java_frame(R1_SP, r_return_pc);
2211
2212 // Transition from _thread_in_Java to _thread_in_native.
2213 __ li(R0, _thread_in_native);
2214 __ release();
2215 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2216 __ stw(R0, thread_(thread_state));
2217 if (UseMembar) {
2218 __ fence();
2219 }
2220
2221
2222 // The JNI call
2223 // --------------------------------------------------------------------------
2224 #if defined(ABI_ELFv2)
2225 __ call_c(native_func, relocInfo::runtime_call_type);
2226 #else
2227 FunctionDescriptor* fd_native_method = (FunctionDescriptor*) native_func;
2228 __ call_c(fd_native_method, relocInfo::runtime_call_type);
2229 #endif
2230
2231
2232 // Now, we are back from the native code.
2233
2234
2235 // Unpack the native result.
2236 // --------------------------------------------------------------------------
2237
2238 // For int-types, we do any needed sign-extension required.
2239 // Care must be taken that the return values (R3_RET and F1_RET)
2240 // will survive any VM calls for blocking or unlocking.
2241 // An OOP result (handle) is done specially in the slow-path code.
2242
2243 switch (ret_type) {
2244 case T_VOID: break; // Nothing to do!
2245 case T_FLOAT: break; // Got it where we want it (unless slow-path).
2246 case T_DOUBLE: break; // Got it where we want it (unless slow-path).
2247 case T_LONG: break; // Got it where we want it (unless slow-path).
2248 case T_OBJECT: break; // Really a handle.
2249 // Cannot de-handlize until after reclaiming jvm_lock.
2250 case T_ARRAY: break;
2251
2252 case T_BOOLEAN: { // 0 -> false(0); !0 -> true(1)
2253 Label skip_modify;
2254 __ cmpwi(CCR0, R3_RET, 0);
2255 __ beq(CCR0, skip_modify);
2256 __ li(R3_RET, 1);
2257 __ bind(skip_modify);
2258 break;
2259 }
2260 case T_BYTE: { // sign extension
2261 __ extsb(R3_RET, R3_RET);
2262 break;
2263 }
2264 case T_CHAR: { // unsigned result
2265 __ andi(R3_RET, R3_RET, 0xffff);
2266 break;
2267 }
2268 case T_SHORT: { // sign extension
2269 __ extsh(R3_RET, R3_RET);
2270 break;
2271 }
2272 case T_INT: // nothing to do
2273 break;
2274 default:
2275 ShouldNotReachHere();
2276 break;
2277 }
2278
2279
2280 // Publish thread state
2281 // --------------------------------------------------------------------------
2282
2283 // Switch thread to "native transition" state before reading the
2284 // synchronization state. This additional state is necessary because reading
2285 // and testing the synchronization state is not atomic w.r.t. GC, as this
2286 // scenario demonstrates:
2287 // - Java thread A, in _thread_in_native state, loads _not_synchronized
2288 // and is preempted.
2289 // - VM thread changes sync state to synchronizing and suspends threads
2290 // for GC.
2291 // - Thread A is resumed to finish this native method, but doesn't block
2292 // here since it didn't see any synchronization in progress, and escapes.
2293
2294 // Transition from _thread_in_native to _thread_in_native_trans.
2295 __ li(R0, _thread_in_native_trans);
2296 __ release();
2297 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2298 __ stw(R0, thread_(thread_state));
2299
2300
2301 // Must we block?
2302 // --------------------------------------------------------------------------
2303
2304 // Block, if necessary, before resuming in _thread_in_Java state.
2305 // In order for GC to work, don't clear the last_Java_sp until after blocking.
2306 Label after_transition;
2307 {
2308 Label no_block, sync;
2309
2310 if (os::is_MP()) {
2311 if (UseMembar) {
2312 // Force this write out before the read below.
2313 __ fence();
2314 } else {
2315 // Write serialization page so VM thread can do a pseudo remote membar.
2316 // We use the current thread pointer to calculate a thread specific
2317 // offset to write to within the page. This minimizes bus traffic
2318 // due to cache line collision.
2319 __ serialize_memory(R16_thread, r_temp_4, r_temp_5);
2320 }
2321 }
2322
2323 Register sync_state_addr = r_temp_4;
2324 Register sync_state = r_temp_5;
2325 Register suspend_flags = r_temp_6;
2326
2327 __ load_const(sync_state_addr, SafepointSynchronize::address_of_state(), /*temp*/ sync_state);
2328
2329 // TODO: PPC port assert(4 == SafepointSynchronize::sz_state(), "unexpected field size");
2330 __ lwz(sync_state, 0, sync_state_addr);
2331
2332 // TODO: PPC port assert(4 == Thread::sz_suspend_flags(), "unexpected field size");
2333 __ lwz(suspend_flags, thread_(suspend_flags));
2334
2335 __ acquire();
2336
2337 Label do_safepoint;
2338 // No synchronization in progress nor yet synchronized.
2339 __ cmpwi(CCR0, sync_state, SafepointSynchronize::_not_synchronized);
2340 // Not suspended.
2341 __ cmpwi(CCR1, suspend_flags, 0);
2342
2343 __ bne(CCR0, sync);
2344 __ beq(CCR1, no_block);
2345
2346 // Block. Save any potential method result value before the operation and
2347 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this
2348 // lets us share the oopMap we used when we went native rather than create
2349 // a distinct one for this pc.
2350 __ bind(sync);
2351
2352 address entry_point = is_critical_native
2353 ? CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)
2354 : CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans);
2355 save_native_result(masm, ret_type, workspace_slot_offset);
2356 __ call_VM_leaf(entry_point, R16_thread);
2357 restore_native_result(masm, ret_type, workspace_slot_offset);
2358
2359 if (is_critical_native) {
2360 __ b(after_transition); // No thread state transition here.
2361 }
2362 __ bind(no_block);
2363 }
2364
2365 // Publish thread state.
2366 // --------------------------------------------------------------------------
2367
2368 // Thread state is thread_in_native_trans. Any safepoint blocking has
2369 // already happened so we can now change state to _thread_in_Java.
2370
2371 // Transition from _thread_in_native_trans to _thread_in_Java.
2372 __ li(R0, _thread_in_Java);
2373 __ release();
2374 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2375 __ stw(R0, thread_(thread_state));
2376 if (UseMembar) {
2377 __ fence();
2378 }
2379 __ bind(after_transition);
2380
2381 // Reguard any pages if necessary.
2382 // --------------------------------------------------------------------------
2383
2384 Label no_reguard;
2385 __ lwz(r_temp_1, thread_(stack_guard_state));
2386 __ cmpwi(CCR0, r_temp_1, JavaThread::stack_guard_yellow_disabled);
2387 __ bne(CCR0, no_reguard);
2388
2389 save_native_result(masm, ret_type, workspace_slot_offset);
2390 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2391 restore_native_result(masm, ret_type, workspace_slot_offset);
2392
2393 __ bind(no_reguard);
2394
2395
2396 // Unlock
2397 // --------------------------------------------------------------------------
2398
2399 if (method->is_synchronized()) {
2400
2401 ConditionRegister r_flag = CCR1;
2402 const Register r_oop = r_temp_4;
2403 const Register r_box = r_temp_5;
2404 const Register r_exception = r_temp_6;
2405 Label done;
2406
2407 // Get oop and address of lock object box.
2408 if (method_is_static) {
2409 assert(klass_offset != -1, "");
2410 __ ld(r_oop, klass_offset, R1_SP);
2411 } else {
2412 assert(receiver_offset != -1, "");
2413 __ ld(r_oop, receiver_offset, R1_SP);
2414 }
2415 __ addi(r_box, R1_SP, lock_offset);
2416
2417 // Try fastpath for unlocking.
2418 __ compiler_fast_unlock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2419 __ beq(r_flag, done);
2420
2421 // Save and restore any potential method result value around the unlocking operation.
2422 save_native_result(masm, ret_type, workspace_slot_offset);
2423
2424 // Must save pending exception around the slow-path VM call. Since it's a
2425 // leaf call, the pending exception (if any) can be kept in a register.
2426 __ ld(r_exception, thread_(pending_exception));
2427 assert(r_exception->is_nonvolatile(), "exception register must be non-volatile");
2428 __ li(R0, 0);
2429 __ std(R0, thread_(pending_exception));
2430
2431 // Slow case of monitor enter.
2432 // Inline a special case of call_VM that disallows any pending_exception.
2433 // Arguments are (oop obj, BasicLock* lock, JavaThread* thread).
2434 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), r_oop, r_box, R16_thread);
2435
2436 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2437 "no pending exception allowed on exit from SharedRuntime::complete_monitor_unlocking_C", 0);
2438
2439 restore_native_result(masm, ret_type, workspace_slot_offset);
2440
2441 // Check_forward_pending_exception jump to forward_exception if any pending
2442 // exception is set. The forward_exception routine expects to see the
2443 // exception in pending_exception and not in a register. Kind of clumsy,
2444 // since all folks who branch to forward_exception must have tested
2445 // pending_exception first and hence have it in a register already.
2446 __ std(r_exception, thread_(pending_exception));
2447
2448 __ bind(done);
2449 }
2450
2451 # if 0
2452 // DTrace method exit
2453 # endif
2454
2455 // Clear "last Java frame" SP and PC.
2456 // --------------------------------------------------------------------------
2457
2458 __ reset_last_Java_frame();
2459
2460 // Unpack oop result.
2461 // --------------------------------------------------------------------------
2462
2463 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2464 Label skip_unboxing;
2465 __ cmpdi(CCR0, R3_RET, 0);
2466 __ beq(CCR0, skip_unboxing);
2467 __ ld(R3_RET, 0, R3_RET);
2468 __ bind(skip_unboxing);
2469 __ verify_oop(R3_RET);
2470 }
2471
2472
2473 // Reset handle block.
2474 // --------------------------------------------------------------------------
2475 if (!is_critical_native) {
2476 __ ld(r_temp_1, thread_(active_handles));
2477 // TODO: PPC port assert(4 == JNIHandleBlock::top_size_in_bytes(), "unexpected field size");
2478 __ li(r_temp_2, 0);
2479 __ stw(r_temp_2, JNIHandleBlock::top_offset_in_bytes(), r_temp_1);
2480
2481
2482 // Check for pending exceptions.
2483 // --------------------------------------------------------------------------
2484 __ ld(r_temp_2, thread_(pending_exception));
2485 __ cmpdi(CCR0, r_temp_2, 0);
2486 __ bne(CCR0, handle_pending_exception);
2487 }
2488
2489 // Return
2490 // --------------------------------------------------------------------------
2491
2492 __ pop_frame();
2493 __ restore_LR_CR(R11);
2494 __ blr();
2495
2496
2497 // Handler for pending exceptions (out-of-line).
2498 // --------------------------------------------------------------------------
2499
2500 // Since this is a native call, we know the proper exception handler
2501 // is the empty function. We just pop this frame and then jump to
2502 // forward_exception_entry.
2503 if (!is_critical_native) {
2504 __ align(InteriorEntryAlignment);
2505 __ bind(handle_pending_exception);
2506
2507 __ pop_frame();
2508 __ restore_LR_CR(R11);
2509 __ b64_patchable((address)StubRoutines::forward_exception_entry(),
2510 relocInfo::runtime_call_type);
2511 }
2512
2513 // Handler for a cache miss (out-of-line).
2514 // --------------------------------------------------------------------------
2515
2516 if (!method_is_static) {
2517 __ align(InteriorEntryAlignment);
2518 __ bind(ic_miss);
2519
2520 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
2521 relocInfo::runtime_call_type);
2522 }
2523
2524 // Done.
2525 // --------------------------------------------------------------------------
2526
2527 __ flush();
2528
2529 nmethod *nm = nmethod::new_native_nmethod(method,
2530 compile_id,
2531 masm->code(),
2532 vep_start_pc-start_pc,
2533 frame_done_pc-start_pc,
2534 stack_slots / VMRegImpl::slots_per_word,
2535 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2536 in_ByteSize(lock_offset),
2537 oop_maps);
2538
2539 if (is_critical_native) {
2540 nm->set_lazy_critical_native(true);
2541 }
2542
2543 return nm;
2544 #else
2545 ShouldNotReachHere();
2546 return NULL;
2547 #endif // COMPILER2
2548 }
2549
2550 // This function returns the adjust size (in number of words) to a c2i adapter
2551 // activation for use during deoptimization.
2552 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2553 return round_to((callee_locals - callee_parameters) * Interpreter::stackElementWords, frame::alignment_in_bytes);
2554 }
2555
2556 uint SharedRuntime::out_preserve_stack_slots() {
2557 #if defined(COMPILER1) || defined(COMPILER2)
2558 return frame::jit_out_preserve_size / VMRegImpl::stack_slot_size;
2559 #else
2560 return 0;
2561 #endif
2562 }
2563
2564 #ifdef COMPILER2
2565 // Frame generation for deopt and uncommon trap blobs.
2566 static void push_skeleton_frame(MacroAssembler* masm, bool deopt,
2567 /* Read */
2568 Register unroll_block_reg,
2569 /* Update */
2570 Register frame_sizes_reg,
2571 Register number_of_frames_reg,
2572 Register pcs_reg,
2573 /* Invalidate */
2574 Register frame_size_reg,
2575 Register pc_reg) {
2576
2577 __ ld(pc_reg, 0, pcs_reg);
2578 __ ld(frame_size_reg, 0, frame_sizes_reg);
2579 __ std(pc_reg, _abi(lr), R1_SP);
2580 __ push_frame(frame_size_reg, R0/*tmp*/);
2581 #ifdef CC_INTERP
2582 __ std(R1_SP, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2583 #else
2584 #ifdef ASSERT
2585 __ load_const_optimized(pc_reg, 0x5afe);
2586 __ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
2587 #endif
2588 __ std(R1_SP, _ijava_state_neg(sender_sp), R1_SP);
2589 #endif // CC_INTERP
2590 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
2591 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
2592 __ addi(pcs_reg, pcs_reg, wordSize);
2593 }
2594
2595 // Loop through the UnrollBlock info and create new frames.
2596 static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
2597 /* read */
2598 Register unroll_block_reg,
2599 /* invalidate */
2600 Register frame_sizes_reg,
2601 Register number_of_frames_reg,
2602 Register pcs_reg,
2603 Register frame_size_reg,
2604 Register pc_reg) {
2605 Label loop;
2606
2607 // _number_of_frames is of type int (deoptimization.hpp)
2608 __ lwa(number_of_frames_reg,
2609 Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(),
2610 unroll_block_reg);
2611 __ ld(pcs_reg,
2612 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(),
2613 unroll_block_reg);
2614 __ ld(frame_sizes_reg,
2615 Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(),
2616 unroll_block_reg);
2617
2618 // stack: (caller_of_deoptee, ...).
2619
2620 // At this point we either have an interpreter frame or a compiled
2621 // frame on top of stack. If it is a compiled frame we push a new c2i
2622 // adapter here
2623
2624 // Memorize top-frame stack-pointer.
2625 __ mr(frame_size_reg/*old_sp*/, R1_SP);
2626
2627 // Resize interpreter top frame OR C2I adapter.
2628
2629 // At this moment, the top frame (which is the caller of the deoptee) is
2630 // an interpreter frame or a newly pushed C2I adapter or an entry frame.
2631 // The top frame has a TOP_IJAVA_FRAME_ABI and the frame contains the
2632 // outgoing arguments.
2633 //
2634 // In order to push the interpreter frame for the deoptee, we need to
2635 // resize the top frame such that we are able to place the deoptee's
2636 // locals in the frame.
2637 // Additionally, we have to turn the top frame's TOP_IJAVA_FRAME_ABI
2638 // into a valid PARENT_IJAVA_FRAME_ABI.
2639
2640 __ lwa(R11_scratch1,
2641 Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(),
2642 unroll_block_reg);
2643 __ neg(R11_scratch1, R11_scratch1);
2644
2645 // R11_scratch1 contains size of locals for frame resizing.
2646 // R12_scratch2 contains top frame's lr.
2647
2648 // Resize frame by complete frame size prevents TOC from being
2649 // overwritten by locals. A more stack space saving way would be
2650 // to copy the TOC to its location in the new abi.
2651 __ addi(R11_scratch1, R11_scratch1, - frame::parent_ijava_frame_abi_size);
2652
2653 // now, resize the frame
2654 __ resize_frame(R11_scratch1, pc_reg/*tmp*/);
2655
2656 // In the case where we have resized a c2i frame above, the optional
2657 // alignment below the locals has size 32 (why?).
2658 __ std(R12_scratch2, _abi(lr), R1_SP);
2659
2660 // Initialize initial_caller_sp.
2661 #ifdef CC_INTERP
2662 __ std(frame_size_reg/*old_sp*/, _parent_ijava_frame_abi(initial_caller_sp), R1_SP);
2663 #else
2664 #ifdef ASSERT
2665 __ load_const_optimized(pc_reg, 0x5afe);
2666 __ std(pc_reg, _ijava_state_neg(ijava_reserved), R1_SP);
2667 #endif
2668 __ std(frame_size_reg, _ijava_state_neg(sender_sp), R1_SP);
2669 #endif // CC_INTERP
2670
2671 #ifdef ASSERT
2672 // Make sure that there is at least one entry in the array.
2673 __ cmpdi(CCR0, number_of_frames_reg, 0);
2674 __ asm_assert_ne("array_size must be > 0", 0x205);
2675 #endif
2676
2677 // Now push the new interpreter frames.
2678 //
2679 __ bind(loop);
2680 // Allocate a new frame, fill in the pc.
2681 push_skeleton_frame(masm, deopt,
2682 unroll_block_reg,
2683 frame_sizes_reg,
2684 number_of_frames_reg,
2685 pcs_reg,
2686 frame_size_reg,
2687 pc_reg);
2688 __ cmpdi(CCR0, number_of_frames_reg, 0);
2689 __ bne(CCR0, loop);
2690
2691 // Get the return address pointing into the frame manager.
2692 __ ld(R0, 0, pcs_reg);
2693 // Store it in the top interpreter frame.
2694 __ std(R0, _abi(lr), R1_SP);
2695 // Initialize frame_manager_lr of interpreter top frame.
2696 #ifdef CC_INTERP
2697 __ std(R0, _top_ijava_frame_abi(frame_manager_lr), R1_SP);
2698 #endif
2699 }
2700 #endif
2701
2702 void SharedRuntime::generate_deopt_blob() {
2703 // Allocate space for the code
2704 ResourceMark rm;
2705 // Setup code generation tools
2706 CodeBuffer buffer("deopt_blob", 2048, 1024);
2707 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2708 Label exec_mode_initialized;
2709 int frame_size_in_words;
2710 OopMap* map = NULL;
2711 OopMapSet *oop_maps = new OopMapSet();
2712
2713 // size of ABI112 plus spill slots for R3_RET and F1_RET.
2714 const int frame_size_in_bytes = frame::abi_reg_args_spill_size;
2715 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
2716 int first_frame_size_in_bytes = 0; // frame size of "unpack frame" for call to fetch_unroll_info.
2717
2718 const Register exec_mode_reg = R21_tmp1;
2719
2720 const address start = __ pc();
2721
2722 #ifdef COMPILER2
2723 // --------------------------------------------------------------------------
2724 // Prolog for non exception case!
2725
2726 // We have been called from the deopt handler of the deoptee.
2727 //
2728 // deoptee:
2729 // ...
2730 // call X
2731 // ...
2732 // deopt_handler: call_deopt_stub
2733 // cur. return pc --> ...
2734 //
2735 // So currently SR_LR points behind the call in the deopt handler.
2736 // We adjust it such that it points to the start of the deopt handler.
2737 // The return_pc has been stored in the frame of the deoptee and
2738 // will replace the address of the deopt_handler in the call
2739 // to Deoptimization::fetch_unroll_info below.
2740 // We can't grab a free register here, because all registers may
2741 // contain live values, so let the RegisterSaver do the adjustment
2742 // of the return pc.
2743 const int return_pc_adjustment_no_exception = -HandlerImpl::size_deopt_handler();
2744
2745 // Push the "unpack frame"
2746 // Save everything in sight.
2747 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2748 &first_frame_size_in_bytes,
2749 /*generate_oop_map=*/ true,
2750 return_pc_adjustment_no_exception,
2751 RegisterSaver::return_pc_is_lr);
2752 assert(map != NULL, "OopMap must have been created");
2753
2754 __ li(exec_mode_reg, Deoptimization::Unpack_deopt);
2755 // Save exec mode for unpack_frames.
2756 __ b(exec_mode_initialized);
2757
2758 // --------------------------------------------------------------------------
2759 // Prolog for exception case
2760
2761 // An exception is pending.
2762 // We have been called with a return (interpreter) or a jump (exception blob).
2763 //
2764 // - R3_ARG1: exception oop
2765 // - R4_ARG2: exception pc
2766
2767 int exception_offset = __ pc() - start;
2768
2769 BLOCK_COMMENT("Prolog for exception case");
2770
2771 // The RegisterSaves doesn't need to adjust the return pc for this situation.
2772 const int return_pc_adjustment_exception = 0;
2773
2774 // Push the "unpack frame".
2775 // Save everything in sight.
2776 assert(R4 == R4_ARG2, "exception pc must be in r4");
2777 RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2778 &first_frame_size_in_bytes,
2779 /*generate_oop_map=*/ false,
2780 return_pc_adjustment_exception,
2781 RegisterSaver::return_pc_is_r4);
2782
2783 // Deopt during an exception. Save exec mode for unpack_frames.
2784 __ li(exec_mode_reg, Deoptimization::Unpack_exception);
2785
2786 // Store exception oop and pc in thread (location known to GC).
2787 // This is needed since the call to "fetch_unroll_info()" may safepoint.
2788 __ std(R3_ARG1, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2789 __ std(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2790
2791 // fall through
2792
2793 // --------------------------------------------------------------------------
2794 __ BIND(exec_mode_initialized);
2795
2796 {
2797 const Register unroll_block_reg = R22_tmp2;
2798
2799 // We need to set `last_Java_frame' because `fetch_unroll_info' will
2800 // call `last_Java_frame()'. The value of the pc in the frame is not
2801 // particularly important. It just needs to identify this blob.
2802 __ set_last_Java_frame(R1_SP, noreg);
2803
2804 // With EscapeAnalysis turned on, this call may safepoint!
2805 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), R16_thread);
2806 address calls_return_pc = __ last_calls_return_pc();
2807 // Set an oopmap for the call site that describes all our saved registers.
2808 oop_maps->add_gc_map(calls_return_pc - start, map);
2809
2810 __ reset_last_Java_frame();
2811 // Save the return value.
2812 __ mr(unroll_block_reg, R3_RET);
2813
2814 // Restore only the result registers that have been saved
2815 // by save_volatile_registers(...).
2816 RegisterSaver::restore_result_registers(masm, first_frame_size_in_bytes);
2817
2818 // In excp_deopt_mode, restore and clear exception oop which we
2819 // stored in the thread during exception entry above. The exception
2820 // oop will be the return value of this stub.
2821 Label skip_restore_excp;
2822 __ cmpdi(CCR0, exec_mode_reg, Deoptimization::Unpack_exception);
2823 __ bne(CCR0, skip_restore_excp);
2824 __ ld(R3_RET, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2825 __ ld(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2826 __ li(R0, 0);
2827 __ std(R0, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2828 __ std(R0, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2829 __ BIND(skip_restore_excp);
2830
2831 __ pop_frame();
2832
2833 // stack: (deoptee, optional i2c, caller of deoptee, ...).
2834
2835 // pop the deoptee's frame
2836 __ pop_frame();
2837
2838 // stack: (caller_of_deoptee, ...).
2839
2840 // Loop through the `UnrollBlock' info and create interpreter frames.
2841 push_skeleton_frames(masm, true/*deopt*/,
2842 unroll_block_reg,
2843 R23_tmp3,
2844 R24_tmp4,
2845 R25_tmp5,
2846 R26_tmp6,
2847 R27_tmp7);
2848
2849 // stack: (skeletal interpreter frame, ..., optional skeletal
2850 // interpreter frame, optional c2i, caller of deoptee, ...).
2851 }
2852
2853 // push an `unpack_frame' taking care of float / int return values.
2854 __ push_frame(frame_size_in_bytes, R0/*tmp*/);
2855
2856 // stack: (unpack frame, skeletal interpreter frame, ..., optional
2857 // skeletal interpreter frame, optional c2i, caller of deoptee,
2858 // ...).
2859
2860 // Spill live volatile registers since we'll do a call.
2861 __ std( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2862 __ stfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2863
2864 // Let the unpacker layout information in the skeletal frames just
2865 // allocated.
2866 __ get_PC_trash_LR(R3_RET);
2867 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R3_RET);
2868 // This is a call to a LEAF method, so no oop map is required.
2869 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
2870 R16_thread/*thread*/, exec_mode_reg/*exec_mode*/);
2871 __ reset_last_Java_frame();
2872
2873 // Restore the volatiles saved above.
2874 __ ld( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
2875 __ lfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
2876
2877 // Pop the unpack frame.
2878 __ pop_frame();
2879 __ restore_LR_CR(R0);
2880
2881 // stack: (top interpreter frame, ..., optional interpreter frame,
2882 // optional c2i, caller of deoptee, ...).
2883
2884 // Initialize R14_state.
2885 #ifdef CC_INTERP
2886 __ ld(R14_state, 0, R1_SP);
2887 __ addi(R14_state, R14_state, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
2888 // Also inititialize R15_prev_state.
2889 __ restore_prev_state();
2890 #else
2891 __ restore_interpreter_state(R11_scratch1);
2892 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
2893 #endif // CC_INTERP
2894
2895
2896 // Return to the interpreter entry point.
2897 __ blr();
2898 __ flush();
2899 #else // COMPILER2
2900 __ unimplemented("deopt blob needed only with compiler");
2901 int exception_offset = __ pc() - start;
2902 #endif // COMPILER2
2903
2904 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, 0, first_frame_size_in_bytes / wordSize);
2905 }
2906
2907 #ifdef COMPILER2
2908 void SharedRuntime::generate_uncommon_trap_blob() {
2909 // Allocate space for the code.
2910 ResourceMark rm;
2911 // Setup code generation tools.
2912 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2913 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2914 address start = __ pc();
2915
2916 Register unroll_block_reg = R21_tmp1;
2917 Register klass_index_reg = R22_tmp2;
2918 Register unc_trap_reg = R23_tmp3;
2919
2920 OopMapSet* oop_maps = new OopMapSet();
2921 int frame_size_in_bytes = frame::abi_reg_args_size;
2922 OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
2923
2924 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
2925
2926 // Push a dummy `unpack_frame' and call
2927 // `Deoptimization::uncommon_trap' to pack the compiled frame into a
2928 // vframe array and return the `UnrollBlock' information.
2929
2930 // Save LR to compiled frame.
2931 __ save_LR_CR(R11_scratch1);
2932
2933 // Push an "uncommon_trap" frame.
2934 __ push_frame_reg_args(0, R11_scratch1);
2935
2936 // stack: (unpack frame, deoptee, optional i2c, caller_of_deoptee, ...).
2937
2938 // Set the `unpack_frame' as last_Java_frame.
2939 // `Deoptimization::uncommon_trap' expects it and considers its
2940 // sender frame as the deoptee frame.
2941 // Remember the offset of the instruction whose address will be
2942 // moved to R11_scratch1.
2943 address gc_map_pc = __ get_PC_trash_LR(R11_scratch1);
2944
2945 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
2946
2947 __ mr(klass_index_reg, R3);
2948 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap),
2949 R16_thread, klass_index_reg);
2950
2951 // Set an oopmap for the call site.
2952 oop_maps->add_gc_map(gc_map_pc - start, map);
2953
2954 __ reset_last_Java_frame();
2955
2956 // Pop the `unpack frame'.
2957 __ pop_frame();
2958
2959 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
2960
2961 // Save the return value.
2962 __ mr(unroll_block_reg, R3_RET);
2963
2964 // Pop the uncommon_trap frame.
2965 __ pop_frame();
2966
2967 // stack: (caller_of_deoptee, ...).
2968
2969 // Allocate new interpreter frame(s) and possibly a c2i adapter
2970 // frame.
2971 push_skeleton_frames(masm, false/*deopt*/,
2972 unroll_block_reg,
2973 R22_tmp2,
2974 R23_tmp3,
2975 R24_tmp4,
2976 R25_tmp5,
2977 R26_tmp6);
2978
2979 // stack: (skeletal interpreter frame, ..., optional skeletal
2980 // interpreter frame, optional c2i, caller of deoptee, ...).
2981
2982 // Push a dummy `unpack_frame' taking care of float return values.
2983 // Call `Deoptimization::unpack_frames' to layout information in the
2984 // interpreter frames just created.
2985
2986 // Push a simple "unpack frame" here.
2987 __ push_frame_reg_args(0, R11_scratch1);
2988
2989 // stack: (unpack frame, skeletal interpreter frame, ..., optional
2990 // skeletal interpreter frame, optional c2i, caller of deoptee,
2991 // ...).
2992
2993 // Set the "unpack_frame" as last_Java_frame.
2994 __ get_PC_trash_LR(R11_scratch1);
2995 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
2996
2997 // Indicate it is the uncommon trap case.
2998 __ li(unc_trap_reg, Deoptimization::Unpack_uncommon_trap);
2999 // Let the unpacker layout information in the skeletal frames just
3000 // allocated.
3001 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
3002 R16_thread, unc_trap_reg);
3003
3004 __ reset_last_Java_frame();
3005 // Pop the `unpack frame'.
3006 __ pop_frame();
3007 // Restore LR from top interpreter frame.
3008 __ restore_LR_CR(R11_scratch1);
3009
3010 // stack: (top interpreter frame, ..., optional interpreter frame,
3011 // optional c2i, caller of deoptee, ...).
3012
3013 #ifdef CC_INTERP
3014 // Initialize R14_state, ...
3015 __ ld(R11_scratch1, 0, R1_SP);
3016 __ addi(R14_state, R11_scratch1, -frame::interpreter_frame_cinterpreterstate_size_in_bytes());
3017 // also initialize R15_prev_state.
3018 __ restore_prev_state();
3019 #else
3020 __ restore_interpreter_state(R11_scratch1);
3021 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
3022 #endif // CC_INTERP
3023
3024 // Return to the interpreter entry point.
3025 __ blr();
3026
3027 masm->flush();
3028
3029 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, frame_size_in_bytes/wordSize);
3030 }
3031 #endif // COMPILER2
3032
3033 // Generate a special Compile2Runtime blob that saves all registers, and setup oopmap.
3034 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3035 assert(StubRoutines::forward_exception_entry() != NULL,
3036 "must be generated before");
3037
3038 ResourceMark rm;
3039 OopMapSet *oop_maps = new OopMapSet();
3040 OopMap* map;
3041
3042 // Allocate space for the code. Setup code generation tools.
3043 CodeBuffer buffer("handler_blob", 2048, 1024);
3044 MacroAssembler* masm = new MacroAssembler(&buffer);
3045
3046 address start = __ pc();
3047 int frame_size_in_bytes = 0;
3048
3049 RegisterSaver::ReturnPCLocation return_pc_location;
3050 bool cause_return = (poll_type == POLL_AT_RETURN);
3051 if (cause_return) {
3052 // Nothing to do here. The frame has already been popped in MachEpilogNode.
3053 // Register LR already contains the return pc.
3054 return_pc_location = RegisterSaver::return_pc_is_lr;
3055 } else {
3056 // Use thread()->saved_exception_pc() as return pc.
3057 return_pc_location = RegisterSaver::return_pc_is_thread_saved_exception_pc;
3058 }
3059
3060 // Save registers, fpu state, and flags.
3061 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3062 &frame_size_in_bytes,
3063 /*generate_oop_map=*/ true,
3064 /*return_pc_adjustment=*/0,
3065 return_pc_location);
3066
3067 // The following is basically a call_VM. However, we need the precise
3068 // address of the call in order to generate an oopmap. Hence, we do all the
3069 // work outselves.
3070 __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg);
3071
3072 // The return address must always be correct so that the frame constructor
3073 // never sees an invalid pc.
3074
3075 // Do the call
3076 __ call_VM_leaf(call_ptr, R16_thread);
3077 address calls_return_pc = __ last_calls_return_pc();
3078
3079 // Set an oopmap for the call site. This oopmap will map all
3080 // oop-registers and debug-info registers as callee-saved. This
3081 // will allow deoptimization at this safepoint to find all possible
3082 // debug-info recordings, as well as let GC find all oops.
3083 oop_maps->add_gc_map(calls_return_pc - start, map);
3084
3085 Label noException;
3086
3087 // Clear the last Java frame.
3088 __ reset_last_Java_frame();
3089
3090 BLOCK_COMMENT(" Check pending exception.");
3091 const Register pending_exception = R0;
3092 __ ld(pending_exception, thread_(pending_exception));
3093 __ cmpdi(CCR0, pending_exception, 0);
3094 __ beq(CCR0, noException);
3095
3096 // Exception pending
3097 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3098 frame_size_in_bytes,
3099 /*restore_ctr=*/true);
3100
3101 BLOCK_COMMENT(" Jump to forward_exception_entry.");
3102 // Jump to forward_exception_entry, with the issuing PC in LR
3103 // so it looks like the original nmethod called forward_exception_entry.
3104 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3105
3106 // No exception case.
3107 __ BIND(noException);
3108
3109
3110 // Normal exit, restore registers and exit.
3111 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3112 frame_size_in_bytes,
3113 /*restore_ctr=*/true);
3114
3115 __ blr();
3116
3117 // Make sure all code is generated
3118 masm->flush();
3119
3120 // Fill-out other meta info
3121 // CodeBlob frame size is in words.
3122 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_bytes / wordSize);
3123 }
3124
3125 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss)
3126 //
3127 // Generate a stub that calls into the vm to find out the proper destination
3128 // of a java call. All the argument registers are live at this point
3129 // but since this is generic code we don't know what they are and the caller
3130 // must do any gc of the args.
3131 //
3132 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3133
3134 // allocate space for the code
3135 ResourceMark rm;
3136
3137 CodeBuffer buffer(name, 1000, 512);
3138 MacroAssembler* masm = new MacroAssembler(&buffer);
3139
3140 int frame_size_in_bytes;
3141
3142 OopMapSet *oop_maps = new OopMapSet();
3143 OopMap* map = NULL;
3144
3145 address start = __ pc();
3146
3147 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3148 &frame_size_in_bytes,
3149 /*generate_oop_map*/ true,
3150 /*return_pc_adjustment*/ 0,
3151 RegisterSaver::return_pc_is_lr);
3152
3153 // Use noreg as last_Java_pc, the return pc will be reconstructed
3154 // from the physical frame.
3155 __ set_last_Java_frame(/*sp*/R1_SP, noreg);
3156
3157 int frame_complete = __ offset();
3158
3159 // Pass R19_method as 2nd (optional) argument, used by
3160 // counter_overflow_stub.
3161 __ call_VM_leaf(destination, R16_thread, R19_method);
3162 address calls_return_pc = __ last_calls_return_pc();
3163 // Set an oopmap for the call site.
3164 // We need this not only for callee-saved registers, but also for volatile
3165 // registers that the compiler might be keeping live across a safepoint.
3166 // Create the oopmap for the call's return pc.
3167 oop_maps->add_gc_map(calls_return_pc - start, map);
3168
3169 // R3_RET contains the address we are going to jump to assuming no exception got installed.
3170
3171 // clear last_Java_sp
3172 __ reset_last_Java_frame();
3173
3174 // Check for pending exceptions.
3175 BLOCK_COMMENT("Check for pending exceptions.");
3176 Label pending;
3177 __ ld(R11_scratch1, thread_(pending_exception));
3178 __ cmpdi(CCR0, R11_scratch1, 0);
3179 __ bne(CCR0, pending);
3180
3181 __ mtctr(R3_RET); // Ctr will not be touched by restore_live_registers_and_pop_frame.
3182
3183 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ false);
3184
3185 // Get the returned method.
3186 __ get_vm_result_2(R19_method);
3187
3188 __ bctr();
3189
3190
3191 // Pending exception after the safepoint.
3192 __ BIND(pending);
3193
3194 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ true);
3195
3196 // exception pending => remove activation and forward to exception handler
3197
3198 __ li(R11_scratch1, 0);
3199 __ ld(R3_ARG1, thread_(pending_exception));
3200 __ std(R11_scratch1, in_bytes(JavaThread::vm_result_offset()), R16_thread);
3201 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3202
3203 // -------------
3204 // Make sure all code is generated.
3205 masm->flush();
3206
3207 // return the blob
3208 // frame_size_words or bytes??
3209 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_bytes/wordSize,
3210 oop_maps, true);
3211 }