145 public:
146 enum {
147 #ifndef AMD64
148 number_of_registers = 8,
149 max_slots_per_register = 16 // 512-bit
150 #else
151 number_of_registers = 32,
152 max_slots_per_register = 16 // 512-bit
153 #endif // AMD64
154 };
155
156 // construction
157 friend XMMRegister as_XMMRegister(int encoding);
158
159 inline VMReg as_VMReg();
160
161 // derived registers, offsets, and addresses
162 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
163
164 // accessors
165 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this )); return (intptr_t)this; }
166 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
167 const char* name() const;
168 };
169
170
171 // The XMM registers, for P3 and up chips
172 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1));
173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0));
174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1));
175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2));
176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3));
177 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4));
178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5));
179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6));
180 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7));
181 #ifdef AMD64
182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8));
183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9));
184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10));
185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11));
228 return (KRegister)(intptr_t)encoding;
229 }
230
231 // The implementation of XMM registers for the IA32 architecture
232 class KRegisterImpl : public AbstractRegisterImpl {
233 public:
234 enum {
235 number_of_registers = 8,
236 max_slots_per_register = 1
237 };
238
239 // construction
240 friend KRegister as_KRegister(int encoding);
241
242 inline VMReg as_VMReg();
243
244 // derived registers, offsets, and addresses
245 KRegister successor() const { return as_KRegister(encoding() + 1); }
246
247 // accessors
248 int encoding() const { assert(is_valid(), err_msg("invalid register (%d)", (int)(intptr_t)this)); return (intptr_t)this; }
249 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
250 const char* name() const;
251 };
252
253 // The Mask registers, for AVX3 enabled and up chips
254 CONSTANT_REGISTER_DECLARATION(KRegister, knoreg, (-1));
255 CONSTANT_REGISTER_DECLARATION(KRegister, k0, (0));
256 CONSTANT_REGISTER_DECLARATION(KRegister, k1, (1));
257 CONSTANT_REGISTER_DECLARATION(KRegister, k2, (2));
258 CONSTANT_REGISTER_DECLARATION(KRegister, k3, (3));
259 CONSTANT_REGISTER_DECLARATION(KRegister, k4, (4));
260 CONSTANT_REGISTER_DECLARATION(KRegister, k5, (5));
261 CONSTANT_REGISTER_DECLARATION(KRegister, k6, (6));
262 CONSTANT_REGISTER_DECLARATION(KRegister, k7, (7));
263
264 // Need to know the total number of registers of all sorts for SharedInfo.
265 // Define a class that exports it.
266 class ConcreteRegisterImpl : public AbstractRegisterImpl {
267 public:
268 enum {
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145 public:
146 enum {
147 #ifndef AMD64
148 number_of_registers = 8,
149 max_slots_per_register = 16 // 512-bit
150 #else
151 number_of_registers = 32,
152 max_slots_per_register = 16 // 512-bit
153 #endif // AMD64
154 };
155
156 // construction
157 friend XMMRegister as_XMMRegister(int encoding);
158
159 inline VMReg as_VMReg();
160
161 // derived registers, offsets, and addresses
162 XMMRegister successor() const { return as_XMMRegister(encoding() + 1); }
163
164 // accessors
165 int encoding() const { assert(is_valid(), "invalid register (%d)", (int)(intptr_t)this ); return (intptr_t)this; }
166 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
167 const char* name() const;
168 };
169
170
171 // The XMM registers, for P3 and up chips
172 CONSTANT_REGISTER_DECLARATION(XMMRegister, xnoreg , (-1));
173 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm0 , ( 0));
174 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm1 , ( 1));
175 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm2 , ( 2));
176 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm3 , ( 3));
177 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm4 , ( 4));
178 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm5 , ( 5));
179 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6));
180 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm7 , ( 7));
181 #ifdef AMD64
182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm8, (8));
183 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm9, (9));
184 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm10, (10));
185 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm11, (11));
228 return (KRegister)(intptr_t)encoding;
229 }
230
231 // The implementation of XMM registers for the IA32 architecture
232 class KRegisterImpl : public AbstractRegisterImpl {
233 public:
234 enum {
235 number_of_registers = 8,
236 max_slots_per_register = 1
237 };
238
239 // construction
240 friend KRegister as_KRegister(int encoding);
241
242 inline VMReg as_VMReg();
243
244 // derived registers, offsets, and addresses
245 KRegister successor() const { return as_KRegister(encoding() + 1); }
246
247 // accessors
248 int encoding() const { assert(is_valid(), "invalid register (%d)", (int)(intptr_t)this); return (intptr_t)this; }
249 bool is_valid() const { return 0 <= (intptr_t)this && (intptr_t)this < number_of_registers; }
250 const char* name() const;
251 };
252
253 // The Mask registers, for AVX3 enabled and up chips
254 CONSTANT_REGISTER_DECLARATION(KRegister, knoreg, (-1));
255 CONSTANT_REGISTER_DECLARATION(KRegister, k0, (0));
256 CONSTANT_REGISTER_DECLARATION(KRegister, k1, (1));
257 CONSTANT_REGISTER_DECLARATION(KRegister, k2, (2));
258 CONSTANT_REGISTER_DECLARATION(KRegister, k3, (3));
259 CONSTANT_REGISTER_DECLARATION(KRegister, k4, (4));
260 CONSTANT_REGISTER_DECLARATION(KRegister, k5, (5));
261 CONSTANT_REGISTER_DECLARATION(KRegister, k6, (6));
262 CONSTANT_REGISTER_DECLARATION(KRegister, k7, (7));
263
264 // Need to know the total number of registers of all sorts for SharedInfo.
265 // Define a class that exports it.
266 class ConcreteRegisterImpl : public AbstractRegisterImpl {
267 public:
268 enum {
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