--- old/src/os_cpu/solaris_sparc/vm/solaris_sparc.il	2015-01-22 17:49:03.249923521 -0500
+++ new/src/os_cpu/solaris_sparc/vm/solaris_sparc.il	2015-01-22 17:49:01.953848443 -0500
@@ -19,7 +19,7 @@
 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 // or visit www.oracle.com if you need additional information or have any
 // questions.
-//  
+//
 //
 
   // Get the raw thread ID from %g7
@@ -35,11 +35,11 @@
   // Clear SPARC fprs.FEF DU and DL bits --
   // allows the kernel to avoid saving FPU state at context-switch time.
   // Use for state-transition points (into _thread_blocked) or when
-  // parking. 
-      
+  // parking.
+
        .inline _mark_fpu_nosave, 0
        .volatile
-       wr   %g0, 0, %fprs       
+       wr   %g0, 0, %fprs
        .nonvolatile
        .end
 
@@ -85,7 +85,7 @@
 
 
   // Support for jint Atomic::cmpxchg(jint           exchange_value,
-  //                                  volatile jint* dest, 
+  //                                  volatile jint* dest,
   //                                  jint           compare_value)
   //
   // Arguments:
@@ -103,8 +103,8 @@
         .end
 
 
-  // Support for intptr_t Atomic::cmpxchg_ptr(intptr_t           exchange_value, 
-  //                                          volatile intptr_t* dest, 
+  // Support for intptr_t Atomic::cmpxchg_ptr(intptr_t           exchange_value,
+  //                                          volatile intptr_t* dest,
   //                                          intptr_t           compare_value)
   //
   // 64-bit
@@ -124,8 +124,8 @@
         .end
 
 
-  // Support for jlong Atomic::cmpxchg(jlong           exchange_value, 
-  //                                   volatile jlong* dest, 
+  // Support for jlong Atomic::cmpxchg(jlong           exchange_value,
+  //                                   volatile jlong* dest,
   //                                   jlong           compare_value)
   //
   // 32-bit calling conventions
@@ -220,27 +220,6 @@
         .nonvolatile
         .end
 
-
-  // Support for void OrderAccess::acquire()
-  // The method is intentionally empty.  
-  // It exists for the sole purpose of generating
-  // a C/C++ sequence point over which the compiler won't 
-  // reorder code.
-
-        .inline _OrderAccess_acquire,0
-        .volatile
-        .nonvolatile
-        .end
-
-
-  // Support for void OrderAccess::fence()
-
-        .inline _OrderAccess_fence,0
-        .volatile
-        membar  #StoreLoad
-        .nonvolatile
-        .end
-
 
   // Support for void Prefetch::read(void *loc, intx interval)
   //