1 /*
   2  * Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "assembler_arm.inline.hpp"
  28 #include "memory/resourceArea.hpp"
  29 #include "prims/jniFastGetField.hpp"
  30 #include "prims/jvm_misc.hpp"
  31 #include "runtime/safepoint.hpp"
  32 
  33 #define __ masm->
  34 
  35 #define BUFFER_SIZE  96
  36 
  37 address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) {
  38   const char* name = NULL;
  39   address slow_case_addr = NULL;
  40   switch (type) {
  41     case T_BOOLEAN:
  42       name = "jni_fast_GetBooleanField";
  43       slow_case_addr = jni_GetBooleanField_addr();
  44       break;
  45     case T_BYTE:
  46       name = "jni_fast_GetByteField";
  47       slow_case_addr = jni_GetByteField_addr();
  48       break;
  49     case T_CHAR:
  50       name = "jni_fast_GetCharField";
  51       slow_case_addr = jni_GetCharField_addr();
  52       break;
  53     case T_SHORT:
  54       name = "jni_fast_GetShortField";
  55       slow_case_addr = jni_GetShortField_addr();
  56       break;
  57     case T_INT:
  58       name = "jni_fast_GetIntField";
  59       slow_case_addr = jni_GetIntField_addr();
  60       break;
  61     case T_LONG:
  62       name = "jni_fast_GetLongField";
  63       slow_case_addr = jni_GetLongField_addr();
  64       break;
  65     case T_FLOAT:
  66       name = "jni_fast_GetFloatField";
  67       slow_case_addr = jni_GetFloatField_addr();
  68       break;
  69     case T_DOUBLE:
  70       name = "jni_fast_GetDoubleField";
  71       slow_case_addr = jni_GetDoubleField_addr();
  72       break;
  73     default:
  74       ShouldNotReachHere();
  75   }
  76 
  77   // R0 - jni env
  78   // R1 - object handle
  79   // R2 - jfieldID
  80 
  81   const Register Rsafepoint_counter_addr = AARCH64_ONLY(R4) NOT_AARCH64(R3);
  82   const Register Robj = AARCH64_ONLY(R5) NOT_AARCH64(R1);
  83   const Register Rres = AARCH64_ONLY(R6) NOT_AARCH64(R0);
  84 #ifndef AARCH64
  85   const Register Rres_hi = R1;
  86 #endif // !AARCH64
  87   const Register Rsafept_cnt = Rtemp;
  88   const Register Rsafept_cnt2 = Rsafepoint_counter_addr;
  89   const Register Rtmp1 = AARCH64_ONLY(R7) NOT_AARCH64(R3); // same as Rsafepoint_counter_addr on 32-bit ARM
  90   const Register Rtmp2 = AARCH64_ONLY(R8) NOT_AARCH64(R2); // same as jfieldID on 32-bit ARM
  91 
  92 #ifdef AARCH64
  93   assert_different_registers(Rsafepoint_counter_addr, Rsafept_cnt, Robj, Rres, Rtmp1, Rtmp2, R0, R1, R2, LR);
  94   assert_different_registers(Rsafept_cnt2, Rsafept_cnt, Rres, R0, R1, R2, LR);
  95 #else
  96   assert_different_registers(Rsafepoint_counter_addr, Rsafept_cnt, Robj, Rres, LR);
  97   assert_different_registers(Rsafept_cnt, R1, R2, Rtmp1, LR);
  98   assert_different_registers(Rsafepoint_counter_addr, Rsafept_cnt, Rres, Rres_hi, Rtmp2, LR);
  99   assert_different_registers(Rsafept_cnt2, Rsafept_cnt, Rres, Rres_hi, LR);
 100 #endif // AARCH64
 101 
 102   address fast_entry;
 103 
 104   ResourceMark rm;
 105   BufferBlob* blob = BufferBlob::create(name, BUFFER_SIZE);
 106   CodeBuffer cbuf(blob);
 107   MacroAssembler* masm = new MacroAssembler(&cbuf);
 108   fast_entry = __ pc();
 109 
 110   // Safepoint check
 111   InlinedAddress safepoint_counter_addr(SafepointSynchronize::safepoint_counter_addr());
 112   Label slow_case;
 113   __ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
 114 
 115 #ifndef AARCH64
 116   __ push(RegisterSet(R0, R3));  // save incoming arguments for slow case
 117 #endif // !AARCH64
 118 
 119   __ ldr_s32(Rsafept_cnt, Address(Rsafepoint_counter_addr));
 120   __ tbnz(Rsafept_cnt, 0, slow_case);
 121 
 122 #ifdef AARCH64
 123   // If mask changes we need to ensure that the inverse is still encodable as an immediate
 124   STATIC_ASSERT(JNIHandles::weak_tag_mask == 1);
 125   __ andr(R1, R1, ~JNIHandles::weak_tag_mask);
 126 #else
 127   __ bic(R1, R1, JNIHandles::weak_tag_mask);
 128 #endif
 129 
 130   // Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
 131   __ andr(Rtmp1, Rsafept_cnt, (unsigned)1);
 132   __ ldr(Robj, Address(R1, Rtmp1));
 133 
 134 #ifdef AARCH64
 135   __ add(Robj, Robj, AsmOperand(R2, lsr, 2));
 136   Address field_addr = Address(Robj);
 137 #else
 138   Address field_addr;
 139   if (type != T_BOOLEAN
 140       && type != T_INT
 141 #ifndef __ABI_HARD__
 142       && type != T_FLOAT
 143 #endif // !__ABI_HARD__
 144       ) {
 145     // Only ldr and ldrb support embedded shift, other loads do not
 146     __ add(Robj, Robj, AsmOperand(R2, lsr, 2));
 147     field_addr = Address(Robj);
 148   } else {
 149     field_addr = Address(Robj, R2, lsr, 2);
 150   }
 151 #endif // AARCH64
 152   assert(count < LIST_CAPACITY, "LIST_CAPACITY too small");
 153   speculative_load_pclist[count] = __ pc();
 154 
 155   switch (type) {
 156     case T_BOOLEAN:
 157       __ ldrb(Rres, field_addr);
 158       break;
 159     case T_BYTE:
 160       __ ldrsb(Rres, field_addr);
 161       break;
 162     case T_CHAR:
 163       __ ldrh(Rres, field_addr);
 164       break;
 165     case T_SHORT:
 166       __ ldrsh(Rres, field_addr);
 167       break;
 168     case T_INT:
 169 #ifndef __ABI_HARD__
 170     case T_FLOAT:
 171 #endif
 172       __ ldr_s32(Rres, field_addr);
 173       break;
 174     case T_LONG:
 175 #ifndef __ABI_HARD__
 176     case T_DOUBLE:
 177 #endif
 178 #ifdef AARCH64
 179       __ ldr(Rres, field_addr);
 180 #else
 181       // Safe to use ldrd since long and double fields are 8-byte aligned
 182       __ ldrd(Rres, field_addr);
 183 #endif // AARCH64
 184       break;
 185 #ifdef __ABI_HARD__
 186     case T_FLOAT:
 187       __ ldr_float(S0, field_addr);
 188       break;
 189     case T_DOUBLE:
 190       __ ldr_double(D0, field_addr);
 191       break;
 192 #endif // __ABI_HARD__
 193     default:
 194       ShouldNotReachHere();
 195   }
 196 
 197   // Address dependency restricts memory access ordering. It's cheaper than explicit LoadLoad barrier
 198 #if defined(__ABI_HARD__) && !defined(AARCH64)
 199   if (type == T_FLOAT || type == T_DOUBLE) {
 200     __ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
 201     __ fmrrd(Rres, Rres_hi, D0);
 202     __ eor(Rtmp2, Rres, Rres);
 203     __ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr, Rtmp2));
 204   } else
 205 #endif // __ABI_HARD__ && !AARCH64
 206   {
 207 #ifndef AARCH64
 208     __ ldr_literal(Rsafepoint_counter_addr, safepoint_counter_addr);
 209 #endif // !AARCH64
 210     __ eor(Rtmp2, Rres, Rres);
 211     __ ldr_s32(Rsafept_cnt2, Address(Rsafepoint_counter_addr, Rtmp2));
 212   }
 213   __ cmp(Rsafept_cnt2, Rsafept_cnt);
 214 #ifdef AARCH64
 215   __ b(slow_case, ne);
 216   __ mov(R0, Rres);
 217   __ ret();
 218 #else
 219   // discards saved R0 R1 R2 R3
 220   __ add(SP, SP, 4 * wordSize, eq);
 221   __ bx(LR, eq);
 222 #endif // AARCH64
 223 
 224   slowcase_entry_pclist[count++] = __ pc();
 225 
 226   __ bind(slow_case);
 227 #ifndef AARCH64
 228   __ pop(RegisterSet(R0, R3));
 229 #endif // !AARCH64
 230   // thumb mode switch handled by MacroAssembler::jump if needed
 231   __ jump(slow_case_addr, relocInfo::none, Rtemp);
 232 
 233   __ bind_literal(safepoint_counter_addr);
 234 
 235   __ flush();
 236 
 237   guarantee((__ pc() - fast_entry) <= BUFFER_SIZE, "BUFFER_SIZE too small");
 238 
 239   return fast_entry;
 240 }
 241 
 242 address JNI_FastGetField::generate_fast_get_float_field0(BasicType type) {
 243   ShouldNotReachHere();
 244   return NULL;
 245 }
 246 
 247 address JNI_FastGetField::generate_fast_get_boolean_field() {
 248   return generate_fast_get_int_field0(T_BOOLEAN);
 249 }
 250 
 251 address JNI_FastGetField::generate_fast_get_byte_field() {
 252   return generate_fast_get_int_field0(T_BYTE);
 253 }
 254 
 255 address JNI_FastGetField::generate_fast_get_char_field() {
 256   return generate_fast_get_int_field0(T_CHAR);
 257 }
 258 
 259 address JNI_FastGetField::generate_fast_get_short_field() {
 260   return generate_fast_get_int_field0(T_SHORT);
 261 }
 262 
 263 address JNI_FastGetField::generate_fast_get_int_field() {
 264   return generate_fast_get_int_field0(T_INT);
 265 }
 266 
 267 address JNI_FastGetField::generate_fast_get_long_field() {
 268   return generate_fast_get_int_field0(T_LONG);
 269 }
 270 
 271 address JNI_FastGetField::generate_fast_get_float_field() {
 272   return generate_fast_get_int_field0(T_FLOAT);
 273 }
 274 
 275 address JNI_FastGetField::generate_fast_get_double_field() {
 276   return generate_fast_get_int_field0(T_DOUBLE);
 277 }