1 /*
2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_InstructionPrinter.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_MacroAssembler.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciInstance.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "runtime/os.hpp"
36
37 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
38 // We must have enough patching space so that call can be inserted.
39 // We cannot use fat nops here, since the concurrent code rewrite may transiently
40 // create the illegal instruction sequence.
41 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
42 _masm->nop();
43 }
44 patch->install(_masm, patch_code, obj, info);
45 append_code_stub(patch);
46
47 #ifdef ASSERT
48 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
49 if (patch->id() == PatchingStub::access_field_id) {
50 switch (code) {
51 case Bytecodes::_putstatic:
52 case Bytecodes::_getstatic:
53 case Bytecodes::_putfield:
54 case Bytecodes::_getfield:
55 break;
56 default:
57 ShouldNotReachHere();
58 }
59 } else if (patch->id() == PatchingStub::load_klass_id) {
60 switch (code) {
61 case Bytecodes::_new:
62 case Bytecodes::_anewarray:
63 case Bytecodes::_multianewarray:
64 case Bytecodes::_instanceof:
65 case Bytecodes::_checkcast:
66 break;
67 default:
68 ShouldNotReachHere();
69 }
70 } else if (patch->id() == PatchingStub::load_mirror_id) {
71 switch (code) {
72 case Bytecodes::_putstatic:
73 case Bytecodes::_getstatic:
74 case Bytecodes::_ldc:
75 case Bytecodes::_ldc_w:
76 break;
77 default:
78 ShouldNotReachHere();
79 }
80 } else if (patch->id() == PatchingStub::load_appendix_id) {
81 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
82 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
83 } else {
84 ShouldNotReachHere();
85 }
86 #endif
87 }
88
89 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
90 IRScope* scope = info->scope();
91 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
92 if (Bytecodes::has_optional_appendix(bc_raw)) {
93 return PatchingStub::load_appendix_id;
94 }
95 return PatchingStub::load_mirror_id;
96 }
97
98 //---------------------------------------------------------------
99
100
101 LIR_Assembler::LIR_Assembler(Compilation* c):
102 _masm(c->masm())
103 , _bs(BarrierSet::barrier_set())
104 , _compilation(c)
105 , _frame_map(c->frame_map())
106 , _current_block(NULL)
107 , _pending_non_safepoint(NULL)
108 , _pending_non_safepoint_offset(0)
109 {
110 _slow_case_stubs = new CodeStubList();
111 }
112
113
114 LIR_Assembler::~LIR_Assembler() {
115 // The unwind handler label may be unnbound if this destructor is invoked because of a bail-out.
116 // Reset it here to avoid an assertion.
117 _unwind_handler_entry.reset();
118 }
119
120
121 void LIR_Assembler::check_codespace() {
122 CodeSection* cs = _masm->code_section();
123 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
124 BAILOUT("CodeBuffer overflow");
125 }
126 }
127
128
129 void LIR_Assembler::append_code_stub(CodeStub* stub) {
130 _slow_case_stubs->append(stub);
131 }
132
133 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
134 for (int m = 0; m < stub_list->length(); m++) {
135 CodeStub* s = stub_list->at(m);
136
137 check_codespace();
138 CHECK_BAILOUT();
139
140 #ifndef PRODUCT
141 if (CommentedAssembly) {
142 stringStream st;
143 s->print_name(&st);
144 st.print(" slow case");
145 _masm->block_comment(st.as_string());
146 }
147 #endif
148 s->emit_code(this);
149 #ifdef ASSERT
150 s->assert_no_unbound_labels();
151 #endif
152 }
153 }
154
155
156 void LIR_Assembler::emit_slow_case_stubs() {
157 emit_stubs(_slow_case_stubs);
158 }
159
160
161 bool LIR_Assembler::needs_icache(ciMethod* method) const {
162 return !method->is_static();
163 }
164
165
166 int LIR_Assembler::code_offset() const {
167 return _masm->offset();
168 }
169
170
171 address LIR_Assembler::pc() const {
172 return _masm->pc();
173 }
174
175 // To bang the stack of this compiled method we use the stack size
176 // that the interpreter would need in case of a deoptimization. This
177 // removes the need to bang the stack in the deoptimization blob which
178 // in turn simplifies stack overflow handling.
179 int LIR_Assembler::bang_size_in_bytes() const {
180 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
181 }
182
183 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
184 for (int i = 0; i < info_list->length(); i++) {
185 XHandlers* handlers = info_list->at(i)->exception_handlers();
186
187 for (int j = 0; j < handlers->length(); j++) {
188 XHandler* handler = handlers->handler_at(j);
189 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
190 assert(handler->entry_code() == NULL ||
191 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
192 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
193
194 if (handler->entry_pco() == -1) {
195 // entry code not emitted yet
196 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
197 handler->set_entry_pco(code_offset());
198 if (CommentedAssembly) {
199 _masm->block_comment("Exception adapter block");
200 }
201 emit_lir_list(handler->entry_code());
202 } else {
203 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
204 }
205
206 assert(handler->entry_pco() != -1, "must be set now");
207 }
208 }
209 }
210 }
211
212
213 void LIR_Assembler::emit_code(BlockList* hir) {
214 if (PrintLIR) {
215 print_LIR(hir);
216 }
217
218 int n = hir->length();
219 for (int i = 0; i < n; i++) {
220 emit_block(hir->at(i));
221 CHECK_BAILOUT();
222 }
223
224 flush_debug_info(code_offset());
225
226 DEBUG_ONLY(check_no_unbound_labels());
227 }
228
229
230 void LIR_Assembler::emit_block(BlockBegin* block) {
231 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
232 align_backward_branch_target();
233 }
234
235 // if this block is the start of an exception handler, record the
236 // PC offset of the first instruction for later construction of
237 // the ExceptionHandlerTable
238 if (block->is_set(BlockBegin::exception_entry_flag)) {
239 block->set_exception_handler_pco(code_offset());
240 }
241
242 #ifndef PRODUCT
243 if (PrintLIRWithAssembly) {
244 // don't print Phi's
245 InstructionPrinter ip(false);
246 block->print(ip);
247 }
248 #endif /* PRODUCT */
249
250 assert(block->lir() != NULL, "must have LIR");
251 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
252
253 #ifndef PRODUCT
254 if (CommentedAssembly) {
255 stringStream st;
256 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
257 _masm->block_comment(st.as_string());
258 }
259 #endif
260
261 emit_lir_list(block->lir());
262
263 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
264 }
265
266
267 void LIR_Assembler::emit_lir_list(LIR_List* list) {
268 peephole(list);
269
270 int n = list->length();
271 for (int i = 0; i < n; i++) {
272 LIR_Op* op = list->at(i);
273
274 check_codespace();
275 CHECK_BAILOUT();
276
277 #ifndef PRODUCT
278 if (CommentedAssembly) {
279 // Don't record out every op since that's too verbose. Print
280 // branches since they include block and stub names. Also print
281 // patching moves since they generate funny looking code.
282 if (op->code() == lir_branch ||
283 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
284 (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
285 stringStream st;
286 op->print_on(&st);
287 _masm->block_comment(st.as_string());
288 }
289 }
290 if (PrintLIRWithAssembly) {
291 // print out the LIR operation followed by the resulting assembly
292 list->at(i)->print(); tty->cr();
293 }
294 #endif /* PRODUCT */
295
296 op->emit_code(this);
297
298 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
299 process_debug_info(op);
300 }
301
302 #ifndef PRODUCT
303 if (PrintLIRWithAssembly) {
304 _masm->code()->decode();
305 }
306 #endif /* PRODUCT */
307 }
308 }
309
310 #ifdef ASSERT
311 void LIR_Assembler::check_no_unbound_labels() {
312 CHECK_BAILOUT();
313
314 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
315 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
316 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
317 assert(false, "unbound label");
318 }
319 }
320 }
321 #endif
322
323 //----------------------------------debug info--------------------------------
324
325
326 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
327 int pc_offset = code_offset();
328 flush_debug_info(pc_offset);
329 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
330 if (info->exception_handlers() != NULL) {
331 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
332 }
333 }
334
335
336 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
337 flush_debug_info(pc_offset);
338 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
339 if (cinfo->exception_handlers() != NULL) {
340 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
341 }
342 }
343
344 static ValueStack* debug_info(Instruction* ins) {
345 StateSplit* ss = ins->as_StateSplit();
346 if (ss != NULL) return ss->state();
347 return ins->state_before();
348 }
349
350 void LIR_Assembler::process_debug_info(LIR_Op* op) {
351 Instruction* src = op->source();
352 if (src == NULL) return;
353 int pc_offset = code_offset();
354 if (_pending_non_safepoint == src) {
355 _pending_non_safepoint_offset = pc_offset;
356 return;
357 }
358 ValueStack* vstack = debug_info(src);
359 if (vstack == NULL) return;
360 if (_pending_non_safepoint != NULL) {
361 // Got some old debug info. Get rid of it.
362 if (debug_info(_pending_non_safepoint) == vstack) {
363 _pending_non_safepoint_offset = pc_offset;
364 return;
365 }
366 if (_pending_non_safepoint_offset < pc_offset) {
367 record_non_safepoint_debug_info();
368 }
369 _pending_non_safepoint = NULL;
370 }
371 // Remember the debug info.
372 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
373 _pending_non_safepoint = src;
374 _pending_non_safepoint_offset = pc_offset;
375 }
376 }
377
378 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
379 // Return NULL if n is too large.
380 // Returns the caller_bci for the next-younger state, also.
381 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
382 ValueStack* t = s;
383 for (int i = 0; i < n; i++) {
384 if (t == NULL) break;
385 t = t->caller_state();
386 }
387 if (t == NULL) return NULL;
388 for (;;) {
389 ValueStack* tc = t->caller_state();
390 if (tc == NULL) return s;
391 t = tc;
392 bci_result = tc->bci();
393 s = s->caller_state();
394 }
395 }
396
397 void LIR_Assembler::record_non_safepoint_debug_info() {
398 int pc_offset = _pending_non_safepoint_offset;
399 ValueStack* vstack = debug_info(_pending_non_safepoint);
400 int bci = vstack->bci();
401
402 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
403 assert(debug_info->recording_non_safepoints(), "sanity");
404
405 debug_info->add_non_safepoint(pc_offset);
406
407 // Visit scopes from oldest to youngest.
408 for (int n = 0; ; n++) {
409 int s_bci = bci;
410 ValueStack* s = nth_oldest(vstack, n, s_bci);
411 if (s == NULL) break;
412 IRScope* scope = s->scope();
413 //Always pass false for reexecute since these ScopeDescs are never used for deopt
414 methodHandle null_mh;
415 debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
416 }
417
418 debug_info->end_non_safepoint(pc_offset);
419 }
420
421
422 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
423 return add_debug_info_for_null_check(code_offset(), cinfo);
424 }
425
426 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
427 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
428 append_code_stub(stub);
429 return stub;
430 }
431
432 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
433 add_debug_info_for_div0(code_offset(), info);
434 }
435
436 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
437 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
438 append_code_stub(stub);
439 }
440
441 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
442 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
443 }
444
445
446 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
447 verify_oop_map(op->info());
448
449 if (os::is_MP()) {
450 // must align calls sites, otherwise they can't be updated atomically on MP hardware
451 align_call(op->code());
452 }
453
454 // emit the static call stub stuff out of line
455 emit_static_call_stub();
456 CHECK_BAILOUT();
457
458 switch (op->code()) {
459 case lir_static_call:
460 case lir_dynamic_call:
461 call(op, relocInfo::static_call_type);
462 break;
463 case lir_optvirtual_call:
464 call(op, relocInfo::opt_virtual_call_type);
465 break;
466 case lir_icvirtual_call:
467 ic_call(op);
468 break;
469 case lir_virtual_call:
470 vtable_call(op);
471 break;
472 default:
473 fatal("unexpected op code: %s", op->name());
474 break;
475 }
476
477 // JSR 292
478 // Record if this method has MethodHandle invokes.
479 if (op->is_method_handle_invoke()) {
480 compilation()->set_has_method_handle_invokes(true);
481 }
482
483 #if defined(X86) && defined(TIERED)
484 // C2 leave fpu stack dirty clean it
485 if (UseSSE < 2) {
486 int i;
487 for ( i = 1; i <= 7 ; i++ ) {
488 ffree(i);
489 }
490 if (!op->result_opr()->is_float_kind()) {
491 ffree(0);
492 }
493 }
494 #endif // X86 && TIERED
495 }
496
497
498 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
499 _masm->bind (*(op->label()));
500 }
501
502
503 void LIR_Assembler::emit_op1(LIR_Op1* op) {
504 switch (op->code()) {
505 case lir_move:
506 if (op->move_kind() == lir_move_volatile) {
507 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
508 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
509 } else {
510 move_op(op->in_opr(), op->result_opr(), op->type(),
511 op->patch_code(), op->info(), op->pop_fpu_stack(),
512 op->move_kind() == lir_move_unaligned,
513 op->move_kind() == lir_move_wide);
514 }
515 break;
516
517 case lir_roundfp: {
518 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
519 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
520 break;
521 }
522
523 case lir_return:
524 return_op(op->in_opr());
525 break;
526
527 case lir_safepoint:
528 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
529 _masm->nop();
530 }
531 safepoint_poll(op->in_opr(), op->info());
532 break;
533
534 case lir_fxch:
535 fxch(op->in_opr()->as_jint());
536 break;
537
538 case lir_fld:
539 fld(op->in_opr()->as_jint());
540 break;
541
542 case lir_ffree:
543 ffree(op->in_opr()->as_jint());
544 break;
545
546 case lir_branch:
547 break;
548
549 case lir_push:
550 push(op->in_opr());
551 break;
552
553 case lir_pop:
554 pop(op->in_opr());
555 break;
556
557 case lir_neg:
558 negate(op->in_opr(), op->result_opr());
559 break;
560
561 case lir_leal:
562 leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
563 break;
564
565 case lir_null_check: {
566 ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
567
568 if (op->in_opr()->is_single_cpu()) {
569 _masm->null_check(op->in_opr()->as_register(), stub->entry());
570 } else {
571 Unimplemented();
572 }
573 break;
574 }
575
576 case lir_monaddr:
577 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
578 break;
579
580 #ifdef SPARC
581 case lir_pack64:
582 pack64(op->in_opr(), op->result_opr());
583 break;
584
585 case lir_unpack64:
586 unpack64(op->in_opr(), op->result_opr());
587 break;
588 #endif
589
590 case lir_unwind:
591 unwind_op(op->in_opr());
592 break;
593
594 default:
595 Unimplemented();
596 break;
597 }
598 }
599
600
601 void LIR_Assembler::emit_op0(LIR_Op0* op) {
602 switch (op->code()) {
603 case lir_word_align: {
604 _masm->align(BytesPerWord);
605 break;
606 }
607
608 case lir_nop:
609 assert(op->info() == NULL, "not supported");
610 _masm->nop();
611 break;
612
613 case lir_label:
614 Unimplemented();
615 break;
616
617 case lir_build_frame:
618 build_frame();
619 break;
620
621 case lir_std_entry:
622 // init offsets
623 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
624 _masm->align(CodeEntryAlignment);
625 if (needs_icache(compilation()->method())) {
626 check_icache();
627 }
628 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
629 _masm->verified_entry();
630 build_frame();
631 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
632 break;
633
634 case lir_osr_entry:
635 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
636 osr_entry();
637 break;
638
639 case lir_24bit_FPU:
640 set_24bit_FPU();
641 break;
642
643 case lir_reset_FPU:
644 reset_FPU();
645 break;
646
647 case lir_breakpoint:
648 breakpoint();
649 break;
650
651 case lir_fpop_raw:
652 fpop();
653 break;
654
655 case lir_membar:
656 membar();
657 break;
658
659 case lir_membar_acquire:
660 membar_acquire();
661 break;
662
663 case lir_membar_release:
664 membar_release();
665 break;
666
667 case lir_membar_loadload:
668 membar_loadload();
669 break;
670
671 case lir_membar_storestore:
672 membar_storestore();
673 break;
674
675 case lir_membar_loadstore:
676 membar_loadstore();
677 break;
678
679 case lir_membar_storeload:
680 membar_storeload();
681 break;
682
683 case lir_get_thread:
684 get_thread(op->result_opr());
685 break;
686
687 case lir_on_spin_wait:
688 on_spin_wait();
689 break;
690
691 default:
692 ShouldNotReachHere();
693 break;
694 }
695 }
696
697
698 void LIR_Assembler::emit_op2(LIR_Op2* op) {
699 switch (op->code()) {
700 case lir_cmp:
701 if (op->info() != NULL) {
702 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
703 "shouldn't be codeemitinfo for non-address operands");
704 add_debug_info_for_null_check_here(op->info()); // exception possible
705 }
706 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
707 break;
708
709 case lir_cmp_l2i:
710 case lir_cmp_fd2i:
711 case lir_ucmp_fd2i:
712 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
713 break;
714
715 case lir_cmove:
716 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
717 break;
718
719 case lir_shl:
720 case lir_shr:
721 case lir_ushr:
722 if (op->in_opr2()->is_constant()) {
723 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
724 } else {
725 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
726 }
727 break;
728
729 case lir_add:
730 case lir_sub:
731 case lir_mul:
732 case lir_mul_strictfp:
733 case lir_div:
734 case lir_div_strictfp:
735 case lir_rem:
736 assert(op->fpu_pop_count() < 2, "");
737 arith_op(
738 op->code(),
739 op->in_opr1(),
740 op->in_opr2(),
741 op->result_opr(),
742 op->info(),
743 op->fpu_pop_count() == 1);
744 break;
745
746 case lir_abs:
747 case lir_sqrt:
748 case lir_tan:
749 case lir_log10:
750 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
751 break;
752
753 case lir_logic_and:
754 case lir_logic_or:
755 case lir_logic_xor:
756 logic_op(
757 op->code(),
758 op->in_opr1(),
759 op->in_opr2(),
760 op->result_opr());
761 break;
762
763 case lir_throw:
764 throw_op(op->in_opr1(), op->in_opr2(), op->info());
765 break;
766
767 case lir_xadd:
768 case lir_xchg:
769 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
770 break;
771
772 default:
773 Unimplemented();
774 break;
775 }
776 }
777
778
779 void LIR_Assembler::build_frame() {
780 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
781 }
782
783
784 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
785 assert((src->is_single_fpu() && dest->is_single_stack()) ||
786 (src->is_double_fpu() && dest->is_double_stack()),
787 "round_fp: rounds register -> stack location");
788
789 reg2stack (src, dest, src->type(), pop_fpu_stack);
790 }
791
792
793 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
794 if (src->is_register()) {
795 if (dest->is_register()) {
796 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
797 reg2reg(src, dest);
798 } else if (dest->is_stack()) {
799 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
800 reg2stack(src, dest, type, pop_fpu_stack);
801 } else if (dest->is_address()) {
802 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
803 } else {
804 ShouldNotReachHere();
805 }
806
807 } else if (src->is_stack()) {
808 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
809 if (dest->is_register()) {
810 stack2reg(src, dest, type);
811 } else if (dest->is_stack()) {
812 stack2stack(src, dest, type);
813 } else {
814 ShouldNotReachHere();
815 }
816
817 } else if (src->is_constant()) {
818 if (dest->is_register()) {
819 const2reg(src, dest, patch_code, info); // patching is possible
820 } else if (dest->is_stack()) {
821 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
822 const2stack(src, dest);
823 } else if (dest->is_address()) {
824 assert(patch_code == lir_patch_none, "no patching allowed here");
825 const2mem(src, dest, type, info, wide);
826 } else {
827 ShouldNotReachHere();
828 }
829
830 } else if (src->is_address()) {
831 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
832
833 } else {
834 ShouldNotReachHere();
835 }
836 }
837
838
839 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
840 #ifndef PRODUCT
841 if (VerifyOops) {
842 OopMapStream s(info->oop_map());
843 while (!s.is_done()) {
844 OopMapValue v = s.current();
845 if (v.is_oop()) {
846 VMReg r = v.reg();
847 if (!r->is_stack()) {
848 stringStream st;
849 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
850 #ifdef SPARC
851 _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__);
852 #else
853 _masm->verify_oop(r->as_Register());
854 #endif
855 } else {
856 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
857 }
858 }
859 check_codespace();
860 CHECK_BAILOUT();
861
862 s.next();
863 }
864 }
865 #endif
866 }