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src/share/vm/c1/c1_LIR.cpp
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*** 140,159 ****
return LIR_Address::times_1;
}
#ifndef PRODUCT
! void LIR_Address::verify() const {
#if defined(SPARC) || defined(PPC)
assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
assert(disp() == 0 || index()->is_illegal(), "can't have both");
#endif
- #ifdef ARM
- assert(disp() == 0 || index()->is_illegal(), "can't have both");
- // Note: offsets higher than 4096 must not be rejected here. They can
- // be handled by the back-end or will be rejected if not.
- #endif
#ifdef _LP64
assert(base()->is_cpu_register(), "wrong base operand");
assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
"wrong type for addresses");
--- 140,154 ----
return LIR_Address::times_1;
}
#ifndef PRODUCT
! void LIR_Address::verify0() const {
#if defined(SPARC) || defined(PPC)
assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
assert(disp() == 0 || index()->is_illegal(), "can't have both");
#endif
#ifdef _LP64
assert(base()->is_cpu_register(), "wrong base operand");
assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
"wrong type for addresses");
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