2546 transition(state, state); 2547 2548 assert(_desc->calls_vm(), 2549 "inconsistent calls_vm information"); // call in remove_activation 2550 2551 if (_desc->bytecode() == Bytecodes::_return_register_finalizer) { 2552 assert(state == vtos, "only valid state"); 2553 Register robj = LP64_ONLY(c_rarg1) NOT_LP64(rax); 2554 __ movptr(robj, aaddress(0)); 2555 __ load_klass(rdi, robj); 2556 __ movl(rdi, Address(rdi, Klass::access_flags_offset())); 2557 __ testl(rdi, JVM_ACC_HAS_FINALIZER); 2558 Label skip_register_finalizer; 2559 __ jcc(Assembler::zero, skip_register_finalizer); 2560 2561 __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), robj); 2562 2563 __ bind(skip_register_finalizer); 2564 } 2565 2566 // Explicitly reset last_sp, for handling special case in TemplateInterpreter::deopt_reexecute_entry 2567 #ifdef ASSERT 2568 if (state == vtos) { 2569 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD); 2570 } 2571 #endif 2572 2573 // Narrow result if state is itos but result type is smaller. 2574 // Need to narrow in the return bytecode rather than in generate_return_entry 2575 // since compiled code callers expect the result to already be narrowed. 2576 if (state == itos) { 2577 __ narrow(rax); 2578 } 2579 __ remove_activation(state, rbcp); 2580 2581 __ jmp(rbcp); 2582 } 2583 2584 // ---------------------------------------------------------------------------- 2585 // Volatile variables demand their effects be made known to all CPU's 2586 // in order. Store buffers on most chips allow reads & writes to 2587 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode 2588 // without some kind of memory barrier (i.e., it's not sufficient that 2589 // the interpreter does not reorder volatile references, the hardware 2590 // also must not reorder them). 2591 // 2592 // According to the new Java Memory Model (JMM): | 2546 transition(state, state); 2547 2548 assert(_desc->calls_vm(), 2549 "inconsistent calls_vm information"); // call in remove_activation 2550 2551 if (_desc->bytecode() == Bytecodes::_return_register_finalizer) { 2552 assert(state == vtos, "only valid state"); 2553 Register robj = LP64_ONLY(c_rarg1) NOT_LP64(rax); 2554 __ movptr(robj, aaddress(0)); 2555 __ load_klass(rdi, robj); 2556 __ movl(rdi, Address(rdi, Klass::access_flags_offset())); 2557 __ testl(rdi, JVM_ACC_HAS_FINALIZER); 2558 Label skip_register_finalizer; 2559 __ jcc(Assembler::zero, skip_register_finalizer); 2560 2561 __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), robj); 2562 2563 __ bind(skip_register_finalizer); 2564 } 2565 2566 // Narrow result if state is itos but result type is smaller. 2567 // Need to narrow in the return bytecode rather than in generate_return_entry 2568 // since compiled code callers expect the result to already be narrowed. 2569 if (state == itos) { 2570 __ narrow(rax); 2571 } 2572 __ remove_activation(state, rbcp); 2573 2574 __ jmp(rbcp); 2575 } 2576 2577 // ---------------------------------------------------------------------------- 2578 // Volatile variables demand their effects be made known to all CPU's 2579 // in order. Store buffers on most chips allow reads & writes to 2580 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode 2581 // without some kind of memory barrier (i.e., it's not sufficient that 2582 // the interpreter does not reorder volatile references, the hardware 2583 // also must not reorder them). 2584 // 2585 // According to the new Java Memory Model (JMM): |