689 inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; }
690 inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; }
691 inline bool NativeInstruction::is_call_reg() { return ubyte_at(0) == NativeCallReg::instruction_code ||
692 (ubyte_at(1) == NativeCallReg::instruction_code &&
693 (ubyte_at(0) == Assembler::REX || ubyte_at(0) == Assembler::REX_B)); }
694 inline bool NativeInstruction::is_return() { return ubyte_at(0) == NativeReturn::instruction_code ||
695 ubyte_at(0) == NativeReturnX::instruction_code; }
696 inline bool NativeInstruction::is_jump() { return ubyte_at(0) == NativeJump::instruction_code ||
697 ubyte_at(0) == 0xEB; /* short jump */ }
698 inline bool NativeInstruction::is_jump_reg() {
699 int pos = 0;
700 if (ubyte_at(0) == Assembler::REX_B) pos = 1;
701 return ubyte_at(pos) == 0xFF && (ubyte_at(pos + 1) & 0xF0) == 0xE0;
702 }
703 inline bool NativeInstruction::is_far_jump() { return is_mov_literal64(); }
704 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
705 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
706 inline bool NativeInstruction::is_safepoint_poll() {
707 #ifdef AMD64
708 if (SafepointMechanism::uses_thread_local_poll()) {
709 // We know that the poll must have a REX_B prefix since we enforce its source to be
710 // a rex-register and the destination to be rax.
711 const bool has_rex_prefix = ubyte_at(0) == NativeTstRegMem::instruction_rex_b_prefix;
712 const bool is_test_opcode = ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl;
713 const bool is_rax_target = (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg;
714 if (has_rex_prefix && is_test_opcode && is_rax_target) {
715 return true;
716 }
717 }
718 // Try decoding a near safepoint first:
719 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
720 ubyte_at(1) == 0x05) { // 00 rax 101
721 address fault = addr_at(6) + int_at(2);
722 NOT_JVMCI(assert(!Assembler::is_polling_page_far(), "unexpected poll encoding");)
723 return os::is_poll_address(fault);
724 }
725 // Now try decoding a far safepoint:
726 // two cases, depending on the choice of the base register in the address.
727 if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
728 ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
729 (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
730 (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
731 (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg)) {
732 NOT_JVMCI(assert(Assembler::is_polling_page_far(), "unexpected poll encoding");)
733 return true;
734 }
735 return false;
736 #else
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689 inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; }
690 inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; }
691 inline bool NativeInstruction::is_call_reg() { return ubyte_at(0) == NativeCallReg::instruction_code ||
692 (ubyte_at(1) == NativeCallReg::instruction_code &&
693 (ubyte_at(0) == Assembler::REX || ubyte_at(0) == Assembler::REX_B)); }
694 inline bool NativeInstruction::is_return() { return ubyte_at(0) == NativeReturn::instruction_code ||
695 ubyte_at(0) == NativeReturnX::instruction_code; }
696 inline bool NativeInstruction::is_jump() { return ubyte_at(0) == NativeJump::instruction_code ||
697 ubyte_at(0) == 0xEB; /* short jump */ }
698 inline bool NativeInstruction::is_jump_reg() {
699 int pos = 0;
700 if (ubyte_at(0) == Assembler::REX_B) pos = 1;
701 return ubyte_at(pos) == 0xFF && (ubyte_at(pos + 1) & 0xF0) == 0xE0;
702 }
703 inline bool NativeInstruction::is_far_jump() { return is_mov_literal64(); }
704 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
705 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
706 inline bool NativeInstruction::is_safepoint_poll() {
707 #ifdef AMD64
708 if (SafepointMechanism::uses_thread_local_poll()) {
709 const bool has_rex_prefix = ubyte_at(0) == NativeTstRegMem::instruction_rex_b_prefix;
710 const int test_offset = has_rex_prefix ? 1 : 0;
711 const bool is_test_opcode = ubyte_at(test_offset) == NativeTstRegMem::instruction_code_memXregl;
712 const bool is_rax_target = (ubyte_at(test_offset + 1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg;
713 return is_test_opcode && is_rax_target;
714 }
715 // Try decoding a near safepoint first:
716 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
717 ubyte_at(1) == 0x05) { // 00 rax 101
718 address fault = addr_at(6) + int_at(2);
719 NOT_JVMCI(assert(!Assembler::is_polling_page_far(), "unexpected poll encoding");)
720 return os::is_poll_address(fault);
721 }
722 // Now try decoding a far safepoint:
723 // two cases, depending on the choice of the base register in the address.
724 if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
725 ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
726 (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
727 (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
728 (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg)) {
729 NOT_JVMCI(assert(Assembler::is_polling_page_far(), "unexpected poll encoding");)
730 return true;
731 }
732 return false;
733 #else
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