1 /*
2 * Copyright (c) 2009, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23
24
25 package org.graalvm.compiler.asm.amd64;
26
27 import static org.graalvm.compiler.asm.amd64.AMD64AsmOptions.UseIncDec;
28 import static org.graalvm.compiler.asm.amd64.AMD64AsmOptions.UseXmmLoadAndClearUpper;
29 import static org.graalvm.compiler.asm.amd64.AMD64AsmOptions.UseXmmRegToRegMoveAll;
30
31 import org.graalvm.compiler.core.common.NumUtil;
32
33 import jdk.vm.ci.amd64.AMD64;
34 import jdk.vm.ci.amd64.AMD64Kind;
35 import jdk.vm.ci.code.Register;
36 import jdk.vm.ci.code.TargetDescription;
37
38 /**
39 * This class implements commonly used X86 code patterns.
40 */
41 public class AMD64MacroAssembler extends AMD64Assembler {
42
43 public AMD64MacroAssembler(TargetDescription target) {
44 super(target);
45 }
46
62 subq(reg, value);
63 }
64 }
65
66 public final void decrementq(AMD64Address dst, int value) {
67 if (value == Integer.MIN_VALUE) {
68 subq(dst, value);
69 return;
70 }
71 if (value < 0) {
72 incrementq(dst, -value);
73 return;
74 }
75 if (value == 0) {
76 return;
77 }
78 if (value == 1 && UseIncDec) {
79 decq(dst);
80 } else {
81 subq(dst, value);
82 }
83 }
84
85 public void incrementq(Register reg, int value) {
86 if (value == Integer.MIN_VALUE) {
87 addq(reg, value);
88 return;
89 }
90 if (value < 0) {
91 decrementq(reg, -value);
92 return;
93 }
94 if (value == 0) {
95 return;
96 }
97 if (value == 1 && UseIncDec) {
98 incq(reg);
99 } else {
100 addq(reg, value);
101 }
|
1 /*
2 * Copyright (c) 2009, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23
24
25 package org.graalvm.compiler.asm.amd64;
26
27 import static jdk.vm.ci.amd64.AMD64.rbp;
28 import static jdk.vm.ci.amd64.AMD64.rsp;
29 import static org.graalvm.compiler.asm.amd64.AMD64AsmOptions.UseIncDec;
30 import static org.graalvm.compiler.asm.amd64.AMD64AsmOptions.UseXmmLoadAndClearUpper;
31 import static org.graalvm.compiler.asm.amd64.AMD64AsmOptions.UseXmmRegToRegMoveAll;
32
33 import org.graalvm.compiler.core.common.NumUtil;
34
35 import jdk.vm.ci.amd64.AMD64;
36 import jdk.vm.ci.amd64.AMD64Kind;
37 import jdk.vm.ci.code.Register;
38 import jdk.vm.ci.code.TargetDescription;
39
40 /**
41 * This class implements commonly used X86 code patterns.
42 */
43 public class AMD64MacroAssembler extends AMD64Assembler {
44
45 public AMD64MacroAssembler(TargetDescription target) {
46 super(target);
47 }
48
64 subq(reg, value);
65 }
66 }
67
68 public final void decrementq(AMD64Address dst, int value) {
69 if (value == Integer.MIN_VALUE) {
70 subq(dst, value);
71 return;
72 }
73 if (value < 0) {
74 incrementq(dst, -value);
75 return;
76 }
77 if (value == 0) {
78 return;
79 }
80 if (value == 1 && UseIncDec) {
81 decq(dst);
82 } else {
83 subq(dst, value);
84 }
85 }
86
87 public final void enter(int frameSize) {
88 if (NumUtil.isUShort(frameSize)) {
89 // Can use enter instruction only for frame size that fits in 16 bits.
90 emitByte(0xC8);
91 emitShort(frameSize);
92 emitByte(0x00);
93 } else {
94 // Fall back to manual sequence.
95 push(rbp);
96 movq(rbp, rsp);
97 decrementq(rsp, frameSize);
98 }
99 }
100
101 public void incrementq(Register reg, int value) {
102 if (value == Integer.MIN_VALUE) {
103 addq(reg, value);
104 return;
105 }
106 if (value < 0) {
107 decrementq(reg, -value);
108 return;
109 }
110 if (value == 0) {
111 return;
112 }
113 if (value == 1 && UseIncDec) {
114 incq(reg);
115 } else {
116 addq(reg, value);
117 }
|