< prev index next >
src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.amd64/src/org/graalvm/compiler/core/amd64/AMD64LIRGenerator.java
Print this page
rev 56282 : [mq]: graal
@@ -46,11 +46,14 @@
import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic;
import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64MIOp;
import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64RMOp;
import org.graalvm.compiler.asm.amd64.AMD64Assembler.ConditionFlag;
import org.graalvm.compiler.asm.amd64.AMD64Assembler.SSEOp;
+import org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRMOp;
import org.graalvm.compiler.asm.amd64.AMD64BaseAssembler.OperandSize;
+import org.graalvm.compiler.asm.amd64.AVXKind;
+import org.graalvm.compiler.asm.amd64.AVXKind.AVXSize;
import org.graalvm.compiler.core.common.LIRKind;
import org.graalvm.compiler.core.common.NumUtil;
import org.graalvm.compiler.core.common.calc.Condition;
import org.graalvm.compiler.core.common.spi.ForeignCallLinkage;
import org.graalvm.compiler.core.common.spi.LIRKindTool;
@@ -59,11 +62,11 @@
import org.graalvm.compiler.lir.LIRFrameState;
import org.graalvm.compiler.lir.LIRInstruction;
import org.graalvm.compiler.lir.LIRValueUtil;
import org.graalvm.compiler.lir.LabelRef;
import org.graalvm.compiler.lir.StandardOp.JumpOp;
-import org.graalvm.compiler.lir.StandardOp.SaveRegistersOp;
+import org.graalvm.compiler.lir.StandardOp.ZapRegistersOp;
import org.graalvm.compiler.lir.SwitchStrategy;
import org.graalvm.compiler.lir.Variable;
import org.graalvm.compiler.lir.amd64.AMD64AddressValue;
import org.graalvm.compiler.lir.amd64.AMD64ArithmeticLIRGeneratorTool;
import org.graalvm.compiler.lir.amd64.AMD64ArrayCompareToOp;
@@ -92,10 +95,12 @@
import org.graalvm.compiler.lir.amd64.AMD64PauseOp;
import org.graalvm.compiler.lir.amd64.AMD64StringLatin1InflateOp;
import org.graalvm.compiler.lir.amd64.AMD64StringUTF16CompressOp;
import org.graalvm.compiler.lir.amd64.AMD64ZapRegistersOp;
import org.graalvm.compiler.lir.amd64.AMD64ZapStackOp;
+import org.graalvm.compiler.lir.amd64.AMD64ZeroMemoryOp;
+import org.graalvm.compiler.lir.amd64.vector.AMD64VectorCompareOp;
import org.graalvm.compiler.lir.gen.LIRGenerationResult;
import org.graalvm.compiler.lir.gen.LIRGenerator;
import org.graalvm.compiler.lir.hashing.Hasher;
import org.graalvm.compiler.phases.util.Providers;
@@ -402,11 +407,23 @@
Variable result = newVariable(trueValue.getValueKind());
append(new CondMoveOp(result, Condition.EQ, load(trueValue), loadNonConst(falseValue)));
return result;
}
+ private static AVXSize getRegisterSize(Value a) {
+ AMD64Kind kind = (AMD64Kind) a.getPlatformKind();
+ if (kind.isXMM()) {
+ return AVXKind.getRegisterSize(kind);
+ } else {
+ return AVXSize.XMM;
+ }
+ }
+
private void emitIntegerTest(Value a, Value b) {
+ if (a.getPlatformKind().getVectorLength() > 1) {
+ append(new AMD64VectorCompareOp(VexRMOp.VPTEST, getRegisterSize(a), asAllocatable(a), asAllocatable(b)));
+ } else {
assert ((AMD64Kind) a.getPlatformKind()).isInteger();
OperandSize size = a.getPlatformKind() == AMD64Kind.QWORD ? QWORD : DWORD;
if (isJavaConstant(b) && NumUtil.is32bit(asJavaConstant(b).asLong())) {
append(new AMD64BinaryConsumer.ConstOp(AMD64MIOp.TEST, size, asAllocatable(a), (int) asJavaConstant(b).asLong()));
} else if (isJavaConstant(a) && NumUtil.is32bit(asJavaConstant(a).asLong())) {
@@ -415,10 +432,11 @@
append(new AMD64BinaryConsumer.Op(AMD64RMOp.TEST, size, asAllocatable(b), asAllocatable(a)));
} else {
append(new AMD64BinaryConsumer.Op(AMD64RMOp.TEST, size, asAllocatable(a), asAllocatable(b)));
}
}
+ }
/**
* This method emits the compare against memory instruction, and may reorder the operands. It
* returns true if it did so.
*
@@ -545,31 +563,24 @@
emitMove(result, raxRes);
return result;
}
@Override
- public Variable emitArrayEquals(JavaKind kind, Value array1, Value array2, Value length, int constantLength, boolean directPointers) {
+ public Variable emitArrayEquals(JavaKind kind, Value array1, Value array2, Value length, boolean directPointers) {
Variable result = newVariable(LIRKind.value(AMD64Kind.DWORD));
- append(new AMD64ArrayEqualsOp(this, kind, kind, result, array1, array2, asAllocatable(length), constantLength, directPointers, getMaxVectorSize()));
+ append(new AMD64ArrayEqualsOp(this, kind, kind, result, array1, array2, length, directPointers, getMaxVectorSize()));
return result;
}
@Override
- public Variable emitArrayEquals(JavaKind kind1, JavaKind kind2, Value array1, Value array2, Value length, int constantLength, boolean directPointers) {
+ public Variable emitArrayEquals(JavaKind kind1, JavaKind kind2, Value array1, Value array2, Value length, boolean directPointers) {
Variable result = newVariable(LIRKind.value(AMD64Kind.DWORD));
- append(new AMD64ArrayEqualsOp(this, kind1, kind2, result, array1, array2, asAllocatable(length), constantLength, directPointers, getMaxVectorSize()));
+ append(new AMD64ArrayEqualsOp(this, kind1, kind2, result, array1, array2, length, directPointers, getMaxVectorSize()));
return result;
}
/**
- * Return a conservative estimate of the page size for use by the String.indexOf intrinsic.
- */
- protected int getVMPageSize() {
- return 4096;
- }
-
- /**
* Return the maximum size of vector registers used in SSE/AVX instructions.
*/
protected int getMaxVectorSize() {
// default for "unlimited"
return -1;
@@ -659,11 +670,11 @@
public void emitPause() {
append(new AMD64PauseOp());
}
@Override
- public SaveRegistersOp createZapRegisters(Register[] zappedRegisters, JavaConstant[] zapValues) {
+ public ZapRegistersOp createZapRegisters(Register[] zappedRegisters, JavaConstant[] zapValues) {
return new AMD64ZapRegistersOp(zappedRegisters, zapValues);
}
@Override
public LIRInstruction createZapArgumentSpace(StackSlot[] zappedStack, JavaConstant[] zapValues) {
@@ -672,6 +683,13 @@
@Override
public void emitSpeculationFence() {
append(new AMD64LFenceOp());
}
+
+ @Override
+ public void emitZeroMemory(Value address, Value length) {
+ RegisterValue lengthReg = AMD64.rcx.asValue(length.getValueKind());
+ emitMove(lengthReg, length);
+ append(new AMD64ZeroMemoryOp(asAddressValue(address), lengthReg));
+ }
}
< prev index next >