1 /*
2 * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23
24
25 package org.graalvm.compiler.lir.amd64;
26
27 import static jdk.vm.ci.code.ValueUtil.asRegister;
28 import static jdk.vm.ci.code.ValueUtil.isRegister;
29
30 import java.util.BitSet;
31
32 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
33 import org.graalvm.compiler.lir.LIRInstructionClass;
34 import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
35
36 import jdk.vm.ci.amd64.AMD64;
37 import jdk.vm.ci.code.Register;
38 import jdk.vm.ci.code.RegisterValue;
39 import jdk.vm.ci.meta.Value;
40
41 public class AMD64VZeroUpper extends AMD64LIRInstruction {
42
43 public static final LIRInstructionClass<AMD64VZeroUpper> TYPE = LIRInstructionClass.create(AMD64VZeroUpper.class);
44
45 @Temp protected final RegisterValue[] xmmRegisters;
46
47 public AMD64VZeroUpper(Value[] exclude) {
48 super(TYPE);
49 xmmRegisters = initRegisterValues(exclude);
50 }
51
52 private static RegisterValue[] initRegisterValues(Value[] exclude) {
53 BitSet skippedRegs = new BitSet();
54 int numSkipped = 0;
55 if (exclude != null) {
56 for (Value value : exclude) {
57 if (isRegister(value) && asRegister(value).getRegisterCategory().equals(AMD64.XMM)) {
58 skippedRegs.set(asRegister(value).number);
59 numSkipped++;
60 }
61 }
62 }
63 RegisterValue[] regs = new RegisterValue[AMD64.xmmRegistersAVX512.length - numSkipped];
64 for (int i = 0, j = 0; i < AMD64.xmmRegistersAVX512.length; i++) {
65 Register reg = AMD64.xmmRegistersAVX512[i];
66 if (!skippedRegs.get(reg.number)) {
67 regs[j++] = reg.asValue();
68 }
69 }
70 return regs;
71 }
72
73 @Override
74 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler asm) {
75 asm.vzeroupper();
76 }
77 }
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1 /*
2 * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23
24
25 package org.graalvm.compiler.lir.amd64;
26
27 import static jdk.vm.ci.code.ValueUtil.asRegister;
28 import static jdk.vm.ci.code.ValueUtil.isRegister;
29
30 import java.util.ArrayList;
31 import java.util.BitSet;
32
33 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler;
34 import org.graalvm.compiler.lir.LIRInstructionClass;
35 import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
36
37 import jdk.vm.ci.amd64.AMD64;
38 import jdk.vm.ci.code.Register;
39 import jdk.vm.ci.code.RegisterConfig;
40 import jdk.vm.ci.code.RegisterValue;
41 import jdk.vm.ci.meta.Value;
42
43 public class AMD64VZeroUpper extends AMD64LIRInstruction {
44
45 public static final LIRInstructionClass<AMD64VZeroUpper> TYPE = LIRInstructionClass.create(AMD64VZeroUpper.class);
46
47 @Temp protected final RegisterValue[] xmmRegisters;
48
49 public AMD64VZeroUpper(Value[] exclude, RegisterConfig registerConfig) {
50 super(TYPE);
51 xmmRegisters = initRegisterValues(exclude, registerConfig);
52 }
53
54 private static RegisterValue[] initRegisterValues(Value[] exclude, RegisterConfig registerConfig) {
55 BitSet skippedRegs = new BitSet();
56 if (exclude != null) {
57 for (Value value : exclude) {
58 if (isRegister(value) && asRegister(value).getRegisterCategory().equals(AMD64.XMM)) {
59 skippedRegs.set(asRegister(value).number);
60 }
61 }
62 }
63 ArrayList<RegisterValue> regs = new ArrayList<>();
64 for (Register r : registerConfig.getCallerSaveRegisters()) {
65 if (r.getRegisterCategory().equals(AMD64.XMM) && !skippedRegs.get(r.number)) {
66 regs.add(r.asValue());
67 }
68 }
69 return regs.toArray(new RegisterValue[regs.size()]);
70 }
71
72 @Override
73 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler asm) {
74 asm.vzeroupper();
75 }
76 }
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