1 /* 2 * Copyright (c) 2013, 2019, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 */ 23 24 25 package org.graalvm.compiler.lir.amd64.vector; 26 27 import static jdk.vm.ci.code.ValueUtil.asRegister; 28 import static jdk.vm.ci.code.ValueUtil.isRegister; 29 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG; 30 import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.STACK; 31 32 import org.graalvm.compiler.asm.amd64.AMD64Address; 33 import org.graalvm.compiler.asm.amd64.AMD64Assembler.VexRMOp; 34 import org.graalvm.compiler.asm.amd64.AMD64MacroAssembler; 35 import org.graalvm.compiler.asm.amd64.AVXKind.AVXSize; 36 import org.graalvm.compiler.lir.LIRInstructionClass; 37 import org.graalvm.compiler.lir.Opcode; 38 import org.graalvm.compiler.lir.amd64.AMD64LIRInstruction; 39 import org.graalvm.compiler.lir.asm.CompilationResultBuilder; 40 41 import jdk.vm.ci.meta.AllocatableValue; 42 43 public final class AMD64VectorCompareOp extends AMD64LIRInstruction { 44 public static final LIRInstructionClass<AMD64VectorCompareOp> TYPE = LIRInstructionClass.create(AMD64VectorCompareOp.class); 45 46 @Opcode private final VexRMOp opcode; 47 private final AVXSize size; 48 @Use({REG}) protected AllocatableValue x; 49 @Use({REG, STACK}) protected AllocatableValue y; 50 51 public AMD64VectorCompareOp(VexRMOp opcode, AllocatableValue x, AllocatableValue y) { 52 this(opcode, AVXSize.XMM, x, y); 53 } 54 55 public AMD64VectorCompareOp(VexRMOp opcode, AVXSize size, AllocatableValue x, AllocatableValue y) { 56 super(TYPE); 57 this.opcode = opcode; 58 this.size = size; 59 this.x = x; 60 this.y = y; 61 } 62 63 @Override 64 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { 65 if (isRegister(y)) { 66 opcode.emit(masm, size, asRegister(x), asRegister(y)); 67 } else { 68 opcode.emit(masm, size, asRegister(x), (AMD64Address) crb.asAddress(y)); 69 } 70 } 71 }