*** old/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Fri Jun 28 08:58:56 2013
--- new/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp	Fri Jun 28 08:58:56 2013

*** 1,7 ****
--- 1,7 ----
  /*
!  * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
!  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.

*** 2944,2953 ****
--- 2944,2956 ----
      __ set(offset, dst);
      __ add(dst, reg, dst);
    }
  }
  
+ void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
+   fatal("CRC32 intrinsic is not implemented on this platform");
+ }
  
  void LIR_Assembler::emit_lock(LIR_OpLock* op) {
    Register obj = op->obj_opr()->as_register();
    Register hdr = op->hdr_opr()->as_register();
    Register lock = op->lock_opr()->as_register();