1 /* 2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_C1_C1_LIR_HPP 26 #define SHARE_VM_C1_C1_LIR_HPP 27 28 #include "c1/c1_ValueType.hpp" 29 #include "oops/method.hpp" 30 31 class BlockBegin; 32 class BlockList; 33 class LIR_Assembler; 34 class CodeEmitInfo; 35 class CodeStub; 36 class CodeStubList; 37 class ArrayCopyStub; 38 class LIR_Op; 39 class ciType; 40 class ValueType; 41 class LIR_OpVisitState; 42 class FpuStackSim; 43 44 //--------------------------------------------------------------------- 45 // LIR Operands 46 // LIR_OprDesc 47 // LIR_OprPtr 48 // LIR_Const 49 // LIR_Address 50 //--------------------------------------------------------------------- 51 class LIR_OprDesc; 52 class LIR_OprPtr; 53 class LIR_Const; 54 class LIR_Address; 55 class LIR_OprVisitor; 56 57 58 typedef LIR_OprDesc* LIR_Opr; 59 typedef int RegNr; 60 61 define_array(LIR_OprArray, LIR_Opr) 62 define_stack(LIR_OprList, LIR_OprArray) 63 64 define_array(LIR_OprRefArray, LIR_Opr*) 65 define_stack(LIR_OprRefList, LIR_OprRefArray) 66 67 define_array(CodeEmitInfoArray, CodeEmitInfo*) 68 define_stack(CodeEmitInfoList, CodeEmitInfoArray) 69 70 define_array(LIR_OpArray, LIR_Op*) 71 define_stack(LIR_OpList, LIR_OpArray) 72 73 // define LIR_OprPtr early so LIR_OprDesc can refer to it 74 class LIR_OprPtr: public CompilationResourceObj { 75 public: 76 bool is_oop_pointer() const { return (type() == T_OBJECT); } 77 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } 78 79 virtual LIR_Const* as_constant() { return NULL; } 80 virtual LIR_Address* as_address() { return NULL; } 81 virtual BasicType type() const = 0; 82 virtual void print_value_on(outputStream* out) const = 0; 83 }; 84 85 86 87 // LIR constants 88 class LIR_Const: public LIR_OprPtr { 89 private: 90 JavaValue _value; 91 92 void type_check(BasicType t) const { assert(type() == t, "type check"); } 93 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } 94 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } 95 96 public: 97 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } 98 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } 99 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } 100 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } 101 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } 102 LIR_Const(void* p) { 103 #ifdef _LP64 104 assert(sizeof(jlong) >= sizeof(p), "too small");; 105 _value.set_type(T_LONG); _value.set_jlong((jlong)p); 106 #else 107 assert(sizeof(jint) >= sizeof(p), "too small");; 108 _value.set_type(T_INT); _value.set_jint((jint)p); 109 #endif 110 } 111 LIR_Const(Metadata* m) { 112 _value.set_type(T_METADATA); 113 #ifdef _LP64 114 _value.set_jlong((jlong)m); 115 #else 116 _value.set_jint((jint)m); 117 #endif // _LP64 118 } 119 120 virtual BasicType type() const { return _value.get_type(); } 121 virtual LIR_Const* as_constant() { return this; } 122 123 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } 124 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } 125 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } 126 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } 127 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } 128 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } 129 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } 130 131 #ifdef _LP64 132 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } 133 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); } 134 #else 135 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } 136 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); } 137 #endif 138 139 140 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } 141 jint as_jint_lo_bits() const { 142 if (type() == T_DOUBLE) { 143 return low(jlong_cast(_value.get_jdouble())); 144 } else { 145 return as_jint_lo(); 146 } 147 } 148 jint as_jint_hi_bits() const { 149 if (type() == T_DOUBLE) { 150 return high(jlong_cast(_value.get_jdouble())); 151 } else { 152 return as_jint_hi(); 153 } 154 } 155 jlong as_jlong_bits() const { 156 if (type() == T_DOUBLE) { 157 return jlong_cast(_value.get_jdouble()); 158 } else { 159 return as_jlong(); 160 } 161 } 162 163 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 164 165 166 bool is_zero_float() { 167 jfloat f = as_jfloat(); 168 jfloat ok = 0.0f; 169 return jint_cast(f) == jint_cast(ok); 170 } 171 172 bool is_one_float() { 173 jfloat f = as_jfloat(); 174 return !g_isnan(f) && g_isfinite(f) && f == 1.0; 175 } 176 177 bool is_zero_double() { 178 jdouble d = as_jdouble(); 179 jdouble ok = 0.0; 180 return jlong_cast(d) == jlong_cast(ok); 181 } 182 183 bool is_one_double() { 184 jdouble d = as_jdouble(); 185 return !g_isnan(d) && g_isfinite(d) && d == 1.0; 186 } 187 }; 188 189 190 //---------------------LIR Operand descriptor------------------------------------ 191 // 192 // The class LIR_OprDesc represents a LIR instruction operand; 193 // it can be a register (ALU/FPU), stack location or a constant; 194 // Constants and addresses are represented as resource area allocated 195 // structures (see above). 196 // Registers and stack locations are inlined into the this pointer 197 // (see value function). 198 199 class LIR_OprDesc: public CompilationResourceObj { 200 public: 201 // value structure: 202 // data opr-type opr-kind 203 // +--------------+-------+-------+ 204 // [max...........|7 6 5 4|3 2 1 0] 205 // ^ 206 // is_pointer bit 207 // 208 // lowest bit cleared, means it is a structure pointer 209 // we need 4 bits to represent types 210 211 private: 212 friend class LIR_OprFact; 213 214 // Conversion 215 intptr_t value() const { return (intptr_t) this; } 216 217 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { 218 return (value() & mask) == masked_value; 219 } 220 221 enum OprKind { 222 pointer_value = 0 223 , stack_value = 1 224 , cpu_register = 3 225 , fpu_register = 5 226 , illegal_value = 7 227 }; 228 229 enum OprBits { 230 pointer_bits = 1 231 , kind_bits = 3 232 , type_bits = 4 233 , size_bits = 2 234 , destroys_bits = 1 235 , virtual_bits = 1 236 , is_xmm_bits = 1 237 , last_use_bits = 1 238 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation 239 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + 240 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits 241 , data_bits = BitsPerInt - non_data_bits 242 , reg_bits = data_bits / 2 // for two registers in one value encoding 243 }; 244 245 enum OprShift { 246 kind_shift = 0 247 , type_shift = kind_shift + kind_bits 248 , size_shift = type_shift + type_bits 249 , destroys_shift = size_shift + size_bits 250 , last_use_shift = destroys_shift + destroys_bits 251 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits 252 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits 253 , is_xmm_shift = virtual_shift + virtual_bits 254 , data_shift = is_xmm_shift + is_xmm_bits 255 , reg1_shift = data_shift 256 , reg2_shift = data_shift + reg_bits 257 258 }; 259 260 enum OprSize { 261 single_size = 0 << size_shift 262 , double_size = 1 << size_shift 263 }; 264 265 enum OprMask { 266 kind_mask = right_n_bits(kind_bits) 267 , type_mask = right_n_bits(type_bits) << type_shift 268 , size_mask = right_n_bits(size_bits) << size_shift 269 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift 270 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift 271 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift 272 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift 273 , pointer_mask = right_n_bits(pointer_bits) 274 , lower_reg_mask = right_n_bits(reg_bits) 275 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) 276 }; 277 278 uintptr_t data() const { return value() >> data_shift; } 279 int lo_reg_half() const { return data() & lower_reg_mask; } 280 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } 281 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } 282 OprSize size_field() const { return (OprSize)(value() & size_mask); } 283 284 static char type_char(BasicType t); 285 286 public: 287 enum { 288 vreg_base = ConcreteRegisterImpl::number_of_registers, 289 vreg_max = (1 << data_bits) - 1 290 }; 291 292 static inline LIR_Opr illegalOpr(); 293 294 enum OprType { 295 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) 296 , int_type = 1 << type_shift 297 , long_type = 2 << type_shift 298 , object_type = 3 << type_shift 299 , address_type = 4 << type_shift 300 , float_type = 5 << type_shift 301 , double_type = 6 << type_shift 302 , metadata_type = 7 << type_shift 303 }; 304 friend OprType as_OprType(BasicType t); 305 friend BasicType as_BasicType(OprType t); 306 307 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } 308 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } 309 310 static OprSize size_for(BasicType t) { 311 switch (t) { 312 case T_LONG: 313 case T_DOUBLE: 314 return double_size; 315 break; 316 317 case T_FLOAT: 318 case T_BOOLEAN: 319 case T_CHAR: 320 case T_BYTE: 321 case T_SHORT: 322 case T_INT: 323 case T_ADDRESS: 324 case T_OBJECT: 325 case T_ARRAY: 326 case T_METADATA: 327 return single_size; 328 break; 329 330 default: 331 ShouldNotReachHere(); 332 return single_size; 333 } 334 } 335 336 337 void validate_type() const PRODUCT_RETURN; 338 339 BasicType type() const { 340 if (is_pointer()) { 341 return pointer()->type(); 342 } 343 return as_BasicType(type_field()); 344 } 345 346 347 ValueType* value_type() const { return as_ValueType(type()); } 348 349 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } 350 351 bool is_equal(LIR_Opr opr) const { return this == opr; } 352 // checks whether types are same 353 bool is_same_type(LIR_Opr opr) const { 354 assert(type_field() != unknown_type && 355 opr->type_field() != unknown_type, "shouldn't see unknown_type"); 356 return type_field() == opr->type_field(); 357 } 358 bool is_same_register(LIR_Opr opr) { 359 return (is_register() && opr->is_register() && 360 kind_field() == opr->kind_field() && 361 (value() & no_type_mask) == (opr->value() & no_type_mask)); 362 } 363 364 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } 365 bool is_illegal() const { return kind_field() == illegal_value; } 366 bool is_valid() const { return kind_field() != illegal_value; } 367 368 bool is_register() const { return is_cpu_register() || is_fpu_register(); } 369 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } 370 371 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } 372 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } 373 374 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } 375 bool is_oop() const; 376 377 // semantic for fpu- and xmm-registers: 378 // * is_float and is_double return true for xmm_registers 379 // (so is_single_fpu and is_single_xmm are true) 380 // * So you must always check for is_???_xmm prior to is_???_fpu to 381 // distinguish between fpu- and xmm-registers 382 383 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } 384 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } 385 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } 386 387 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } 388 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } 389 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } 390 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } 391 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } 392 393 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } 394 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } 395 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } 396 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } 397 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } 398 399 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } 400 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } 401 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } 402 403 // fast accessor functions for special bits that do not work for pointers 404 // (in this functions, the check for is_pointer() is omitted) 405 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } 406 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } 407 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } 408 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } 409 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } 410 411 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } 412 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } 413 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } 414 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } 415 416 417 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } 418 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } 419 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } 420 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 421 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 422 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } 423 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 424 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 425 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } 426 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 427 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 428 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } 429 430 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } 431 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } 432 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } 433 434 Register as_register() const; 435 Register as_register_lo() const; 436 Register as_register_hi() const; 437 438 Register as_pointer_register() { 439 #ifdef _LP64 440 if (is_double_cpu()) { 441 assert(as_register_lo() == as_register_hi(), "should be a single register"); 442 return as_register_lo(); 443 } 444 #endif 445 return as_register(); 446 } 447 448 #ifdef X86 449 XMMRegister as_xmm_float_reg() const; 450 XMMRegister as_xmm_double_reg() const; 451 // for compatibility with RInfo 452 int fpu () const { return lo_reg_half(); } 453 #endif // X86 454 #if defined(SPARC) || defined(ARM) || defined(PPC) 455 FloatRegister as_float_reg () const; 456 FloatRegister as_double_reg () const; 457 #endif 458 459 jint as_jint() const { return as_constant_ptr()->as_jint(); } 460 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } 461 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } 462 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } 463 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } 464 465 void print() const PRODUCT_RETURN; 466 void print(outputStream* out) const PRODUCT_RETURN; 467 }; 468 469 470 inline LIR_OprDesc::OprType as_OprType(BasicType type) { 471 switch (type) { 472 case T_INT: return LIR_OprDesc::int_type; 473 case T_LONG: return LIR_OprDesc::long_type; 474 case T_FLOAT: return LIR_OprDesc::float_type; 475 case T_DOUBLE: return LIR_OprDesc::double_type; 476 case T_OBJECT: 477 case T_ARRAY: return LIR_OprDesc::object_type; 478 case T_ADDRESS: return LIR_OprDesc::address_type; 479 case T_METADATA: return LIR_OprDesc::metadata_type; 480 case T_ILLEGAL: // fall through 481 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; 482 } 483 } 484 485 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { 486 switch (t) { 487 case LIR_OprDesc::int_type: return T_INT; 488 case LIR_OprDesc::long_type: return T_LONG; 489 case LIR_OprDesc::float_type: return T_FLOAT; 490 case LIR_OprDesc::double_type: return T_DOUBLE; 491 case LIR_OprDesc::object_type: return T_OBJECT; 492 case LIR_OprDesc::address_type: return T_ADDRESS; 493 case LIR_OprDesc::metadata_type:return T_METADATA; 494 case LIR_OprDesc::unknown_type: // fall through 495 default: ShouldNotReachHere(); return T_ILLEGAL; 496 } 497 } 498 499 500 // LIR_Address 501 class LIR_Address: public LIR_OprPtr { 502 friend class LIR_OpVisitState; 503 504 public: 505 // NOTE: currently these must be the log2 of the scale factor (and 506 // must also be equivalent to the ScaleFactor enum in 507 // assembler_i486.hpp) 508 enum Scale { 509 times_1 = 0, 510 times_2 = 1, 511 times_4 = 2, 512 times_8 = 3 513 }; 514 515 private: 516 LIR_Opr _base; 517 LIR_Opr _index; 518 Scale _scale; 519 intx _disp; 520 BasicType _type; 521 522 public: 523 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): 524 _base(base) 525 , _index(index) 526 , _scale(times_1) 527 , _type(type) 528 , _disp(0) { verify(); } 529 530 LIR_Address(LIR_Opr base, intx disp, BasicType type): 531 _base(base) 532 , _index(LIR_OprDesc::illegalOpr()) 533 , _scale(times_1) 534 , _type(type) 535 , _disp(disp) { verify(); } 536 537 LIR_Address(LIR_Opr base, BasicType type): 538 _base(base) 539 , _index(LIR_OprDesc::illegalOpr()) 540 , _scale(times_1) 541 , _type(type) 542 , _disp(0) { verify(); } 543 544 #if defined(X86) || defined(ARM) 545 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): 546 _base(base) 547 , _index(index) 548 , _scale(scale) 549 , _type(type) 550 , _disp(disp) { verify(); } 551 #endif // X86 || ARM 552 553 LIR_Opr base() const { return _base; } 554 LIR_Opr index() const { return _index; } 555 Scale scale() const { return _scale; } 556 intx disp() const { return _disp; } 557 558 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } 559 560 virtual LIR_Address* as_address() { return this; } 561 virtual BasicType type() const { return _type; } 562 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 563 564 void verify() const PRODUCT_RETURN; 565 566 static Scale scale(BasicType type); 567 }; 568 569 570 // operand factory 571 class LIR_OprFact: public AllStatic { 572 public: 573 574 static LIR_Opr illegalOpr; 575 576 static LIR_Opr single_cpu(int reg) { 577 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 578 LIR_OprDesc::int_type | 579 LIR_OprDesc::cpu_register | 580 LIR_OprDesc::single_size); 581 } 582 static LIR_Opr single_cpu_oop(int reg) { 583 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 584 LIR_OprDesc::object_type | 585 LIR_OprDesc::cpu_register | 586 LIR_OprDesc::single_size); 587 } 588 static LIR_Opr single_cpu_address(int reg) { 589 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 590 LIR_OprDesc::address_type | 591 LIR_OprDesc::cpu_register | 592 LIR_OprDesc::single_size); 593 } 594 static LIR_Opr single_cpu_metadata(int reg) { 595 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 596 LIR_OprDesc::metadata_type | 597 LIR_OprDesc::cpu_register | 598 LIR_OprDesc::single_size); 599 } 600 static LIR_Opr double_cpu(int reg1, int reg2) { 601 LP64_ONLY(assert(reg1 == reg2, "must be identical")); 602 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 603 (reg2 << LIR_OprDesc::reg2_shift) | 604 LIR_OprDesc::long_type | 605 LIR_OprDesc::cpu_register | 606 LIR_OprDesc::double_size); 607 } 608 609 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 610 LIR_OprDesc::float_type | 611 LIR_OprDesc::fpu_register | 612 LIR_OprDesc::single_size); } 613 #if defined(ARM) 614 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } 615 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } 616 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } 617 #endif 618 #ifdef SPARC 619 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 620 (reg2 << LIR_OprDesc::reg2_shift) | 621 LIR_OprDesc::double_type | 622 LIR_OprDesc::fpu_register | 623 LIR_OprDesc::double_size); } 624 #endif 625 #ifdef X86 626 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 627 (reg << LIR_OprDesc::reg2_shift) | 628 LIR_OprDesc::double_type | 629 LIR_OprDesc::fpu_register | 630 LIR_OprDesc::double_size); } 631 632 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 633 LIR_OprDesc::float_type | 634 LIR_OprDesc::fpu_register | 635 LIR_OprDesc::single_size | 636 LIR_OprDesc::is_xmm_mask); } 637 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 638 (reg << LIR_OprDesc::reg2_shift) | 639 LIR_OprDesc::double_type | 640 LIR_OprDesc::fpu_register | 641 LIR_OprDesc::double_size | 642 LIR_OprDesc::is_xmm_mask); } 643 #endif // X86 644 #ifdef PPC 645 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 646 (reg << LIR_OprDesc::reg2_shift) | 647 LIR_OprDesc::double_type | 648 LIR_OprDesc::fpu_register | 649 LIR_OprDesc::double_size); } 650 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | 651 LIR_OprDesc::float_type | 652 LIR_OprDesc::cpu_register | 653 LIR_OprDesc::single_size); } 654 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | 655 (reg1 << LIR_OprDesc::reg2_shift) | 656 LIR_OprDesc::double_type | 657 LIR_OprDesc::cpu_register | 658 LIR_OprDesc::double_size); } 659 #endif // PPC 660 661 static LIR_Opr virtual_register(int index, BasicType type) { 662 LIR_Opr res; 663 switch (type) { 664 case T_OBJECT: // fall through 665 case T_ARRAY: 666 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 667 LIR_OprDesc::object_type | 668 LIR_OprDesc::cpu_register | 669 LIR_OprDesc::single_size | 670 LIR_OprDesc::virtual_mask); 671 break; 672 673 case T_METADATA: 674 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 675 LIR_OprDesc::metadata_type| 676 LIR_OprDesc::cpu_register | 677 LIR_OprDesc::single_size | 678 LIR_OprDesc::virtual_mask); 679 break; 680 681 case T_INT: 682 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 683 LIR_OprDesc::int_type | 684 LIR_OprDesc::cpu_register | 685 LIR_OprDesc::single_size | 686 LIR_OprDesc::virtual_mask); 687 break; 688 689 case T_ADDRESS: 690 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 691 LIR_OprDesc::address_type | 692 LIR_OprDesc::cpu_register | 693 LIR_OprDesc::single_size | 694 LIR_OprDesc::virtual_mask); 695 break; 696 697 case T_LONG: 698 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 699 LIR_OprDesc::long_type | 700 LIR_OprDesc::cpu_register | 701 LIR_OprDesc::double_size | 702 LIR_OprDesc::virtual_mask); 703 break; 704 705 #ifdef __SOFTFP__ 706 case T_FLOAT: 707 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 708 LIR_OprDesc::float_type | 709 LIR_OprDesc::cpu_register | 710 LIR_OprDesc::single_size | 711 LIR_OprDesc::virtual_mask); 712 break; 713 case T_DOUBLE: 714 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 715 LIR_OprDesc::double_type | 716 LIR_OprDesc::cpu_register | 717 LIR_OprDesc::double_size | 718 LIR_OprDesc::virtual_mask); 719 break; 720 #else // __SOFTFP__ 721 case T_FLOAT: 722 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 723 LIR_OprDesc::float_type | 724 LIR_OprDesc::fpu_register | 725 LIR_OprDesc::single_size | 726 LIR_OprDesc::virtual_mask); 727 break; 728 729 case 730 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 731 LIR_OprDesc::double_type | 732 LIR_OprDesc::fpu_register | 733 LIR_OprDesc::double_size | 734 LIR_OprDesc::virtual_mask); 735 break; 736 #endif // __SOFTFP__ 737 default: ShouldNotReachHere(); res = illegalOpr; 738 } 739 740 #ifdef ASSERT 741 res->validate_type(); 742 assert(res->vreg_number() == index, "conversion check"); 743 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); 744 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 745 746 // old-style calculation; check if old and new method are equal 747 LIR_OprDesc::OprType t = as_OprType(type); 748 #ifdef __SOFTFP__ 749 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 750 t | 751 LIR_OprDesc::cpu_register | 752 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 753 #else // __SOFTFP__ 754 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | 755 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | 756 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 757 assert(res == old_res, "old and new method not equal"); 758 #endif // __SOFTFP__ 759 #endif // ASSERT 760 761 return res; 762 } 763 764 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as 765 // the index is platform independent; a double stack useing indeces 2 and 3 has always 766 // index 2. 767 static LIR_Opr stack(int index, BasicType type) { 768 LIR_Opr res; 769 switch (type) { 770 case T_OBJECT: // fall through 771 case T_ARRAY: 772 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 773 LIR_OprDesc::object_type | 774 LIR_OprDesc::stack_value | 775 LIR_OprDesc::single_size); 776 break; 777 778 case T_METADATA: 779 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 780 LIR_OprDesc::metadata_type | 781 LIR_OprDesc::stack_value | 782 LIR_OprDesc::single_size); 783 break; 784 case T_INT: 785 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 786 LIR_OprDesc::int_type | 787 LIR_OprDesc::stack_value | 788 LIR_OprDesc::single_size); 789 break; 790 791 case T_ADDRESS: 792 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 793 LIR_OprDesc::address_type | 794 LIR_OprDesc::stack_value | 795 LIR_OprDesc::single_size); 796 break; 797 798 case T_LONG: 799 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 800 LIR_OprDesc::long_type | 801 LIR_OprDesc::stack_value | 802 LIR_OprDesc::double_size); 803 break; 804 805 case T_FLOAT: 806 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 807 LIR_OprDesc::float_type | 808 LIR_OprDesc::stack_value | 809 LIR_OprDesc::single_size); 810 break; 811 case T_DOUBLE: 812 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 813 LIR_OprDesc::double_type | 814 LIR_OprDesc::stack_value | 815 LIR_OprDesc::double_size); 816 break; 817 818 default: ShouldNotReachHere(); res = illegalOpr; 819 } 820 821 #ifdef ASSERT 822 assert(index >= 0, "index must be positive"); 823 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 824 825 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 826 LIR_OprDesc::stack_value | 827 as_OprType(type) | 828 LIR_OprDesc::size_for(type)); 829 assert(res == old_res, "old and new method not equal"); 830 #endif 831 832 return res; 833 } 834 835 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } 836 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } 837 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } 838 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } 839 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } 840 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } 841 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } 842 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } 843 static LIR_Opr illegal() { return (LIR_Opr)-1; } 844 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } 845 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); } 846 847 static LIR_Opr value_type(ValueType* type); 848 static LIR_Opr dummy_value_type(ValueType* type); 849 }; 850 851 852 //------------------------------------------------------------------------------- 853 // LIR Instructions 854 //------------------------------------------------------------------------------- 855 // 856 // Note: 857 // - every instruction has a result operand 858 // - every instruction has an CodeEmitInfo operand (can be revisited later) 859 // - every instruction has a LIR_OpCode operand 860 // - LIR_OpN, means an instruction that has N input operands 861 // 862 // class hierarchy: 863 // 864 class LIR_Op; 865 class LIR_Op0; 866 class LIR_OpLabel; 867 class LIR_Op1; 868 class LIR_OpBranch; 869 class LIR_OpConvert; 870 class LIR_OpAllocObj; 871 class LIR_OpRoundFP; 872 class LIR_Op2; 873 class LIR_OpDelay; 874 class LIR_Op3; 875 class LIR_OpAllocArray; 876 class LIR_OpCall; 877 class LIR_OpJavaCall; 878 class LIR_OpRTCall; 879 class LIR_OpArrayCopy; 880 class LIR_OpUpdateCRC32; 881 class LIR_OpLock; 882 class LIR_OpTypeCheck; 883 class LIR_OpCompareAndSwap; 884 class LIR_OpProfileCall; 885 #ifdef ASSERT 886 class LIR_OpAssert; 887 #endif 888 889 // LIR operation codes 890 enum LIR_Code { 891 lir_none 892 , begin_op0 893 , lir_word_align 894 , lir_label 895 , lir_nop 896 , lir_backwardbranch_target 897 , lir_std_entry 898 , lir_osr_entry 899 , lir_build_frame 900 , lir_fpop_raw 901 , lir_24bit_FPU 902 , lir_reset_FPU 903 , lir_breakpoint 904 , lir_rtcall 905 , lir_membar 906 , lir_membar_acquire 907 , lir_membar_release 908 , lir_membar_loadload 909 , lir_membar_storestore 910 , lir_membar_loadstore 911 , lir_membar_storeload 912 , lir_get_thread 913 , end_op0 914 , begin_op1 915 , lir_fxch 916 , lir_fld 917 , lir_ffree 918 , lir_push 919 , lir_pop 920 , lir_null_check 921 , lir_return 922 , lir_leal 923 , lir_neg 924 , lir_branch 925 , lir_cond_float_branch 926 , lir_move 927 , lir_prefetchr 928 , lir_prefetchw 929 , lir_convert 930 , lir_alloc_object 931 , lir_monaddr 932 , lir_roundfp 933 , lir_safepoint 934 , lir_pack64 935 , lir_unpack64 936 , lir_unwind 937 , end_op1 938 , begin_op2 939 , lir_cmp 940 , lir_cmp_l2i 941 , lir_ucmp_fd2i 942 , lir_cmp_fd2i 943 , lir_cmove 944 , lir_add 945 , lir_sub 946 , lir_mul 947 , lir_mul_strictfp 948 , lir_div 949 , lir_div_strictfp 950 , lir_rem 951 , lir_sqrt 952 , lir_abs 953 , lir_sin 954 , lir_cos 955 , lir_tan 956 , lir_log 957 , lir_log10 958 , lir_exp 959 , lir_pow 960 , lir_logic_and 961 , lir_logic_or 962 , lir_logic_xor 963 , lir_shl 964 , lir_shr 965 , lir_ushr 966 , lir_alloc_array 967 , lir_throw 968 , lir_compare_to 969 , lir_xadd 970 , lir_xchg 971 , end_op2 972 , begin_op3 973 , lir_idiv 974 , lir_irem 975 , end_op3 976 , begin_opJavaCall 977 , lir_static_call 978 , lir_optvirtual_call 979 , lir_icvirtual_call 980 , lir_virtual_call 981 , lir_dynamic_call 982 , end_opJavaCall 983 , begin_opArrayCopy 984 , lir_arraycopy 985 , end_opArrayCopy 986 , begin_opUpdateCRC32 987 , lir_updatecrc32 988 , end_opUpdateCRC32 989 , begin_opLock 990 , lir_lock 991 , lir_unlock 992 , end_opLock 993 , begin_delay_slot 994 , lir_delay_slot 995 , end_delay_slot 996 , begin_opTypeCheck 997 , lir_instanceof 998 , lir_checkcast 999 , lir_store_check 1000 , end_opTypeCheck 1001 , begin_opCompareAndSwap 1002 , lir_cas_long 1003 , lir_cas_obj 1004 , lir_cas_int 1005 , end_opCompareAndSwap 1006 , begin_opMDOProfile 1007 , lir_profile_call 1008 , end_opMDOProfile 1009 , begin_opAssert 1010 , lir_assert 1011 , end_opAssert 1012 }; 1013 1014 1015 enum LIR_Condition { 1016 lir_cond_equal 1017 , lir_cond_notEqual 1018 , lir_cond_less 1019 , lir_cond_lessEqual 1020 , lir_cond_greaterEqual 1021 , lir_cond_greater 1022 , lir_cond_belowEqual 1023 , lir_cond_aboveEqual 1024 , lir_cond_always 1025 , lir_cond_unknown = -1 1026 }; 1027 1028 1029 enum LIR_PatchCode { 1030 lir_patch_none, 1031 lir_patch_low, 1032 lir_patch_high, 1033 lir_patch_normal 1034 }; 1035 1036 1037 enum LIR_MoveKind { 1038 lir_move_normal, 1039 lir_move_volatile, 1040 lir_move_unaligned, 1041 lir_move_wide, 1042 lir_move_max_flag 1043 }; 1044 1045 1046 // -------------------------------------------------- 1047 // LIR_Op 1048 // -------------------------------------------------- 1049 class LIR_Op: public CompilationResourceObj { 1050 friend class LIR_OpVisitState; 1051 1052 #ifdef ASSERT 1053 private: 1054 const char * _file; 1055 int _line; 1056 #endif 1057 1058 protected: 1059 LIR_Opr _result; 1060 unsigned short _code; 1061 unsigned short _flags; 1062 CodeEmitInfo* _info; 1063 int _id; // value id for register allocation 1064 int _fpu_pop_count; 1065 Instruction* _source; // for debugging 1066 1067 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; 1068 1069 protected: 1070 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } 1071 1072 public: 1073 LIR_Op() 1074 : _result(LIR_OprFact::illegalOpr) 1075 , _code(lir_none) 1076 , _flags(0) 1077 , _info(NULL) 1078 #ifdef ASSERT 1079 , _file(NULL) 1080 , _line(0) 1081 #endif 1082 , _fpu_pop_count(0) 1083 , _source(NULL) 1084 , _id(-1) {} 1085 1086 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) 1087 : _result(result) 1088 , _code(code) 1089 , _flags(0) 1090 , _info(info) 1091 #ifdef ASSERT 1092 , _file(NULL) 1093 , _line(0) 1094 #endif 1095 , _fpu_pop_count(0) 1096 , _source(NULL) 1097 , _id(-1) {} 1098 1099 CodeEmitInfo* info() const { return _info; } 1100 LIR_Code code() const { return (LIR_Code)_code; } 1101 LIR_Opr result_opr() const { return _result; } 1102 void set_result_opr(LIR_Opr opr) { _result = opr; } 1103 1104 #ifdef ASSERT 1105 void set_file_and_line(const char * file, int line) { 1106 _file = file; 1107 _line = line; 1108 } 1109 #endif 1110 1111 virtual const char * name() const PRODUCT_RETURN0; 1112 1113 int id() const { return _id; } 1114 void set_id(int id) { _id = id; } 1115 1116 // FPU stack simulation helpers -- only used on Intel 1117 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } 1118 int fpu_pop_count() const { return _fpu_pop_count; } 1119 bool pop_fpu_stack() { return _fpu_pop_count > 0; } 1120 1121 Instruction* source() const { return _source; } 1122 void set_source(Instruction* ins) { _source = ins; } 1123 1124 virtual void emit_code(LIR_Assembler* masm) = 0; 1125 virtual void print_instr(outputStream* out) const = 0; 1126 virtual void print_on(outputStream* st) const PRODUCT_RETURN; 1127 1128 virtual LIR_OpCall* as_OpCall() { return NULL; } 1129 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } 1130 virtual LIR_OpLabel* as_OpLabel() { return NULL; } 1131 virtual LIR_OpDelay* as_OpDelay() { return NULL; } 1132 virtual LIR_OpLock* as_OpLock() { return NULL; } 1133 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } 1134 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } 1135 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } 1136 virtual LIR_OpBranch* as_OpBranch() { return NULL; } 1137 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } 1138 virtual LIR_OpConvert* as_OpConvert() { return NULL; } 1139 virtual LIR_Op0* as_Op0() { return NULL; } 1140 virtual LIR_Op1* as_Op1() { return NULL; } 1141 virtual LIR_Op2* as_Op2() { return NULL; } 1142 virtual LIR_Op3* as_Op3() { return NULL; } 1143 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } 1144 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } 1145 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } 1146 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } 1147 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } 1148 #ifdef ASSERT 1149 virtual LIR_OpAssert* as_OpAssert() { return NULL; } 1150 #endif 1151 1152 virtual void verify() const {} 1153 }; 1154 1155 // for calls 1156 class LIR_OpCall: public LIR_Op { 1157 friend class LIR_OpVisitState; 1158 1159 protected: 1160 address _addr; 1161 LIR_OprList* _arguments; 1162 protected: 1163 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, 1164 LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1165 : LIR_Op(code, result, info) 1166 , _arguments(arguments) 1167 , _addr(addr) {} 1168 1169 public: 1170 address addr() const { return _addr; } 1171 const LIR_OprList* arguments() const { return _arguments; } 1172 virtual LIR_OpCall* as_OpCall() { return this; } 1173 }; 1174 1175 1176 // -------------------------------------------------- 1177 // LIR_OpJavaCall 1178 // -------------------------------------------------- 1179 class LIR_OpJavaCall: public LIR_OpCall { 1180 friend class LIR_OpVisitState; 1181 1182 private: 1183 ciMethod* _method; 1184 LIR_Opr _receiver; 1185 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. 1186 1187 public: 1188 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1189 LIR_Opr receiver, LIR_Opr result, 1190 address addr, LIR_OprList* arguments, 1191 CodeEmitInfo* info) 1192 : LIR_OpCall(code, addr, result, arguments, info) 1193 , _receiver(receiver) 1194 , _method(method) 1195 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1196 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1197 1198 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1199 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, 1200 LIR_OprList* arguments, CodeEmitInfo* info) 1201 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) 1202 , _receiver(receiver) 1203 , _method(method) 1204 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1205 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1206 1207 LIR_Opr receiver() const { return _receiver; } 1208 ciMethod* method() const { return _method; } 1209 1210 // JSR 292 support. 1211 bool is_invokedynamic() const { return code() == lir_dynamic_call; } 1212 bool is_method_handle_invoke() const { 1213 return 1214 is_invokedynamic() // An invokedynamic is always a MethodHandle call site. 1215 || 1216 method()->is_compiled_lambda_form() // Java-generated adapter 1217 || 1218 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic 1219 } 1220 1221 intptr_t vtable_offset() const { 1222 assert(_code == lir_virtual_call, "only have vtable for real vcall"); 1223 return (intptr_t) addr(); 1224 } 1225 1226 virtual void emit_code(LIR_Assembler* masm); 1227 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } 1228 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1229 }; 1230 1231 // -------------------------------------------------- 1232 // LIR_OpLabel 1233 // -------------------------------------------------- 1234 // Location where a branch can continue 1235 class LIR_OpLabel: public LIR_Op { 1236 friend class LIR_OpVisitState; 1237 1238 private: 1239 Label* _label; 1240 public: 1241 LIR_OpLabel(Label* lbl) 1242 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) 1243 , _label(lbl) {} 1244 Label* label() const { return _label; } 1245 1246 virtual void emit_code(LIR_Assembler* masm); 1247 virtual LIR_OpLabel* as_OpLabel() { return this; } 1248 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1249 }; 1250 1251 // LIR_OpArrayCopy 1252 class LIR_OpArrayCopy: public LIR_Op { 1253 friend class LIR_OpVisitState; 1254 1255 private: 1256 ArrayCopyStub* _stub; 1257 LIR_Opr _src; 1258 LIR_Opr _src_pos; 1259 LIR_Opr _dst; 1260 LIR_Opr _dst_pos; 1261 LIR_Opr _length; 1262 LIR_Opr _tmp; 1263 ciArrayKlass* _expected_type; 1264 int _flags; 1265 1266 public: 1267 enum Flags { 1268 src_null_check = 1 << 0, 1269 dst_null_check = 1 << 1, 1270 src_pos_positive_check = 1 << 2, 1271 dst_pos_positive_check = 1 << 3, 1272 length_positive_check = 1 << 4, 1273 src_range_check = 1 << 5, 1274 dst_range_check = 1 << 6, 1275 type_check = 1 << 7, 1276 overlapping = 1 << 8, 1277 unaligned = 1 << 9, 1278 src_objarray = 1 << 10, 1279 dst_objarray = 1 << 11, 1280 all_flags = (1 << 12) - 1 1281 }; 1282 1283 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, 1284 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); 1285 1286 LIR_Opr src() const { return _src; } 1287 LIR_Opr src_pos() const { return _src_pos; } 1288 LIR_Opr dst() const { return _dst; } 1289 LIR_Opr dst_pos() const { return _dst_pos; } 1290 LIR_Opr length() const { return _length; } 1291 LIR_Opr tmp() const { return _tmp; } 1292 int flags() const { return _flags; } 1293 ciArrayKlass* expected_type() const { return _expected_type; } 1294 ArrayCopyStub* stub() const { return _stub; } 1295 1296 virtual void emit_code(LIR_Assembler* masm); 1297 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } 1298 void print_instr(outputStream* out) const PRODUCT_RETURN; 1299 }; 1300 1301 // LIR_OpUpdateCRC32 1302 class LIR_OpUpdateCRC32: public LIR_Op { 1303 friend class LIR_OpVisitState; 1304 1305 private: 1306 LIR_Opr _crc; 1307 LIR_Opr _val; 1308 1309 public: 1310 1311 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res); 1312 1313 LIR_Opr crc() const { return _crc; } 1314 LIR_Opr val() const { return _val; } 1315 1316 virtual void emit_code(LIR_Assembler* masm); 1317 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; } 1318 void print_instr(outputStream* out) const PRODUCT_RETURN; 1319 }; 1320 1321 // -------------------------------------------------- 1322 // LIR_Op0 1323 // -------------------------------------------------- 1324 class LIR_Op0: public LIR_Op { 1325 friend class LIR_OpVisitState; 1326 1327 public: 1328 LIR_Op0(LIR_Code code) 1329 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1330 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) 1331 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1332 1333 virtual void emit_code(LIR_Assembler* masm); 1334 virtual LIR_Op0* as_Op0() { return this; } 1335 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1336 }; 1337 1338 1339 // -------------------------------------------------- 1340 // LIR_Op1 1341 // -------------------------------------------------- 1342 1343 class LIR_Op1: public LIR_Op { 1344 friend class LIR_OpVisitState; 1345 1346 protected: 1347 LIR_Opr _opr; // input operand 1348 BasicType _type; // Operand types 1349 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) 1350 1351 static void print_patch_code(outputStream* out, LIR_PatchCode code); 1352 1353 void set_kind(LIR_MoveKind kind) { 1354 assert(code() == lir_move, "must be"); 1355 _flags = kind; 1356 } 1357 1358 public: 1359 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) 1360 : LIR_Op(code, result, info) 1361 , _opr(opr) 1362 , _patch(patch) 1363 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1364 1365 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) 1366 : LIR_Op(code, result, info) 1367 , _opr(opr) 1368 , _patch(patch) 1369 , _type(type) { 1370 assert(code == lir_move, "must be"); 1371 set_kind(kind); 1372 } 1373 1374 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) 1375 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1376 , _opr(opr) 1377 , _patch(lir_patch_none) 1378 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1379 1380 LIR_Opr in_opr() const { return _opr; } 1381 LIR_PatchCode patch_code() const { return _patch; } 1382 BasicType type() const { return _type; } 1383 1384 LIR_MoveKind move_kind() const { 1385 assert(code() == lir_move, "must be"); 1386 return (LIR_MoveKind)_flags; 1387 } 1388 1389 virtual void emit_code(LIR_Assembler* masm); 1390 virtual LIR_Op1* as_Op1() { return this; } 1391 virtual const char * name() const PRODUCT_RETURN0; 1392 1393 void set_in_opr(LIR_Opr opr) { _opr = opr; } 1394 1395 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1396 virtual void verify() const; 1397 }; 1398 1399 1400 // for runtime calls 1401 class LIR_OpRTCall: public LIR_OpCall { 1402 friend class LIR_OpVisitState; 1403 1404 private: 1405 LIR_Opr _tmp; 1406 public: 1407 LIR_OpRTCall(address addr, LIR_Opr tmp, 1408 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1409 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) 1410 , _tmp(tmp) {} 1411 1412 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1413 virtual void emit_code(LIR_Assembler* masm); 1414 virtual LIR_OpRTCall* as_OpRTCall() { return this; } 1415 1416 LIR_Opr tmp() const { return _tmp; } 1417 1418 virtual void verify() const; 1419 }; 1420 1421 1422 class LIR_OpBranch: public LIR_Op { 1423 friend class LIR_OpVisitState; 1424 1425 private: 1426 LIR_Condition _cond; 1427 BasicType _type; 1428 Label* _label; 1429 BlockBegin* _block; // if this is a branch to a block, this is the block 1430 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block 1431 CodeStub* _stub; // if this is a branch to a stub, this is the stub 1432 1433 public: 1434 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) 1435 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) 1436 , _cond(cond) 1437 , _type(type) 1438 , _label(lbl) 1439 , _block(NULL) 1440 , _ublock(NULL) 1441 , _stub(NULL) { } 1442 1443 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); 1444 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); 1445 1446 // for unordered comparisons 1447 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); 1448 1449 LIR_Condition cond() const { return _cond; } 1450 BasicType type() const { return _type; } 1451 Label* label() const { return _label; } 1452 BlockBegin* block() const { return _block; } 1453 BlockBegin* ublock() const { return _ublock; } 1454 CodeStub* stub() const { return _stub; } 1455 1456 void change_block(BlockBegin* b); 1457 void change_ublock(BlockBegin* b); 1458 void negate_cond(); 1459 1460 virtual void emit_code(LIR_Assembler* masm); 1461 virtual LIR_OpBranch* as_OpBranch() { return this; } 1462 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1463 }; 1464 1465 1466 class ConversionStub; 1467 1468 class LIR_OpConvert: public LIR_Op1 { 1469 friend class LIR_OpVisitState; 1470 1471 private: 1472 Bytecodes::Code _bytecode; 1473 ConversionStub* _stub; 1474 #ifdef PPC 1475 LIR_Opr _tmp1; 1476 LIR_Opr _tmp2; 1477 #endif 1478 1479 public: 1480 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) 1481 : LIR_Op1(lir_convert, opr, result) 1482 , _stub(stub) 1483 #ifdef PPC 1484 , _tmp1(LIR_OprDesc::illegalOpr()) 1485 , _tmp2(LIR_OprDesc::illegalOpr()) 1486 #endif 1487 , _bytecode(code) {} 1488 1489 #ifdef PPC 1490 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub 1491 ,LIR_Opr tmp1, LIR_Opr tmp2) 1492 : LIR_Op1(lir_convert, opr, result) 1493 , _stub(stub) 1494 , _tmp1(tmp1) 1495 , _tmp2(tmp2) 1496 , _bytecode(code) {} 1497 #endif 1498 1499 Bytecodes::Code bytecode() const { return _bytecode; } 1500 ConversionStub* stub() const { return _stub; } 1501 #ifdef PPC 1502 LIR_Opr tmp1() const { return _tmp1; } 1503 LIR_Opr tmp2() const { return _tmp2; } 1504 #endif 1505 1506 virtual void emit_code(LIR_Assembler* masm); 1507 virtual LIR_OpConvert* as_OpConvert() { return this; } 1508 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1509 1510 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; 1511 }; 1512 1513 1514 // LIR_OpAllocObj 1515 class LIR_OpAllocObj : public LIR_Op1 { 1516 friend class LIR_OpVisitState; 1517 1518 private: 1519 LIR_Opr _tmp1; 1520 LIR_Opr _tmp2; 1521 LIR_Opr _tmp3; 1522 LIR_Opr _tmp4; 1523 int _hdr_size; 1524 int _obj_size; 1525 CodeStub* _stub; 1526 bool _init_check; 1527 1528 public: 1529 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, 1530 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1531 int hdr_size, int obj_size, bool init_check, CodeStub* stub) 1532 : LIR_Op1(lir_alloc_object, klass, result) 1533 , _tmp1(t1) 1534 , _tmp2(t2) 1535 , _tmp3(t3) 1536 , _tmp4(t4) 1537 , _hdr_size(hdr_size) 1538 , _obj_size(obj_size) 1539 , _init_check(init_check) 1540 , _stub(stub) { } 1541 1542 LIR_Opr klass() const { return in_opr(); } 1543 LIR_Opr obj() const { return result_opr(); } 1544 LIR_Opr tmp1() const { return _tmp1; } 1545 LIR_Opr tmp2() const { return _tmp2; } 1546 LIR_Opr tmp3() const { return _tmp3; } 1547 LIR_Opr tmp4() const { return _tmp4; } 1548 int header_size() const { return _hdr_size; } 1549 int object_size() const { return _obj_size; } 1550 bool init_check() const { return _init_check; } 1551 CodeStub* stub() const { return _stub; } 1552 1553 virtual void emit_code(LIR_Assembler* masm); 1554 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } 1555 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1556 }; 1557 1558 1559 // LIR_OpRoundFP 1560 class LIR_OpRoundFP : public LIR_Op1 { 1561 friend class LIR_OpVisitState; 1562 1563 private: 1564 LIR_Opr _tmp; 1565 1566 public: 1567 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) 1568 : LIR_Op1(lir_roundfp, reg, result) 1569 , _tmp(stack_loc_temp) {} 1570 1571 LIR_Opr tmp() const { return _tmp; } 1572 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } 1573 void print_instr(outputStream* out) const PRODUCT_RETURN; 1574 }; 1575 1576 // LIR_OpTypeCheck 1577 class LIR_OpTypeCheck: public LIR_Op { 1578 friend class LIR_OpVisitState; 1579 1580 private: 1581 LIR_Opr _object; 1582 LIR_Opr _array; 1583 ciKlass* _klass; 1584 LIR_Opr _tmp1; 1585 LIR_Opr _tmp2; 1586 LIR_Opr _tmp3; 1587 bool _fast_check; 1588 CodeEmitInfo* _info_for_patch; 1589 CodeEmitInfo* _info_for_exception; 1590 CodeStub* _stub; 1591 ciMethod* _profiled_method; 1592 int _profiled_bci; 1593 bool _should_profile; 1594 1595 public: 1596 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 1597 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1598 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); 1599 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, 1600 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); 1601 1602 LIR_Opr object() const { return _object; } 1603 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } 1604 LIR_Opr tmp1() const { return _tmp1; } 1605 LIR_Opr tmp2() const { return _tmp2; } 1606 LIR_Opr tmp3() const { return _tmp3; } 1607 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } 1608 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } 1609 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } 1610 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } 1611 CodeStub* stub() const { return _stub; } 1612 1613 // MethodData* profiling 1614 void set_profiled_method(ciMethod *method) { _profiled_method = method; } 1615 void set_profiled_bci(int bci) { _profiled_bci = bci; } 1616 void set_should_profile(bool b) { _should_profile = b; } 1617 ciMethod* profiled_method() const { return _profiled_method; } 1618 int profiled_bci() const { return _profiled_bci; } 1619 bool should_profile() const { return _should_profile; } 1620 1621 virtual void emit_code(LIR_Assembler* masm); 1622 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } 1623 void print_instr(outputStream* out) const PRODUCT_RETURN; 1624 }; 1625 1626 // LIR_Op2 1627 class LIR_Op2: public LIR_Op { 1628 friend class LIR_OpVisitState; 1629 1630 int _fpu_stack_size; // for sin/cos implementation on Intel 1631 1632 protected: 1633 LIR_Opr _opr1; 1634 LIR_Opr _opr2; 1635 BasicType _type; 1636 LIR_Opr _tmp1; 1637 LIR_Opr _tmp2; 1638 LIR_Opr _tmp3; 1639 LIR_Opr _tmp4; 1640 LIR_Opr _tmp5; 1641 LIR_Condition _condition; 1642 1643 void verify() const; 1644 1645 public: 1646 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) 1647 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1648 , _opr1(opr1) 1649 , _opr2(opr2) 1650 , _type(T_ILLEGAL) 1651 , _condition(condition) 1652 , _fpu_stack_size(0) 1653 , _tmp1(LIR_OprFact::illegalOpr) 1654 , _tmp2(LIR_OprFact::illegalOpr) 1655 , _tmp3(LIR_OprFact::illegalOpr) 1656 , _tmp4(LIR_OprFact::illegalOpr) 1657 , _tmp5(LIR_OprFact::illegalOpr) { 1658 assert(code == lir_cmp || code == lir_assert, "code check"); 1659 } 1660 1661 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) 1662 : LIR_Op(code, result, NULL) 1663 , _opr1(opr1) 1664 , _opr2(opr2) 1665 , _type(type) 1666 , _condition(condition) 1667 , _fpu_stack_size(0) 1668 , _tmp1(LIR_OprFact::illegalOpr) 1669 , _tmp2(LIR_OprFact::illegalOpr) 1670 , _tmp3(LIR_OprFact::illegalOpr) 1671 , _tmp4(LIR_OprFact::illegalOpr) 1672 , _tmp5(LIR_OprFact::illegalOpr) { 1673 assert(code == lir_cmove, "code check"); 1674 assert(type != T_ILLEGAL, "cmove should have type"); 1675 } 1676 1677 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, 1678 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) 1679 : LIR_Op(code, result, info) 1680 , _opr1(opr1) 1681 , _opr2(opr2) 1682 , _type(type) 1683 , _condition(lir_cond_unknown) 1684 , _fpu_stack_size(0) 1685 , _tmp1(LIR_OprFact::illegalOpr) 1686 , _tmp2(LIR_OprFact::illegalOpr) 1687 , _tmp3(LIR_OprFact::illegalOpr) 1688 , _tmp4(LIR_OprFact::illegalOpr) 1689 , _tmp5(LIR_OprFact::illegalOpr) { 1690 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1691 } 1692 1693 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, 1694 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) 1695 : LIR_Op(code, result, NULL) 1696 , _opr1(opr1) 1697 , _opr2(opr2) 1698 , _type(T_ILLEGAL) 1699 , _condition(lir_cond_unknown) 1700 , _fpu_stack_size(0) 1701 , _tmp1(tmp1) 1702 , _tmp2(tmp2) 1703 , _tmp3(tmp3) 1704 , _tmp4(tmp4) 1705 , _tmp5(tmp5) { 1706 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1707 } 1708 1709 LIR_Opr in_opr1() const { return _opr1; } 1710 LIR_Opr in_opr2() const { return _opr2; } 1711 BasicType type() const { return _type; } 1712 LIR_Opr tmp1_opr() const { return _tmp1; } 1713 LIR_Opr tmp2_opr() const { return _tmp2; } 1714 LIR_Opr tmp3_opr() const { return _tmp3; } 1715 LIR_Opr tmp4_opr() const { return _tmp4; } 1716 LIR_Opr tmp5_opr() const { return _tmp5; } 1717 LIR_Condition condition() const { 1718 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; 1719 } 1720 void set_condition(LIR_Condition condition) { 1721 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; 1722 } 1723 1724 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } 1725 int fpu_stack_size() const { return _fpu_stack_size; } 1726 1727 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } 1728 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } 1729 1730 virtual void emit_code(LIR_Assembler* masm); 1731 virtual LIR_Op2* as_Op2() { return this; } 1732 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1733 }; 1734 1735 class LIR_OpAllocArray : public LIR_Op { 1736 friend class LIR_OpVisitState; 1737 1738 private: 1739 LIR_Opr _klass; 1740 LIR_Opr _len; 1741 LIR_Opr _tmp1; 1742 LIR_Opr _tmp2; 1743 LIR_Opr _tmp3; 1744 LIR_Opr _tmp4; 1745 BasicType _type; 1746 CodeStub* _stub; 1747 1748 public: 1749 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) 1750 : LIR_Op(lir_alloc_array, result, NULL) 1751 , _klass(klass) 1752 , _len(len) 1753 , _tmp1(t1) 1754 , _tmp2(t2) 1755 , _tmp3(t3) 1756 , _tmp4(t4) 1757 , _type(type) 1758 , _stub(stub) {} 1759 1760 LIR_Opr klass() const { return _klass; } 1761 LIR_Opr len() const { return _len; } 1762 LIR_Opr obj() const { return result_opr(); } 1763 LIR_Opr tmp1() const { return _tmp1; } 1764 LIR_Opr tmp2() const { return _tmp2; } 1765 LIR_Opr tmp3() const { return _tmp3; } 1766 LIR_Opr tmp4() const { return _tmp4; } 1767 BasicType type() const { return _type; } 1768 CodeStub* stub() const { return _stub; } 1769 1770 virtual void emit_code(LIR_Assembler* masm); 1771 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } 1772 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1773 }; 1774 1775 1776 class LIR_Op3: public LIR_Op { 1777 friend class LIR_OpVisitState; 1778 1779 private: 1780 LIR_Opr _opr1; 1781 LIR_Opr _opr2; 1782 LIR_Opr _opr3; 1783 public: 1784 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) 1785 : LIR_Op(code, result, info) 1786 , _opr1(opr1) 1787 , _opr2(opr2) 1788 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } 1789 LIR_Opr in_opr1() const { return _opr1; } 1790 LIR_Opr in_opr2() const { return _opr2; } 1791 LIR_Opr in_opr3() const { return _opr3; } 1792 1793 virtual void emit_code(LIR_Assembler* masm); 1794 virtual LIR_Op3* as_Op3() { return this; } 1795 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1796 }; 1797 1798 1799 //-------------------------------- 1800 class LabelObj: public CompilationResourceObj { 1801 private: 1802 Label _label; 1803 public: 1804 LabelObj() {} 1805 Label* label() { return &_label; } 1806 }; 1807 1808 1809 class LIR_OpLock: public LIR_Op { 1810 friend class LIR_OpVisitState; 1811 1812 private: 1813 LIR_Opr _hdr; 1814 LIR_Opr _obj; 1815 LIR_Opr _lock; 1816 LIR_Opr _scratch; 1817 CodeStub* _stub; 1818 public: 1819 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) 1820 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1821 , _hdr(hdr) 1822 , _obj(obj) 1823 , _lock(lock) 1824 , _scratch(scratch) 1825 , _stub(stub) {} 1826 1827 LIR_Opr hdr_opr() const { return _hdr; } 1828 LIR_Opr obj_opr() const { return _obj; } 1829 LIR_Opr lock_opr() const { return _lock; } 1830 LIR_Opr scratch_opr() const { return _scratch; } 1831 CodeStub* stub() const { return _stub; } 1832 1833 virtual void emit_code(LIR_Assembler* masm); 1834 virtual LIR_OpLock* as_OpLock() { return this; } 1835 void print_instr(outputStream* out) const PRODUCT_RETURN; 1836 }; 1837 1838 1839 class LIR_OpDelay: public LIR_Op { 1840 friend class LIR_OpVisitState; 1841 1842 private: 1843 LIR_Op* _op; 1844 1845 public: 1846 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): 1847 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), 1848 _op(op) { 1849 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); 1850 } 1851 virtual void emit_code(LIR_Assembler* masm); 1852 virtual LIR_OpDelay* as_OpDelay() { return this; } 1853 void print_instr(outputStream* out) const PRODUCT_RETURN; 1854 LIR_Op* delay_op() const { return _op; } 1855 CodeEmitInfo* call_info() const { return info(); } 1856 }; 1857 1858 #ifdef ASSERT 1859 // LIR_OpAssert 1860 class LIR_OpAssert : public LIR_Op2 { 1861 friend class LIR_OpVisitState; 1862 1863 private: 1864 const char* _msg; 1865 bool _halt; 1866 1867 public: 1868 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) 1869 : LIR_Op2(lir_assert, condition, opr1, opr2) 1870 , _halt(halt) 1871 , _msg(msg) { 1872 } 1873 1874 const char* msg() const { return _msg; } 1875 bool halt() const { return _halt; } 1876 1877 virtual void emit_code(LIR_Assembler* masm); 1878 virtual LIR_OpAssert* as_OpAssert() { return this; } 1879 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1880 }; 1881 #endif 1882 1883 // LIR_OpCompareAndSwap 1884 class LIR_OpCompareAndSwap : public LIR_Op { 1885 friend class LIR_OpVisitState; 1886 1887 private: 1888 LIR_Opr _addr; 1889 LIR_Opr _cmp_value; 1890 LIR_Opr _new_value; 1891 LIR_Opr _tmp1; 1892 LIR_Opr _tmp2; 1893 1894 public: 1895 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1896 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) 1897 : LIR_Op(code, result, NULL) // no result, no info 1898 , _addr(addr) 1899 , _cmp_value(cmp_value) 1900 , _new_value(new_value) 1901 , _tmp1(t1) 1902 , _tmp2(t2) { } 1903 1904 LIR_Opr addr() const { return _addr; } 1905 LIR_Opr cmp_value() const { return _cmp_value; } 1906 LIR_Opr new_value() const { return _new_value; } 1907 LIR_Opr tmp1() const { return _tmp1; } 1908 LIR_Opr tmp2() const { return _tmp2; } 1909 1910 virtual void emit_code(LIR_Assembler* masm); 1911 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } 1912 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1913 }; 1914 1915 // LIR_OpProfileCall 1916 class LIR_OpProfileCall : public LIR_Op { 1917 friend class LIR_OpVisitState; 1918 1919 private: 1920 ciMethod* _profiled_method; 1921 int _profiled_bci; 1922 ciMethod* _profiled_callee; 1923 LIR_Opr _mdo; 1924 LIR_Opr _recv; 1925 LIR_Opr _tmp1; 1926 ciKlass* _known_holder; 1927 1928 public: 1929 // Destroys recv 1930 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) 1931 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info 1932 , _profiled_method(profiled_method) 1933 , _profiled_bci(profiled_bci) 1934 , _profiled_callee(profiled_callee) 1935 , _mdo(mdo) 1936 , _recv(recv) 1937 , _tmp1(t1) 1938 , _known_holder(known_holder) { } 1939 1940 ciMethod* profiled_method() const { return _profiled_method; } 1941 int profiled_bci() const { return _profiled_bci; } 1942 ciMethod* profiled_callee() const { return _profiled_callee; } 1943 LIR_Opr mdo() const { return _mdo; } 1944 LIR_Opr recv() const { return _recv; } 1945 LIR_Opr tmp1() const { return _tmp1; } 1946 ciKlass* known_holder() const { return _known_holder; } 1947 1948 virtual void emit_code(LIR_Assembler* masm); 1949 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } 1950 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1951 }; 1952 1953 class LIR_InsertionBuffer; 1954 1955 //--------------------------------LIR_List--------------------------------------------------- 1956 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) 1957 // The LIR instructions are appended by the LIR_List class itself; 1958 // 1959 // Notes: 1960 // - all offsets are(should be) in bytes 1961 // - local positions are specified with an offset, with offset 0 being local 0 1962 1963 class LIR_List: public CompilationResourceObj { 1964 private: 1965 LIR_OpList _operations; 1966 1967 Compilation* _compilation; 1968 #ifndef PRODUCT 1969 BlockBegin* _block; 1970 #endif 1971 #ifdef ASSERT 1972 const char * _file; 1973 int _line; 1974 #endif 1975 1976 void append(LIR_Op* op) { 1977 if (op->source() == NULL) 1978 op->set_source(_compilation->current_instruction()); 1979 #ifndef PRODUCT 1980 if (PrintIRWithLIR) { 1981 _compilation->maybe_print_current_instruction(); 1982 op->print(); tty->cr(); 1983 } 1984 #endif // PRODUCT 1985 1986 _operations.append(op); 1987 1988 #ifdef ASSERT 1989 op->verify(); 1990 op->set_file_and_line(_file, _line); 1991 _file = NULL; 1992 _line = 0; 1993 #endif 1994 } 1995 1996 public: 1997 LIR_List(Compilation* compilation, BlockBegin* block = NULL); 1998 1999 #ifdef ASSERT 2000 void set_file_and_line(const char * file, int line); 2001 #endif 2002 2003 //---------- accessors --------------- 2004 LIR_OpList* instructions_list() { return &_operations; } 2005 int length() const { return _operations.length(); } 2006 LIR_Op* at(int i) const { return _operations.at(i); } 2007 2008 NOT_PRODUCT(BlockBegin* block() const { return _block; }); 2009 2010 // insert LIR_Ops in buffer to right places in LIR_List 2011 void append(LIR_InsertionBuffer* buffer); 2012 2013 //---------- mutators --------------- 2014 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } 2015 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } 2016 void remove_at(int i) { _operations.remove_at(i); } 2017 2018 //---------- printing ------------- 2019 void print_instructions() PRODUCT_RETURN; 2020 2021 2022 //---------- instructions ------------- 2023 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2024 address dest, LIR_OprList* arguments, 2025 CodeEmitInfo* info) { 2026 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); 2027 } 2028 void call_static(ciMethod* method, LIR_Opr result, 2029 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2030 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); 2031 } 2032 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2033 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2034 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); 2035 } 2036 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2037 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { 2038 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); 2039 } 2040 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2041 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2042 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); 2043 } 2044 2045 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } 2046 void word_align() { append(new LIR_Op0(lir_word_align)); } 2047 void membar() { append(new LIR_Op0(lir_membar)); } 2048 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } 2049 void membar_release() { append(new LIR_Op0(lir_membar_release)); } 2050 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } 2051 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } 2052 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } 2053 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } 2054 2055 void nop() { append(new LIR_Op0(lir_nop)); } 2056 void build_frame() { append(new LIR_Op0(lir_build_frame)); } 2057 2058 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } 2059 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } 2060 2061 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } 2062 2063 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } 2064 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } 2065 2066 // result is a stack location for old backend and vreg for UseLinearScan 2067 // stack_loc_temp is an illegal register for old backend 2068 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } 2069 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2070 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2071 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2072 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2073 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } 2074 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } 2075 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { 2076 if (UseCompressedOops) { 2077 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); 2078 } else { 2079 move(src, dst, info); 2080 } 2081 } 2082 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { 2083 if (UseCompressedOops) { 2084 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); 2085 } else { 2086 move(src, dst, info); 2087 } 2088 } 2089 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } 2090 2091 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } 2092 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); 2093 2094 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } 2095 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); 2096 2097 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } 2098 2099 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } 2100 2101 #ifdef PPC 2102 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } 2103 #endif 2104 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } 2105 2106 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } 2107 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } 2108 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } 2109 2110 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } 2111 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } 2112 2113 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } 2114 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { 2115 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); 2116 } 2117 void unwind_exception(LIR_Opr exceptionOop) { 2118 append(new LIR_Op1(lir_unwind, exceptionOop)); 2119 } 2120 2121 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { 2122 append(new LIR_Op2(lir_compare_to, left, right, dst)); 2123 } 2124 2125 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } 2126 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } 2127 2128 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { 2129 append(new LIR_Op2(lir_cmp, condition, left, right, info)); 2130 } 2131 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { 2132 cmp(condition, left, LIR_OprFact::intConst(right), info); 2133 } 2134 2135 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); 2136 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); 2137 2138 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { 2139 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); 2140 } 2141 2142 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2143 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2144 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2145 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2146 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2147 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2148 2149 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } 2150 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } 2151 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } 2152 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 2153 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } 2154 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } 2155 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } 2156 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); } 2157 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); } 2158 2159 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } 2160 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } 2161 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } 2162 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } 2163 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } 2164 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } 2165 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } 2166 2167 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2168 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2169 2170 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2171 2172 void prefetch(LIR_Address* addr, bool is_store); 2173 2174 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2175 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2176 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2177 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2178 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2179 2180 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2181 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2182 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2183 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2184 2185 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); 2186 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); 2187 2188 // jump is an unconditional branch 2189 void jump(BlockBegin* block) { 2190 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); 2191 } 2192 void jump(CodeStub* stub) { 2193 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); 2194 } 2195 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } 2196 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { 2197 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2198 append(new LIR_OpBranch(cond, type, block)); 2199 } 2200 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { 2201 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2202 append(new LIR_OpBranch(cond, type, stub)); 2203 } 2204 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { 2205 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); 2206 append(new LIR_OpBranch(cond, type, block, unordered)); 2207 } 2208 2209 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2210 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2211 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2212 2213 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2214 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2215 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2216 2217 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } 2218 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); 2219 2220 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { 2221 append(new LIR_OpRTCall(routine, tmp, result, arguments)); 2222 } 2223 2224 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, 2225 LIR_OprList* arguments, CodeEmitInfo* info) { 2226 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); 2227 } 2228 2229 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } 2230 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); 2231 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); 2232 2233 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } 2234 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } 2235 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } 2236 2237 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } 2238 2239 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); } 2240 2241 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } 2242 2243 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); 2244 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); 2245 2246 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 2247 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 2248 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 2249 ciMethod* profiled_method, int profiled_bci); 2250 // MethodData* profiling 2251 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { 2252 append(new LIR_OpProfileCall(lir_profile_call, method, bci, callee, mdo, recv, t1, cha_klass)); 2253 } 2254 2255 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); } 2256 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); } 2257 #ifdef ASSERT 2258 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); } 2259 #endif 2260 }; 2261 2262 void print_LIR(BlockList* blocks); 2263 2264 class LIR_InsertionBuffer : public CompilationResourceObj { 2265 private: 2266 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) 2267 2268 // list of insertion points. index and count are stored alternately: 2269 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted 2270 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index 2271 intStack _index_and_count; 2272 2273 // the LIR_Ops to be inserted 2274 LIR_OpList _ops; 2275 2276 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } 2277 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } 2278 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } 2279 2280 #ifdef ASSERT 2281 void verify(); 2282 #endif 2283 public: 2284 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } 2285 2286 // must be called before using the insertion buffer 2287 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } 2288 bool initialized() const { return _lir != NULL; } 2289 // called automatically when the buffer is appended to the LIR_List 2290 void finish() { _lir = NULL; } 2291 2292 // accessors 2293 LIR_List* lir_list() const { return _lir; } 2294 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } 2295 int index_at(int i) const { return _index_and_count.at((i << 1)); } 2296 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } 2297 2298 int number_of_ops() const { return _ops.length(); } 2299 LIR_Op* op_at(int i) const { return _ops.at(i); } 2300 2301 // append an instruction to the buffer 2302 void append(int index, LIR_Op* op); 2303 2304 // instruction 2305 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2306 }; 2307 2308 2309 // 2310 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. 2311 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes 2312 // information about the input, output and temporaries used by the 2313 // op to be recorded. It also records whether the op has call semantics 2314 // and also records all the CodeEmitInfos used by this op. 2315 // 2316 2317 2318 class LIR_OpVisitState: public StackObj { 2319 public: 2320 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; 2321 2322 enum { 2323 maxNumberOfOperands = 20, 2324 maxNumberOfInfos = 4 2325 }; 2326 2327 private: 2328 LIR_Op* _op; 2329 2330 // optimization: the operands and infos are not stored in a variable-length 2331 // list, but in a fixed-size array to save time of size checks and resizing 2332 int _oprs_len[numModes]; 2333 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; 2334 int _info_len; 2335 CodeEmitInfo* _info_new[maxNumberOfInfos]; 2336 2337 bool _has_call; 2338 bool _has_slow_case; 2339 2340 2341 // only include register operands 2342 // addresses are decomposed to the base and index registers 2343 // constants and stack operands are ignored 2344 void append(LIR_Opr& opr, OprMode mode) { 2345 assert(opr->is_valid(), "should not call this otherwise"); 2346 assert(mode >= 0 && mode < numModes, "bad mode"); 2347 2348 if (opr->is_register()) { 2349 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2350 _oprs_new[mode][_oprs_len[mode]++] = &opr; 2351 2352 } else if (opr->is_pointer()) { 2353 LIR_Address* address = opr->as_address_ptr(); 2354 if (address != NULL) { 2355 // special handling for addresses: add base and index register of the address 2356 // both are always input operands or temp if we want to extend 2357 // their liveness! 2358 if (mode == outputMode) { 2359 mode = inputMode; 2360 } 2361 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses"); 2362 if (address->_base->is_valid()) { 2363 assert(address->_base->is_register(), "must be"); 2364 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2365 _oprs_new[mode][_oprs_len[mode]++] = &address->_base; 2366 } 2367 if (address->_index->is_valid()) { 2368 assert(address->_index->is_register(), "must be"); 2369 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2370 _oprs_new[mode][_oprs_len[mode]++] = &address->_index; 2371 } 2372 2373 } else { 2374 assert(opr->is_constant(), "constant operands are not processed"); 2375 } 2376 } else { 2377 assert(opr->is_stack(), "stack operands are not processed"); 2378 } 2379 } 2380 2381 void append(CodeEmitInfo* info) { 2382 assert(info != NULL, "should not call this otherwise"); 2383 assert(_info_len < maxNumberOfInfos, "array overflow"); 2384 _info_new[_info_len++] = info; 2385 } 2386 2387 public: 2388 LIR_OpVisitState() { reset(); } 2389 2390 LIR_Op* op() const { return _op; } 2391 void set_op(LIR_Op* op) { reset(); _op = op; } 2392 2393 bool has_call() const { return _has_call; } 2394 bool has_slow_case() const { return _has_slow_case; } 2395 2396 void reset() { 2397 _op = NULL; 2398 _has_call = false; 2399 _has_slow_case = false; 2400 2401 _oprs_len[inputMode] = 0; 2402 _oprs_len[tempMode] = 0; 2403 _oprs_len[outputMode] = 0; 2404 _info_len = 0; 2405 } 2406 2407 2408 int opr_count(OprMode mode) const { 2409 assert(mode >= 0 && mode < numModes, "bad mode"); 2410 return _oprs_len[mode]; 2411 } 2412 2413 LIR_Opr opr_at(OprMode mode, int index) const { 2414 assert(mode >= 0 && mode < numModes, "bad mode"); 2415 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2416 return *_oprs_new[mode][index]; 2417 } 2418 2419 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { 2420 assert(mode >= 0 && mode < numModes, "bad mode"); 2421 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2422 *_oprs_new[mode][index] = opr; 2423 } 2424 2425 int info_count() const { 2426 return _info_len; 2427 } 2428 2429 CodeEmitInfo* info_at(int index) const { 2430 assert(index < _info_len, "index out of bounds"); 2431 return _info_new[index]; 2432 } 2433 2434 XHandlers* all_xhandler(); 2435 2436 // collects all register operands of the instruction 2437 void visit(LIR_Op* op); 2438 2439 #ifdef ASSERT 2440 // check that an operation has no operands 2441 bool no_operands(LIR_Op* op); 2442 #endif 2443 2444 // LIR_Op visitor functions use these to fill in the state 2445 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } 2446 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } 2447 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } 2448 void do_info(CodeEmitInfo* info) { append(info); } 2449 2450 void do_stub(CodeStub* stub); 2451 void do_call() { _has_call = true; } 2452 void do_slow_case() { _has_slow_case = true; } 2453 void do_slow_case(CodeEmitInfo* info) { 2454 _has_slow_case = true; 2455 append(info); 2456 } 2457 }; 2458 2459 2460 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; 2461 2462 #endif // SHARE_VM_C1_C1_LIR_HPP