429 }
430
431 char buf[256];
432 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
433 cores_per_cpu(), threads_per_core(),
434 cpu_family(), _model, _stepping,
435 (supports_cmov() ? ", cmov" : ""),
436 (supports_cmpxchg8() ? ", cx8" : ""),
437 (supports_fxsr() ? ", fxsr" : ""),
438 (supports_mmx() ? ", mmx" : ""),
439 (supports_sse() ? ", sse" : ""),
440 (supports_sse2() ? ", sse2" : ""),
441 (supports_sse3() ? ", sse3" : ""),
442 (supports_ssse3()? ", ssse3": ""),
443 (supports_sse4_1() ? ", sse4.1" : ""),
444 (supports_sse4_2() ? ", sse4.2" : ""),
445 (supports_popcnt() ? ", popcnt" : ""),
446 (supports_avx() ? ", avx" : ""),
447 (supports_avx2() ? ", avx2" : ""),
448 (supports_aes() ? ", aes" : ""),
449 (supports_erms() ? ", erms" : ""),
450 (supports_mmx_ext() ? ", mmxext" : ""),
451 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
452 (supports_lzcnt() ? ", lzcnt": ""),
453 (supports_sse4a() ? ", sse4a": ""),
454 (supports_ht() ? ", ht": ""),
455 (supports_tsc() ? ", tsc": ""),
456 (supports_tscinv_bit() ? ", tscinvbit": ""),
457 (supports_tscinv() ? ", tscinv": ""));
458 _features_str = strdup(buf);
459
460 // UseSSE is set to the smaller of what hardware supports and what
461 // the command line requires. I.e., you cannot set UseSSE to 2 on
462 // older Pentiums which do not support it.
463 if (UseSSE > 4) UseSSE=4;
464 if (UseSSE < 0) UseSSE=0;
465 if (!supports_sse4_1()) // Drop to 3 if no SSE4 support
466 UseSSE = MIN2((intx)3,UseSSE);
467 if (!supports_sse3()) // Drop to 2 if no SSE3 support
468 UseSSE = MIN2((intx)2,UseSSE);
472 UseSSE = 0;
473
474 if (UseAVX > 2) UseAVX=2;
475 if (UseAVX < 0) UseAVX=0;
476 if (!supports_avx2()) // Drop to 1 if no AVX2 support
477 UseAVX = MIN2((intx)1,UseAVX);
478 if (!supports_avx ()) // Drop to 0 if no AVX support
479 UseAVX = 0;
480
481 // Use AES instructions if available.
482 if (supports_aes()) {
483 if (FLAG_IS_DEFAULT(UseAES)) {
484 UseAES = true;
485 }
486 } else if (UseAES) {
487 if (!FLAG_IS_DEFAULT(UseAES))
488 warning("AES instructions not available on this CPU");
489 FLAG_SET_DEFAULT(UseAES, false);
490 }
491
492 // The AES intrinsic stubs require AES instruction support (of course)
493 // but also require sse3 mode for instructions it use.
494 if (UseAES && (UseSSE > 2)) {
495 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
496 UseAESIntrinsics = true;
497 }
498 } else if (UseAESIntrinsics) {
499 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
500 warning("AES intrinsics not available on this CPU");
501 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
502 }
503
504 #ifdef COMPILER2
505 if (UseFPUForSpilling) {
506 if (UseSSE < 2) {
507 // Only supported with SSE2+
508 FLAG_SET_DEFAULT(UseFPUForSpilling, false);
509 }
510 }
511 if (MaxVectorSize > 0) {
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429 }
430
431 char buf[256];
432 jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
433 cores_per_cpu(), threads_per_core(),
434 cpu_family(), _model, _stepping,
435 (supports_cmov() ? ", cmov" : ""),
436 (supports_cmpxchg8() ? ", cx8" : ""),
437 (supports_fxsr() ? ", fxsr" : ""),
438 (supports_mmx() ? ", mmx" : ""),
439 (supports_sse() ? ", sse" : ""),
440 (supports_sse2() ? ", sse2" : ""),
441 (supports_sse3() ? ", sse3" : ""),
442 (supports_ssse3()? ", ssse3": ""),
443 (supports_sse4_1() ? ", sse4.1" : ""),
444 (supports_sse4_2() ? ", sse4.2" : ""),
445 (supports_popcnt() ? ", popcnt" : ""),
446 (supports_avx() ? ", avx" : ""),
447 (supports_avx2() ? ", avx2" : ""),
448 (supports_aes() ? ", aes" : ""),
449 (supports_clmul() ? ", clmul" : ""),
450 (supports_erms() ? ", erms" : ""),
451 (supports_mmx_ext() ? ", mmxext" : ""),
452 (supports_3dnow_prefetch() ? ", 3dnowpref" : ""),
453 (supports_lzcnt() ? ", lzcnt": ""),
454 (supports_sse4a() ? ", sse4a": ""),
455 (supports_ht() ? ", ht": ""),
456 (supports_tsc() ? ", tsc": ""),
457 (supports_tscinv_bit() ? ", tscinvbit": ""),
458 (supports_tscinv() ? ", tscinv": ""));
459 _features_str = strdup(buf);
460
461 // UseSSE is set to the smaller of what hardware supports and what
462 // the command line requires. I.e., you cannot set UseSSE to 2 on
463 // older Pentiums which do not support it.
464 if (UseSSE > 4) UseSSE=4;
465 if (UseSSE < 0) UseSSE=0;
466 if (!supports_sse4_1()) // Drop to 3 if no SSE4 support
467 UseSSE = MIN2((intx)3,UseSSE);
468 if (!supports_sse3()) // Drop to 2 if no SSE3 support
469 UseSSE = MIN2((intx)2,UseSSE);
473 UseSSE = 0;
474
475 if (UseAVX > 2) UseAVX=2;
476 if (UseAVX < 0) UseAVX=0;
477 if (!supports_avx2()) // Drop to 1 if no AVX2 support
478 UseAVX = MIN2((intx)1,UseAVX);
479 if (!supports_avx ()) // Drop to 0 if no AVX support
480 UseAVX = 0;
481
482 // Use AES instructions if available.
483 if (supports_aes()) {
484 if (FLAG_IS_DEFAULT(UseAES)) {
485 UseAES = true;
486 }
487 } else if (UseAES) {
488 if (!FLAG_IS_DEFAULT(UseAES))
489 warning("AES instructions not available on this CPU");
490 FLAG_SET_DEFAULT(UseAES, false);
491 }
492
493 // Use CLMUL instructions if available.
494 if (supports_clmul()) {
495 if (FLAG_IS_DEFAULT(UseCLMUL)) {
496 UseCLMUL = true;
497 }
498 } else if (UseCLMUL) {
499 if (!FLAG_IS_DEFAULT(UseCLMUL))
500 warning("CLMUL instructions not available on this CPU (AVX may also be required)");
501 FLAG_SET_DEFAULT(UseCLMUL, false);
502 }
503
504 // The AES intrinsic stubs require AES instruction support (of course)
505 // but also require sse3 mode for instructions it use.
506 if (UseAES && (UseSSE > 2)) {
507 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
508 UseAESIntrinsics = true;
509 }
510 } else if (UseAESIntrinsics) {
511 if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
512 warning("AES intrinsics not available on this CPU");
513 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
514 }
515
516 #ifdef COMPILER2
517 if (UseFPUForSpilling) {
518 if (UseSSE < 2) {
519 // Only supported with SSE2+
520 FLAG_SET_DEFAULT(UseFPUForSpilling, false);
521 }
522 }
523 if (MaxVectorSize > 0) {
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