src/cpu/x86/vm/vm_version_x86.cpp
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*** old/src/cpu/x86/vm/vm_version_x86.cpp	Fri May 10 16:16:46 2013
--- new/src/cpu/x86/vm/vm_version_x86.cpp	Fri May 10 16:16:46 2013

*** 444,453 **** --- 444,454 ---- (supports_sse4_2() ? ", sse4.2" : ""), (supports_popcnt() ? ", popcnt" : ""), (supports_avx() ? ", avx" : ""), (supports_avx2() ? ", avx2" : ""), (supports_aes() ? ", aes" : ""), + (supports_clmul() ? ", clmul" : ""), (supports_erms() ? ", erms" : ""), (supports_mmx_ext() ? ", mmxext" : ""), (supports_3dnow_prefetch() ? ", 3dnowpref" : ""), (supports_lzcnt() ? ", lzcnt": ""), (supports_sse4a() ? ", sse4a": ""),
*** 487,496 **** --- 488,508 ---- if (!FLAG_IS_DEFAULT(UseAES)) warning("AES instructions not available on this CPU"); FLAG_SET_DEFAULT(UseAES, false); } + // Use CLMUL instructions if available. + if (supports_clmul()) { + if (FLAG_IS_DEFAULT(UseCLMUL)) { + UseCLMUL = true; + } + } else if (UseCLMUL) { + if (!FLAG_IS_DEFAULT(UseCLMUL)) + warning("CLMUL instructions not available on this CPU (AVX may also be required)"); + FLAG_SET_DEFAULT(UseCLMUL, false); + } + // The AES intrinsic stubs require AES instruction support (of course) // but also require sse3 mode for instructions it use. if (UseAES && (UseSSE > 2)) { if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { UseAESIntrinsics = true;

src/cpu/x86/vm/vm_version_x86.cpp
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