1 /*
2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
79 // GC Ergo Flags
80 define_pd_global(intx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread
81
82 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
83 \
84 develop(bool, IEEEPrecision, true, \
85 "Enables IEEE precision (for INTEL only)") \
86 \
87 product(intx, FenceInstruction, 0, \
88 "(Unsafe,Unstable) Experimental") \
89 \
90 product(intx, ReadPrefetchInstr, 0, \
91 "Prefetch instruction to prefetch ahead") \
92 \
93 product(bool, UseStoreImmI16, true, \
94 "Use store immediate 16-bits value instruction on x86") \
95 \
96 product(intx, UseAVX, 99, \
97 "Highest supported AVX instructions set on x86/x64") \
98 \
99 diagnostic(bool, UseIncDec, true, \
100 "Use INC, DEC instructions on x86") \
101 \
102 product(bool, UseNewLongLShift, false, \
103 "Use optimized bitwise shift left") \
104 \
105 product(bool, UseAddressNop, false, \
106 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
107 \
108 product(bool, UseXmmLoadAndClearUpper, true, \
109 "Load low part of XMM register and clear upper part") \
110 \
111 product(bool, UseXmmRegToRegMoveAll, false, \
112 "Copy all XMM register bits when moving value between registers") \
113 \
114 product(bool, UseXmmI2D, false, \
115 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
116 \
117 product(bool, UseXmmI2F, false, \
118 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
|
1 /*
2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
79 // GC Ergo Flags
80 define_pd_global(intx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread
81
82 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
83 \
84 develop(bool, IEEEPrecision, true, \
85 "Enables IEEE precision (for INTEL only)") \
86 \
87 product(intx, FenceInstruction, 0, \
88 "(Unsafe,Unstable) Experimental") \
89 \
90 product(intx, ReadPrefetchInstr, 0, \
91 "Prefetch instruction to prefetch ahead") \
92 \
93 product(bool, UseStoreImmI16, true, \
94 "Use store immediate 16-bits value instruction on x86") \
95 \
96 product(intx, UseAVX, 99, \
97 "Highest supported AVX instructions set on x86/x64") \
98 \
99 product(bool, UseCLMUL, false, \
100 "Control whether CLMUL instructions can be used on x86/x64") \
101 \
102 diagnostic(bool, UseIncDec, true, \
103 "Use INC, DEC instructions on x86") \
104 \
105 product(bool, UseNewLongLShift, false, \
106 "Use optimized bitwise shift left") \
107 \
108 product(bool, UseAddressNop, false, \
109 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
110 \
111 product(bool, UseXmmLoadAndClearUpper, true, \
112 "Load low part of XMM register and clear upper part") \
113 \
114 product(bool, UseXmmRegToRegMoveAll, false, \
115 "Copy all XMM register bits when moving value between registers") \
116 \
117 product(bool, UseXmmI2D, false, \
118 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
119 \
120 product(bool, UseXmmI2F, false, \
121 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
|