--- old/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2019-03-26 15:44:33.088318138 +0000 +++ new/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp 2019-03-26 15:44:30.664217259 +0000 @@ -558,6 +558,7 @@ break; } + case T_VALUETYPE: case T_OBJECT: { if (patch_code == lir_patch_none) { jobject2reg(c->as_jobject(), dest->as_register()); @@ -604,6 +605,7 @@ void LIR_Assembler::const2stack(LIR_Opr src, LIR_Opr dest) { LIR_Const* c = src->as_constant_ptr(); switch (c->type()) { + case T_VALUETYPE: case T_OBJECT: { if (! c->as_jobject()) @@ -670,6 +672,7 @@ assert(c->as_jint() == 0, "should be"); insn = &Assembler::strw; break; + case T_VALUETYPE: case T_OBJECT: case T_ARRAY: assert(c->as_jobject() == 0, "should be"); @@ -710,13 +713,13 @@ return; } assert(src->is_single_cpu(), "must match"); - if (src->type() == T_OBJECT) { + if (src->type() == T_OBJECT || src->type() == T_VALUETYPE) { __ verify_oop(src->as_register()); } move_regs(src->as_register(), dest->as_register()); } else if (dest->is_double_cpu()) { - if (src->type() == T_OBJECT || src->type() == T_ARRAY) { + if (src->type() == T_OBJECT || src->type() == T_ARRAY || src->type() == T_VALUETYPE) { // Surprising to me but we can see move of a long to t_object __ verify_oop(src->as_register()); move_regs(src->as_register(), dest->as_register_lo()); @@ -744,7 +747,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool pop_fpu_stack) { if (src->is_single_cpu()) { - if (type == T_ARRAY || type == T_OBJECT) { + if (type == T_ARRAY || type == T_OBJECT || type == T_VALUETYPE) { __ str(src->as_register(), frame_map()->address_for_slot(dest->single_stack_ix())); __ verify_oop(src->as_register()); } else if (type == T_METADATA || type == T_DOUBLE) { @@ -782,7 +785,7 @@ return; } - if (type == T_ARRAY || type == T_OBJECT) { + if (type == T_ARRAY || type == T_OBJECT || type == T_VALUETYPE) { __ verify_oop(src->as_register()); if (UseCompressedOops && !wide) { @@ -804,6 +807,7 @@ break; } + case T_VALUETYPE: // fall through case T_ARRAY: // fall through case T_OBJECT: // fall through if (UseCompressedOops && !wide) { @@ -857,7 +861,7 @@ assert(dest->is_register(), "should not call otherwise"); if (dest->is_single_cpu()) { - if (type == T_ARRAY || type == T_OBJECT) { + if (type == T_ARRAY || type == T_OBJECT || type == T_VALUETYPE) { __ ldr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); __ verify_oop(dest->as_register()); } else if (type == T_METADATA) { @@ -929,7 +933,7 @@ LIR_Address* addr = src->as_address_ptr(); LIR_Address* from_addr = src->as_address_ptr(); - if (addr->base()->type() == T_OBJECT) { + if (addr->base()->type() == T_OBJECT || addr->base()->type() == T_VALUETYPE) { __ verify_oop(addr->base()->as_pointer_register()); } @@ -953,6 +957,7 @@ break; } + case T_VALUETYPE: // fall through case T_ARRAY: // fall through case T_OBJECT: // fall through if (UseCompressedOops && !wide) { @@ -1007,7 +1012,7 @@ ShouldNotReachHere(); } - if (type == T_ARRAY || type == T_OBJECT) { + if (type == T_ARRAY || type == T_OBJECT || type == T_VALUETYPE) { if (UseCompressedOops && !wide) { __ decode_heap_oop(dest->as_register()); } @@ -1210,7 +1215,7 @@ Register len = op->len()->as_register(); __ uxtw(len, len); - if (UseSlowPath || + if (UseSlowPath || op->type() == T_VALUETYPE || (!UseFastNewObjectArray && (op->type() == T_OBJECT || op->type() == T_ARRAY)) || (!UseFastNewTypeArray && (op->type() != T_OBJECT && op->type() != T_ARRAY))) { __ b(*op->stub()->entry()); @@ -1522,6 +1527,17 @@ } } +void LIR_Assembler::emit_opFlattenedStoreCheck(LIR_OpFlattenedStoreCheck* op) { + Klass* k = (Klass*)(op->element_klass()->constant_encoding()); + assert(k->is_klass(), "must be a loaded klass"); + add_debug_info_for_null_check_here(op->info_for_exception()); + + __ ldr(op->tmp1()->as_register(), Address(op->object()->as_register(), oopDesc::klass_offset_in_bytes())); + __ cmp(op->tmp1()->as_register(), op->tmp2()->as_register()); + __ br(Assembler::NE, *op->stub()->entry()); + __ bind(*op->stub()->continuation()); +} + void LIR_Assembler::casw(Register addr, Register newval, Register cmpval) { __ cmpxchg(addr, cmpval, newval, Assembler::word, /* acquire*/ true, /* release*/ true, /* weak*/ false, rscratch1); __ cset(rscratch1, Assembler::NE); @@ -1928,10 +1944,10 @@ if (opr2->is_single_cpu()) { // cpu register - cpu register Register reg2 = opr2->as_register(); - if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) { + if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY || opr1->type() == T_VALUETYPE) { __ cmpoop(reg1, reg2); } else { - assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "cmp int, oop?"); + assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY && opr2->type() != T_VALUETYPE, "cmp int, oop?"); __ cmpw(reg1, reg2); } return; @@ -1958,6 +1974,7 @@ case T_ADDRESS: imm = opr2->as_constant_ptr()->as_jint(); break; + case T_VALUETYPE: case T_OBJECT: case T_ARRAY: jobject2reg(opr2->as_constant_ptr()->as_jobject(), rscratch1); @@ -2125,6 +2142,7 @@ } break; case T_LONG: + case T_VALUETYPE: case T_ADDRESS: case T_OBJECT: switch (code) { @@ -2161,6 +2179,7 @@ break; case T_LONG: case T_ADDRESS: + case T_VALUETYPE: case T_OBJECT: switch (code) { case lir_shl: __ lsl (dreg, lreg, count); break; @@ -2889,6 +2908,7 @@ case T_INT: case T_LONG: case T_OBJECT: + case T_VALUETYPE: type = 1; break; case T_FLOAT: @@ -3155,6 +3175,7 @@ xchg = &MacroAssembler::atomic_xchgal; add = &MacroAssembler::atomic_addal; break; + case T_VALUETYPE: case T_OBJECT: case T_ARRAY: if (UseCompressedOops) {