154 v0, v1, v2, v3, v4, v5, v6, v7, 155 v8, v9, v10, v11, v12, v13, v14, v15, 156 v16, v17, v18, v19, v20, v21, v22, v23, 157 v24, v25, v26, v27, v28, v29, v30, v31 158 ); 159 // @formatter:on 160 161 /** 162 * Basic set of CPU features mirroring what is returned from the cpuid instruction. See: 163 * {@code VM_Version::cpuFeatureFlags}. 164 */ 165 public enum CPUFeature { 166 FP, 167 ASIMD, 168 EVTSTRM, 169 AES, 170 PMULL, 171 SHA1, 172 SHA2, 173 CRC32, 174 A53MAC, 175 DMB_ATOMICS 176 } 177 178 private final EnumSet<CPUFeature> features; 179 180 /** 181 * Set of flags to control code emission. 182 */ 183 public enum Flag { 184 UseBarriersForVolatile, 185 UseCRC32, 186 UseNeon 187 } 188 189 private final EnumSet<Flag> flags; 190 191 public AArch64(EnumSet<CPUFeature> features, EnumSet<Flag> flags) { 192 super("aarch64", AArch64Kind.QWORD, ByteOrder.LITTLE_ENDIAN, true, allRegisters, 0, 0, 0); 193 this.features = features; | 154 v0, v1, v2, v3, v4, v5, v6, v7, 155 v8, v9, v10, v11, v12, v13, v14, v15, 156 v16, v17, v18, v19, v20, v21, v22, v23, 157 v24, v25, v26, v27, v28, v29, v30, v31 158 ); 159 // @formatter:on 160 161 /** 162 * Basic set of CPU features mirroring what is returned from the cpuid instruction. See: 163 * {@code VM_Version::cpuFeatureFlags}. 164 */ 165 public enum CPUFeature { 166 FP, 167 ASIMD, 168 EVTSTRM, 169 AES, 170 PMULL, 171 SHA1, 172 SHA2, 173 CRC32, 174 LSE, 175 STXR_PREFETCH, 176 A53MAC, 177 DMB_ATOMICS 178 } 179 180 private final EnumSet<CPUFeature> features; 181 182 /** 183 * Set of flags to control code emission. 184 */ 185 public enum Flag { 186 UseBarriersForVolatile, 187 UseCRC32, 188 UseNeon 189 } 190 191 private final EnumSet<Flag> flags; 192 193 public AArch64(EnumSet<CPUFeature> features, EnumSet<Flag> flags) { 194 super("aarch64", AArch64Kind.QWORD, ByteOrder.LITTLE_ENDIAN, true, allRegisters, 0, 0, 0); 195 this.features = features; |