src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp

@@ -374,11 +374,11 @@
     __ str(zr, Address(rthread, JavaThread::vm_result_2_offset()));
     break;
   case handle_exception_nofpu_id:
   case handle_exception_id:
     // At this point all registers MAY be live.
-    oop_map = save_live_registers(sasm, id == handle_exception_nofpu_id);
+    oop_map = save_live_registers(sasm, id != handle_exception_nofpu_id);
     break;
   case handle_exception_from_callee_id: {
     // At this point all registers except exception oop (r0) and
     // exception pc (lr) are dead.
     const int frame_size = 2 /*fp, return address*/;

@@ -438,11 +438,11 @@
   switch (id) {
   case forward_exception_id:
   case handle_exception_nofpu_id:
   case handle_exception_id:
     // Restore the registers that were saved at the beginning.
-    restore_live_registers(sasm, id == handle_exception_nofpu_id);
+    restore_live_registers(sasm, id != handle_exception_nofpu_id);
     break;
   case handle_exception_from_callee_id:
     // Pop the return address since we are possibly changing SP (restoring from BP).
     __ leave();