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src/cpu/aarch64/vm/macroAssembler_aarch64.cpp

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rev 8083 : 8079203: AARCH64: Need to cater for different partner implementations
Summary: Parse /proc/cpuinfo to derive implementation specific info
Reviewed-by: duke

@@ -1623,11 +1623,11 @@
   int idivl_offset = offset();
   if (! want_remainder) {
     sdivw(result, ra, rb);
   } else {
     sdivw(scratch, ra, rb);
-    msubw(result, scratch, rb, ra);
+    Assembler::msubw(result, scratch, rb, ra);
   }
 
   return idivl_offset;
 }
 

@@ -1653,11 +1653,11 @@
   int idivq_offset = offset();
   if (! want_remainder) {
     sdiv(result, ra, rb);
   } else {
     sdiv(scratch, ra, rb);
-    msub(result, scratch, rb, ra);
+    Assembler::msub(result, scratch, rb, ra);
   }
 
   return idivq_offset;
 }
 

@@ -3450,18 +3450,10 @@
     byte_offset = (uint64_t)dest.target() & 0xfff;
     _adrp(reg1, dest.target());
   }
 }
 
-  bool MacroAssembler::use_acq_rel_for_volatile_fields() {
-#ifdef PRODUCT
-    return false;
-#else
-    return UseAcqRelForVolatileFields;
-#endif
-  }
-
 void MacroAssembler::build_frame(int framesize) {
   if (framesize == 0) {
     // Is this even possible?
     stp(rfp, lr, Address(pre(sp, -2 * wordSize)));
   } else if (framesize < ((1 << 9) + 2 * wordSize)) {
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