1 /*
2 * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2015, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "memory/resourceArea.hpp"
30 #include "runtime/java.hpp"
31 #include "runtime/stubCodeGenerator.hpp"
32 #include "vm_version_aarch64.hpp"
33 #ifdef TARGET_OS_FAMILY_linux
34 # include "os_linux.inline.hpp"
35 #endif
36
37 #ifndef BUILTIN_SIM
38 #include <sys/auxv.h>
39 #include <asm/hwcap.h>
40 #else
41 #define getauxval(hwcap) 0
42 #endif
43
44 #ifndef HWCAP_AES
45 #define HWCAP_AES (1<<3)
46 #endif
47
48 #ifndef HWCAP_SHA1
49 #define HWCAP_SHA1 (1<<5)
50 #endif
51
52 #ifndef HWCAP_SHA2
53 #define HWCAP_SHA2 (1<<6)
54 #endif
55
56 #ifndef HWCAP_CRC32
57 #define HWCAP_CRC32 (1<<7)
58 #endif
59
60 int VM_Version::_cpu;
61 int VM_Version::_model;
62 int VM_Version::_model2;
63 int VM_Version::_variant;
64 int VM_Version::_revision;
65 int VM_Version::_stepping;
66 int VM_Version::_cpuFeatures;
67 const char* VM_Version::_features_str = "";
68
69 static BufferBlob* stub_blob;
70 static const int stub_size = 550;
71
72 extern "C" {
73 typedef void (*getPsrInfo_stub_t)(void*);
74 }
75 static getPsrInfo_stub_t getPsrInfo_stub = NULL;
76
77
78 class VM_Version_StubGenerator: public StubCodeGenerator {
79 public:
80
81 VM_Version_StubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {}
82
83 address generate_getPsrInfo() {
84 StubCodeMark mark(this, "VM_Version", "getPsrInfo_stub");
85 # define __ _masm->
86 address start = __ pc();
87
88 #ifdef BUILTIN_SIM
89 __ c_stub_prolog(1, 0, MacroAssembler::ret_type_void);
90 #endif
91
92 // void getPsrInfo(VM_Version::CpuidInfo* cpuid_info);
93
94 address entry = __ pc();
95
96 // TODO : redefine fields in CpuidInfo and generate
97 // code to fill them in
98
99 __ ret(lr);
100
101 # undef __
102
103 return start;
104 }
105 };
106
107
108 void VM_Version::get_processor_features() {
109 _supports_cx8 = true;
110 _supports_atomic_getset4 = true;
111 _supports_atomic_getadd4 = true;
112 _supports_atomic_getset8 = true;
113 _supports_atomic_getadd8 = true;
114
115 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance))
116 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256);
117 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize))
118 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, 64);
119 FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 256);
120 FLAG_SET_DEFAULT(PrefetchFieldsAhead, 256);
121 FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 256);
122 FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
123
124 unsigned long auxv = getauxval(AT_HWCAP);
125
126 char buf[512];
127
128 _cpuFeatures = auxv;
129
130 int cpu_lines = 0;
131 if (FILE *f = fopen("/proc/cpuinfo", "r")) {
132 char buf[128], *p;
133 while (fgets(buf, sizeof (buf), f) != NULL) {
134 if (p = strchr(buf, ':')) {
135 long v = strtol(p+1, NULL, 0);
136 if (strncmp(buf, "CPU implementer", sizeof "CPU implementer" - 1) == 0) {
137 _cpu = v;
138 cpu_lines++;
139 } else if (strncmp(buf, "CPU variant", sizeof "CPU variant" - 1) == 0) {
140 _variant = v;
141 } else if (strncmp(buf, "CPU part", sizeof "CPU part" - 1) == 0) {
142 if (_model != v) _model2 = _model;
143 _model = v;
144 } else if (strncmp(buf, "CPU revision", sizeof "CPU revision" - 1) == 0) {
145 _revision = v;
146 }
147 }
148 }
149 fclose(f);
150 }
151
152 // Enable vendor specific features
153 if (_cpu == CPU_CAVIUM && _variant == 0) _cpuFeatures |= CPU_DMB_ATOMICS;
154 if (_cpu == CPU_ARM && (_model == 0xd03 || _model2 == 0xd03)) _cpuFeatures |= CPU_A53MAC;
155 // If an olde style /proc/cpuinfo (cpu_lines == 1) then if _model is an A57 (0xd07)
156 // we assume the worst and assume we could be on a big little system and have
157 // undisclosed A53 cores which we could be swapped to at any stage
158 if (_cpu == CPU_ARM && cpu_lines == 1 && _model == 0xd07) _cpuFeatures |= CPU_A53MAC;
159
160 sprintf(buf, "0x%02x:0x%x:0x%03x:%d", _cpu, _variant, _model, _revision);
161 if (_model2) sprintf(buf+strlen(buf), "(0x%03x)", _model2);
162 if (auxv & HWCAP_ASIMD) strcat(buf, ", simd");
163 if (auxv & HWCAP_CRC32) strcat(buf, ", crc");
164 if (auxv & HWCAP_AES) strcat(buf, ", aes");
165 if (auxv & HWCAP_SHA1) strcat(buf, ", sha1");
166 if (auxv & HWCAP_SHA2) strcat(buf, ", sha256");
167
168 _features_str = os::strdup(buf);
169
170 if (FLAG_IS_DEFAULT(UseCRC32)) {
171 UseCRC32 = (auxv & HWCAP_CRC32) != 0;
172 }
173 if (UseCRC32 && (auxv & HWCAP_CRC32) == 0) {
174 warning("UseCRC32 specified, but not supported on this CPU");
175 }
176 if (auxv & HWCAP_AES) {
177 UseAES = UseAES || FLAG_IS_DEFAULT(UseAES);
178 UseAESIntrinsics =
179 UseAESIntrinsics || (UseAES && FLAG_IS_DEFAULT(UseAESIntrinsics));
180 if (UseAESIntrinsics && !UseAES) {
181 warning("UseAESIntrinsics enabled, but UseAES not, enabling");
182 UseAES = true;
183 }
184 } else {
185 if (UseAES) {
186 warning("UseAES specified, but not supported on this CPU");
187 }
188 if (UseAESIntrinsics) {
189 warning("UseAESIntrinsics specified, but not supported on this CPU");
190 }
191 }
192
193 if (UseGHASHIntrinsics) {
194 warning("GHASH intrinsics are not available on this CPU");
195 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
196 }
197
198 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
199 UseCRC32Intrinsics = true;
200 }
201
202 if (auxv & HWCAP_CRC32) {
203 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
204 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
205 }
206 } else if (UseCRC32CIntrinsics) {
207 warning("CRC32C is not available on the CPU");
208 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
209 }
210
211 if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
212 if (FLAG_IS_DEFAULT(UseSHA)) {
213 FLAG_SET_DEFAULT(UseSHA, true);
214 }
215 } else if (UseSHA) {
216 warning("SHA instructions are not available on this CPU");
217 FLAG_SET_DEFAULT(UseSHA, false);
218 }
219
220 if (UseSHA && (auxv & HWCAP_SHA1)) {
221 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
222 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
223 }
224 } else if (UseSHA1Intrinsics) {
225 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
226 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
227 }
228
229 if (UseSHA && (auxv & HWCAP_SHA2)) {
230 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
231 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
232 }
233 } else if (UseSHA256Intrinsics) {
234 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
235 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
236 }
237
238 if (UseSHA512Intrinsics) {
239 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
240 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
241 }
242
243 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
244 FLAG_SET_DEFAULT(UseSHA, false);
245 }
246
247 // This machine allows unaligned memory accesses
248 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
249 FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
250 }
251
252 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
253 UseMultiplyToLenIntrinsic = true;
254 }
255
256 if (FLAG_IS_DEFAULT(UseBarriersForVolatile)) {
257 UseBarriersForVolatile = (_cpuFeatures & CPU_DMB_ATOMICS) != 0;
258 }
259
260 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
261 UsePopCountInstruction = true;
262 }
263
264 #ifdef COMPILER2
265 if (FLAG_IS_DEFAULT(OptoScheduling)) {
266 OptoScheduling = true;
267 }
268 #endif
269 }
270
271 void VM_Version::initialize() {
272 ResourceMark rm;
273
274 stub_blob = BufferBlob::create("getPsrInfo_stub", stub_size);
275 if (stub_blob == NULL) {
276 vm_exit_during_initialization("Unable to allocate getPsrInfo_stub");
277 }
278
279 CodeBuffer c(stub_blob);
280 VM_Version_StubGenerator g(&c);
281 getPsrInfo_stub = CAST_TO_FN_PTR(getPsrInfo_stub_t,
282 g.generate_getPsrInfo());
283
284 get_processor_features();
285 }