src/cpu/aarch64/vm/macroAssembler_aarch64.cpp

rev 10278 : 8150394: aarch64: add support for 8.1 LSE CAS instructions
Reviewed-by: duke
Contributed-by: ananth.jasty@caviumnetworks.com, edward.nevill@gmail.com

@@ -2069,10 +2069,17 @@
                                 Label &succeed, Label *fail) {
   // oldv holds comparison value
   // newv holds value to write in exchange
   // addr identifies memory word to compare against/update
   // tmp returns 0/1 for success/failure
+  if (UseLSE) {
+    mov(tmp, oldv);
+    casal(oldv, newv, addr);
+    cmp(tmp, oldv);
+    br(Assembler::EQ, succeed);
+    membar(AnyAny);
+  } else {
   Label retry_load, nope;
 
   bind(retry_load);
   // flush and load exclusive from the memory location
   // and fail if it is not what we expect

@@ -2087,20 +2094,28 @@
   b(retry_load);
   // if the memory word differs we return it in oldv and signal a fail
   bind(nope);
   membar(AnyAny);
   mov(oldv, tmp);
+  }
   if (fail)
     b(*fail);
 }
 
 void MacroAssembler::cmpxchgw(Register oldv, Register newv, Register addr, Register tmp,
                                 Label &succeed, Label *fail) {
   // oldv holds comparison value
   // newv holds value to write in exchange
   // addr identifies memory word to compare against/update
   // tmp returns 0/1 for success/failure
+  if (UseLSE) {
+    mov(tmp, oldv);
+    casalw(oldv, newv, addr);
+    cmp(tmp, oldv);
+    br(Assembler::EQ, succeed);
+    membar(AnyAny);
+  } else {
   Label retry_load, nope;
 
   bind(retry_load);
   // flush and load exclusive from the memory location
   // and fail if it is not what we expect

@@ -2115,10 +2130,11 @@
   b(retry_load);
   // if the memory word differs we return it in oldv and signal a fail
   bind(nope);
   membar(AnyAny);
   mov(oldv, tmp);
+  }
   if (fail)
     b(*fail);
 }
 
 static bool different(Register a, RegisterOrConstant b, Register c) {