src/cpu/aarch64/vm/macroAssembler_aarch64.hpp

rev 10243 : 8150394: aarch64: add support for 8.1 LSE CAS instructions
Reviewed-by: aph
Contributed-by: ananth.jasty@caviumnetworks.com, edward.nevill@linaro.org

@@ -969,25 +969,14 @@
       orr(rscratch2, rscratch2, src.as_constant());
     str(rscratch2, adr);
   }
 
   // A generic CAS; success or failure is in the EQ flag.
-  template <typename T1, typename T2>
-  void cmpxchg(Register addr, Register expected, Register new_val,
-               T1 load_insn,
-               void (MacroAssembler::*cmp_insn)(Register, Register),
-               T2 store_insn,
-               Register tmp = rscratch1) {
-    Label retry_load, done;
-    bind(retry_load);
-    (this->*load_insn)(tmp, addr);
-    (this->*cmp_insn)(tmp, expected);
-    br(Assembler::NE, done);
-    (this->*store_insn)(tmp, new_val, addr);
-    cbnzw(tmp, retry_load);
-    bind(done);
-  }
+  void cmpxchg(operand_size sz,
+               Register oldv, Register newv, Register addr,
+               bool acquire = true, bool release = true,
+               Register tmp = rscratch1);
 
   // Calls
 
   address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);